KR100937845B1 - Source Driver - Google Patents

Abstract

The present invention relates to a source driver having improved EMI (Electro Magnetic Interference) characteristics, and when the color signal data is input from the control unit by the even mode and the odd mode, the even mode signal data is input. A receiving pin and a pin receiving the odd mode signal data are alternately formed.

Electro Magnetic Interference (EMI), Source Driver, Even Mode, Eod Mode, Input Pins

Description

Source Driver

1 is a block diagram schematically illustrating an internal structure of a general liquid crystal display device.

2 is a diagram illustrating input pins and related signals of a conventional source driver.

3 is a schematic view showing a signal applied to a conventional source driver

4 is a schematic diagram showing an input pin and a signal applied thereto of a source driver of the present invention;

5 is a diagram illustrating an input pin and a related signal of a source driver of the present invention.

6 is a schematic view showing a signal applied to the source driver of the present invention

7 is a graph illustrating EMI phenomenon according to frequency when color signal input pins are formed for each odd mode and even mode

8 is a graph illustrating EMI phenomenon according to frequency when the odd mode and even mode color signal input pins are alternately formed.

* Description of symbols on the main parts of the drawings *

30 source driver 31 color signal input pin

The present invention relates to a liquid crystal display device, and more particularly, to a source driver having improved EMI (Electro Magnetic Interference) characteristics.

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELD), and vacuum fluorescent (VFD) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display device because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention has been developed in various ways such as a television and a computer monitor for receiving and displaying broadcast signals.

In order to use such a liquid crystal display as a general screen display device in various parts, it is a matter of how high quality images such as high definition, high brightness and large area can be realized while maintaining the characteristics of light weight, thinness and low power consumption. Can be.

A general liquid crystal display device may be largely divided into a liquid crystal panel displaying an image and a driving unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel includes first and second glass substrates bonded to each other with a predetermined space; It consists of a liquid crystal layer injected between said first and second glass substrates.

Here, the first glass substrate (TFT array substrate) has a plurality of gate lines arranged in one direction at regular intervals, a plurality of data lines arranged at regular intervals in a direction perpendicular to the gate lines, A plurality of pixel electrodes formed in a matrix form in each pixel region defined by crossing a gate line and a data line, and a plurality of thin film transistors switched by signals of the gate line to transfer the signal of the data line to each pixel electrode. Is formed.

In the second glass substrate (color filter array substrate), a light shielding layer for blocking light in portions other than the pixel region, an R, G, and B color filter layer for expressing color colors are common to implement an image. An electrode is formed.

The driving principle of the general liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the arrangement of molecules can be controlled by artificially applying an electric field to the liquid crystal.

Therefore, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal by optical anisotropy, thereby representing image information.

Currently, an active matrix LCD, in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner, is attracting the most attention due to its excellent resolution and ability to implement video.                         

On the other hand, the development of electronic communication technology has made it possible to drive the miniaturization, high speed, wideband, as well as micro energy of electronic devices. However, the high integration of the chip is sensitive to the slight electromagnetic interference caused by natural phenomena, causing the system to malfunction. In addition, as the electronic devices are spread in various fields of society, electromagnetic wave density has increased, which causes many problems such as deteriorating the electromagnetic environment and adversely affecting the human body. This is called electromagnetic interference (EMI).

As a result, measures to solve the electromagnetic disturbance problem are actively progressed in each field, and the LCD field is not an exception, and various methods have been proposed.

Electromagnetic interference occurs in electronic devices that use high frequency signals because electric and magnetic fields are mixed and propagated in the air when high frequency current flows through any wire.

In the case of LCDs, the higher the resolution, the higher the operating frequency, resulting in higher EMI emissions.

Therefore, this should be considered when designing LCD driving circuits.

One is to reduce the electromagnetic interference by using an EMI filter, which is to reduce the electromagnetic disturbance by inserting a filter for reducing EMI suitable for the frequency used in the conducting wire, such as a clock.                         

The other is in designing PCBs, minimizing EMI emissions by optimizing ground handling using multilayer PCBs.

Another method is to reduce the frequency, which is to reduce the frequency of the clock or data through the split driving method when the driver is driven in consideration of the EMI emission proportional to the frequency used.

The other is the LVDS interface.

Low Voltage Differential Signaling (LVDS) is an advanced interface technology that has been put to practical use recently. Compresses / transmits signals using coding techniques used in communications, dramatically reducing the number of signal lines and reducing the voltage level of digital signals below 1V. By transmitting, EMI emissions are suppressed.

Hereinafter, a conventional source driver will be described with reference to the accompanying drawings.

1 is a block diagram schematically illustrating an internal structure of a general liquid crystal display.

As shown in FIG. 1, a general liquid crystal module includes a liquid crystal panel 1 having a thin film transistor array including a gate line and a data line, a gate driver 8 for driving the gate line, and a data line. A source driver 9 for receiving the signal, a controller 3 for receiving a signal from the system (or host) 10 and outputting an internal timing signal, and a signal for receiving a signal from the system 10 and the controller 3 DC / DC converter 4 for outputting a voltage and common voltage generation for applying a common voltage signal to the liquid crystal panel 1 by receiving a signal from the DC / DC converter 4 and the controller 3. A gate driver interface 7 for receiving a gate voltage signal from the DC / DC converter 4 and applying the gate voltage signal to the gate driver 8, and receiving a voltage from the DC / DC converter 4. Convert it to predetermined Is formed from a gamma reference voltage unit (5) to be applied to open the source driver (9).

The controller 3 processes the image data of the system 10 to fit the panel and generates various control signals.

The main role of the controller is to receive RGB signals from the system 10, distribute them to data that can be processed by each source driver 9, control the gate driver 8, and control the gate and the source driver 9. The basic timing of the controller 3 is set in accordance with the timing of the driver 8.

The interior of the control unit 3 is basically formed of several blocks.

Typically, there is a polarity bit generation block, a gate / data clock divider block, a data processing block, and the like, and a timing simulation is performed to verify the entire function.

In addition, the controller 3 may include a power on reset (Power_On_Reset) function, an abnormality detection function of the DC / DC converter 4, an abnormality detection function of an input signal, and a receiver unit that interfaces with the system 10 ( It may be formed with a receiver circuit.

In the liquid crystal panel 1, thin film transistors are formed in each pixel, the gate electrode of the thin film transistor is connected to a gate line as a scan line, and the source electrode of the thin film transistor is connected to a data line as a signal line.

When the ON signal Vg_on is applied to the scan line, a channel is formed in the thin film transistor connected to the gate line, and the voltage of the signal line is applied to the pixel electrode via the source electrode and the drain electrode.

The resolution of the liquid crystal panel 1 is determined according to the number of gate lines and data lines.

The gate driver 8 which drives the gate line has a relatively simple structure because only the ON / OFF signal is sequentially applied to the gate line.

That is, the gate driver 8 adjusts the output logic level of the bi-direction shift register and the shift register, which sequentially move the data (start pulse) value having a logic input of "1" by one line time interval. A single or multiple gate driver IC is composed of a level shifter that converts the gate line to an ON / OFF voltage and a current buffer that amplifies the current in consideration of the load of the gate line.

The adjacent gate driver IC sequentially transfers logic values to the final stage in synchronization with a clock signal through the SIR-SIL and SOL-SOR connections according to the condition of the L / R terminal that determines the shift direction. The liquid crystal panel 1 is usually provided with three to six gate drivers.

The source driver 9 latches each of the RGB data sequentially received in accordance with the dot clock by the control unit 3 to set the timing system of the Dot at a Time Scanning line at a Time Scanning method. Change to Every horizontal line period, data stored in the first latch is transferred to the second latch in accordance with a transfer enable signal. The data stored in the second latch is converted into an analog voltage by the A / D converter, and is then applied to the data line via a current buffer.

The image quality of the liquid crystal panel 1 depends particularly on the setting of the gamma reference voltage. The gamma reference voltage is determined in consideration of the electro-optical characteristics of the liquid crystal panel.

The DC / DC converter 4 and the gamma voltage unit 5 provide reference voltages for driving the gate driver 8 and the source driver 9.

The power supply unit of the LCM is composed of a DC / DC converter 4 and a backlight inverter (not shown). The DC / DC converter 4 often uses a single chip.

The main voltage sources are a 5V or 3.3V supply of logic circuits, an ON / OFF supply across the gate line, a gamma reference supply, and a common voltage (Vcom) signal supply. The liquid crystal panel module generates a necessary voltage by boosting or reducing the power supply voltage required for each circuit unit from a single power supply regardless of a notebook or a monitor. Voltage conversion circuits are an important issue in notebook TFT LCD modules where power consumption is more important than monitors.

Considerations in the design of the DC / DC converter 4 are ripple, efficiency, in-rush current, and start-up voltage of the output voltage.

If the gamma reference voltage changes due to the ripple of the output voltage of the DC / DC converter 4, the image quality is deteriorated. Therefore, a choke coil is placed at the output terminal of the DC / DC converter 4 to filter the ripple.                         

Efficiency of the DC / DC converter 4 is a very important factor for lowering module power consumption. If the efficiency of the DC / DC converter 4 is 70%, the power consumption of the DC / DC converter 4 is about 0.27W (0.9x0.3). The power consumption of the TFT LCD module is about 1.43W, and about 20% is consumed by the DC / DC converter 4.

2 is a diagram illustrating input pins and related signals of a conventional source driver, and FIG. 3 is a schematic diagram illustrating a signal applied to a conventional source driver.

As shown in FIG. 2, in the conventional source driver 20, the input pin includes an odd signal and an even signal, such as an odd signal input pin 21 and an even signal input pin. Each of 22 is formed as a separate block.

At this time, as shown in FIG. 3, the source driver 20 receives an odd mode signal and an even mode signal from the control unit (see 3 in FIG. 1) for the first frame and the second frame for each gray level. . Therefore, in the conventional source driver, since signals are applied for each block of the odd signal input pin unit 21 and the even signal input pin unit 22, the pins adjacent to each other in the block are continuously introduced with signals of the same polarity, and thus the electromagnetic signals of each other are continuously applied. Signal interference results in deterioration of Electro Magnetic Interference (EMI) characteristics.

The conventional source driver as described above has the following problems.

In the conventional source driver, the data output is divided into even and odd, and the output is arranged in an even output pin array after the odd output pin array. As described above, since source driver pins are arranged separately for each of the even block and the odd block, even if signals are alternately input / even, the same type of signal is input to the even block and the odd block, thereby interfering with the signal. Since unnecessary electromagnetic fields are formed, EMI characteristics deteriorate.

Disclosure of Invention The present invention has been made in view of solving the above problems, and an object thereof is to provide a source driver having improved EMI (Electro Magnetic Interference) characteristics.

The source driver of the present invention for achieving the above object is a pin and the odd receiving the even mode signal data when receiving the color signal data by the even mode (even mode), odd mode (odd mode) from the control unit It is characterized in that the pins receiving the mode signal data are alternately formed.

The pin receiving the color signal data from the controller is formed for each even mode and odd mode according to the number of gray levels of the color signal.

The color signal data is R, G, and B.

The gradation number is 6 or 8.

Hereinafter, a source driver of the present invention will be described in detail with reference to the accompanying drawings.                     

4 is a schematic diagram showing an input pin of a source driver and a signal applied thereto.

As shown in FIG. 4, the color signal input pin 31 of the source driver 30 of the present invention has an odd mode in the number of gray levels (6, 8, or more) for each of the R, G, and B color signals. It is formed for the even mode. That is, when the number of grays is 6, the color signal input pin 31 of the source driver is provided with 3 (R, G, B) x 6 (number of grays) x 2 (odd, even) = 36 pins. In the case of 8, 3x8x2 = 48 pins are provided.

Here, the odd mode input pins and the even mode input pins of the color signal input pin part 31 are alternately formed. That is, as shown in FIG. 4, when the number of gray levels is 6, the input pins of the source driver 30 are RO0, RE0, RO1, RE1, ...., RO5, RE5, GO0, GE0, ......., It is formed in the order of GO5, GE5, BO0, BE0, ....., BO5, BE5.

5 is a diagram illustrating an input pin and a related signal of a source driver of the present invention, and FIG. 6 is a schematic view showing a signal applied to the source driver of the present invention.

As shown in Fig. 5, the color signal input pin 31 of the source driver 30 of the present invention is formed by alternately an odd signal input pin and an even signal input pin. In addition to the color signal input pin 31, the source driver 30 of the present invention includes gamma voltage applying pins GM1 to GM10 for applying respective gray scale voltages of the color signals, and common voltage applying pins for applying a common voltage. (VCOM), a ground voltage application pin portion (GND, GNS, VSS) for applying a ground voltage, a power supply voltage application pin portion (VDD) for applying a power supply voltage, a dummy pin portion (DUMMY), which is an extra supplementary pin, is further provided. .

As such, the color signal input pin 31 of the source driver 30 may include the odd signal input pins RO0 to RO5, GO0 to GO5, BO0 to BO5, and even signal input pins RE0 to RE5, GE0 to GE5, and BE0. And BE5 are alternately formed, and as shown in FIG. 6, the odd mode signal is transmitted from the controller to the odd signal input pins RO0 to RO5, GO0 to GO5, and BO0 to the first frame in the first frame. Each of them is applied to BO5, and an even mode signal is applied to the even signal input pins RE0 to RE5, GE0 to GE5, and BE0 to BE5 from the control unit at the second frame.

That is, the odd mode input pins and the even mode signal input pins, which are input pins of different modes, are formed adjacent to each other so that a signal is not applied to the pins adjacent to each other for each frame, and one pin is interposed between each signal input pin. Since the signal is being applied, the electromagnetic interference (EMI) is minimized when the signal is applied.

Although not shown, the source driver 30 may include a source start pulse signal (SSP), a source shift clock signal SSC, and a left / right selection signal L / R: A shift register (not shown) that receives Left / Right Select and stores the address for each address, and receives a load signal Load from the control unit and according to the address, the image signal for each even mode / od mode (R, G, B Data). A first and a second latch unit (not shown) for receiving and storing a signal, a decoder (DAC) (not shown) for converting a digital signal stored in the first and second latch units into analog signals, and a signal of the decoder. An output buffer AMP (not shown) for outputting data lines is provided.

The image quality of the liquid crystal display device having such a source driver is highly dependent on the setting of the gamma reference voltage. Therefore, the liquid crystal display determines the gamma reference voltage in consideration of the mode and the electro-optical characteristics of the liquid crystal panel.

FIG. 7 is a graph illustrating EMI phenomenon according to frequency when color signal input pins are formed for each odd mode and even mode, and FIG. 8 is a graph showing frequency phenomenon when the odd mode and even mode color signal input pins are alternately formed. Graph showing EMI phenomenon.

As shown in FIG. 7, when input pins are blocked for each mode for each odd mode and even mode, signals are applied to adjacent pins among the input pins blocked for each mode. Electromagnetic interference is intensified.

On the other hand, as shown in FIG. 8, when the odd mode input pin and the even mode input pin are alternately formed, when the signals are applied to one pin in the case of adjacent pins, the signal is not applied to the immediately adjacent pin. Therefore, electromagnetic interference between the adjacent pins is minimized.

In particular, as shown in FIGS. 7 and 8, when the odd mode / even mode signal input pins are alternately formed, the odd mode input pins and the even mode input pins are 150 MHz or more compared with the respective blocks. EMI reduction effect in the high frequency region is remarkable.

The source driver of the present invention as described above has the following effects.

When the color signal is input to each source mode and even mode from the control unit to the source driver and the even mode, an array of input drivers and source modes of the source driver are alternately formed so that signals of the same mode are not applied to adjacent input pins. This improves EMI between the input pins and adjacent sections of the source driver.

Claims (5)

When the R, G, and B color signal data are input from the control unit by the number of gray levels for each of the even mode and the odd mode, respectively, the pin receiving the even mode signal data and the odd mode signal data are inputted. Source driver, characterized in that the receiving pin is formed alternately. delete delete The method of claim 1, The source driver of claim 6, wherein the gray level is six. The method of claim 1, A source driver, characterized in that the number of gradations is eight.

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