KR100832006B1 - Semiconductor memory device with self-refresh-period generator and there for operation method - Google Patents

Abstract

The present invention is to provide an apparatus for generating a cell refresh cycle signal of a semiconductor memory device capable of generating a refresh cycle of a stable cycle with a small influence on the process and driving voltage, the present invention for this purpose is not affected by temperature changes Fixed period signal generating means for generating a fixed-period signal of a fixed period; Variable period signal generation means for generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; And outputting the variable-cycle signal as a refresh-cycle signal for controlling refresh driving, wherein the fixed-cycle signal is output in a low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal. A semiconductor memory device having a crimping means for outputting the refresh-period signal is provided.

Refresh, cycle, temperature, selection, process

Description

A semiconductor memory device having a cell refresh cycle generation device and a method of driving the same {Semiconductor memory device with SELF-REFRESH-PERIOD GENERATOR AND THERE FOR OPERATION METHOD}

1 is a block diagram of a semiconductor memory device of a cell refresh cycle generation device according to the prior art.

FIG. 2 is a diagram illustrating a problem of the cell refresh period signal generation device shown in FIG.

3 is a block diagram illustrating a semiconductor memory device including a cell refresh cycle generation device according to an embodiment of the present invention.

4 is an internal circuit diagram of the comparison section setting unit of FIG.

5 is an internal circuit diagram of a sensing unit of FIG. 3.

6 is an internal circuit diagram of a selector of FIG. 3.

7 is an operational waveform diagram of the present invention shown in FIGS.

* Explanation of symbols for the main parts of the drawings

320: comparison driving control unit

340: comparison section setting unit

360: detector

380: selection

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor design technology, and more particularly, to a circuit for automatically adjusting a refresh cycle used for low power DRAM, water SDRAM, and the like according to temperature.

In general, self-refreshing means that a semiconductor memory device such as a DRAM performs a refresh with a predetermined period internally to maintain data stored in a memory cell in a standby state. In addition, since the characteristics of the semiconductor memory device vary depending on the temperature, current consumption of the semiconductor memory device may be reduced by adjusting the self refresh period by detecting the ambient temperature.

Therefore, the circuit used for the Auto Temperature Compensated Self Refresh (TCSR) circuit, which is a circuit that automatically changes the refresh cycle used in low power devices such as low power DRAM or pseudo SRAM, according to temperature, will be described below with reference to the drawings. Let's take a look.

1 is a block diagram of a semiconductor memory device of a cell refresh cycle generation device according to the prior art.

Referring to FIG. 1, the refresh cycle generator according to the related art includes a fixed cycle signal generator 20 for generating a fixed-cycle signal TC_OSC by maintaining a constant cycle regardless of temperature variation, and a cycle generation signal. The oscillator 10 and the base-cycle signal BS_PRD for generating the base-cycle signal BS_PRD in response to OSC_EN or for outputting the adjustment-cycle signal CTRL_PRD as the base-cycle signal BS_PRD. When the period is longer than the fixed-period signal ST_PRD, the period of the comparator 30 for outputting the fixed-period signal ST_PRD as the adjustment-period signal CTRL_PRD and the basic-period signal BS_PRD is divided. And a period adjuster 40 for outputting the refresh-period signal SREF_OSC.

For reference, the base-cycle signal BS_PRD generated by the oscillator 10 in response to the cycle generation signal OSC_EN is changed in accordance with a change in temperature. For example, when the temperature rises, the period of the base-cycle signal BS_PRD is shortened, and when the temperature decreases, the period of the base-cycle signal BS_PRD becomes long.

As such, the cell refresh period signal generation device generates a periodic signal that is variable depending on the temperature, thereby adjusting the interval at which the cell refresh is performed. In other words, the lower the temperature, the less time it takes for cell data to be lost. Therefore, the refresh is not performed more frequently than when the temperature is high.

However, the refresh interval does not decrease continuously in proportion to the drop in temperature. That is, when the temperature reaches a certain temperature even if the temperature continues to fall, there is a situation where the refresh interval can no longer be reduced due to fear of data loss. Therefore, the aforementioned device controls the period of the refresh-period signal not to be longer by comparing the fixed-period signal and the variable-period signal TV_OSC that maintain a constant period regardless of the temperature.

On the other hand, the following is a more detailed look at the process of determining the cell refresh cycle in accordance with the change in temperature.

First, it is assumed that the period of the base-cycle signal BS_PRD is shorter than the period of the fixed-cycle signal ST_PRD.

The fixed period signal generator 20 generates a fixed-cycle signal ST_PRD by maintaining a constant period regardless of the change in temperature. In addition, the oscillator 10 generates the base-cycle signal BS_PRD in response to the cycle generation signal OSC_EN. Subsequently, the comparison unit 30 deactivates the adjustment-cycle signal CTRL_PRD since the period of the base-cycle signal BS_PRD is shorter than that of the fixed-cycle signal ST_PRD. Subsequently, the period adjusting unit 40 divides the period of the basic-period signal BS_PRD to generate the refresh-period signal SREF_OSC.

On the other hand, as the temperature gradually decreases, the period of the base-cycle signal BS_PRD becomes longer, and it is assumed that the case is longer than the fixed-cycle signal ST_PRD. Therefore, the comparator 30 outputs the fixed-period signal ST_PRD as the adjustment-period signal CTRL_PRD because the period of the basic-period signal BS_PRD is longer than the period of the fixed-period signal ST_PRD. Subsequently, the oscillator 10 outputs the adjustment-cycle signal CTRL_PRD as the basic-cycle signal BS_PRD in response to the application of the adjustment-cycle signal CTRL_PRD. Subsequently, the period adjusting unit 40 divides the period of the basic-period signal BS_PRD to generate the refresh-period signal SREF_OSC.

For reference, the period of the base-cycle signal BS_PRD varies depending on the process. Therefore, in order to generate the refresh-period signal SREF_OSC having a constant period without being affected by the process at a specific temperature, the period of the base-period signal BS_PRD is divided by the period controller 40. For example, if the period of the refresh-period signal SREF_OSC required at a specific temperature is 24us and the period of the base-period signal BS_PRD is 6us, the period adjuster 40 sets the period of the base-period signal BS_PRD. 4 divided outputs. In addition, if the period of the base-cycle signal BS_PRD is 3us, the period adjuster 40 divides the base-cycle signal BS_PRD by 8 minutes and outputs 24us of refresh-cycle signal SREF_OSC.

As described above, the cell refresh cycle generation device according to the related art outputs the refresh-cycle signal SREF_OSC by adjusting the cycle according to the ambient temperature. Further, when the temperature decreases and the period of the base-cycle signal BS_PRD becomes longer than the fixed-cycle signal ST_PRD having a constant period regardless of the temperature, the fixed-cycle signal ST_PRD is converted into the base-cycle signal BS_PRD. Replace with to generate the refresh-period signal SREF_OSC. As such, the reason for clipping the base-cycle signal BS_PRD is that the temperature is lowered, so that the period of the refresh-cycle signal SREF_OSC generated by the division of the base-cycle signal BS_PRD becomes too long, and thus the cell data. Is to prevent the loss.

On the other hand, when using the prior art, the problem that the cycle of the base-cycle signal (BS_PRD) that is crimped according to the process occurs is not constant, will be described in detail with reference to the drawings.

FIG. 2 is a diagram illustrating a problem of the cell refresh period signal generation device shown in FIG. 1.

Referring to FIG. 2, it can be seen that the period of the refresh-cycle signal SREF_OSC becomes longer as the temperature decreases.

Subsequently, when the temperature falls below a certain point, it can be seen that the period of the refresh-cycle signal SREF_OSC does not become long and becomes constant. As mentioned above, the period of the refresh-cycle signal SREF_OSC is longer than a certain period in order to prevent a phenomenon in which cell data is lost due to a lengthy refresh-cycle signal SREF_OSC that does not operate in a timely manner as the temperature decreases. This is because it is controlled through the comparator 30 so as not to lengthen.

On the other hand, it can be seen that the temperature at which the period is crimped differs depending on how many minutes the refresh-period signal SREF_OSC is generated by dividing the base-period signal BS_PRD. This is because the base-cycle signal BS_PRD is greatly influenced not only by the temperature change but also by the process, while the period of the fixed-cycle signal ST_PRD is hardly affected.

As described above, in the case of using the conventional technology, the period of the crimping timing of the refresh-period signal generated by dividing the main-period signal is greatly influenced by the process variation, so that the current may be changed at low temperatures, and the refresh is failed. This happens.

The present invention has been proposed to solve the above problems of the prior art, and provides an apparatus for generating a cell refresh cycle signal of a semiconductor memory device capable of generating a refresh cycle with a stable period under a small influence on a process and a driving voltage. Its purpose is to.

According to an aspect of the present invention, there is provided a semiconductor memory device, comprising: a fixed period signal generating means for generating a fixed period signal having a fixed period which is not affected by temperature change; Variable period signal generation means for generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; And outputting the variable-cycle signal as a refresh-cycle signal for controlling refresh driving, wherein the fixed-cycle signal is output in a low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal. And crimping means for outputting the refresh-period signal.

According to another aspect of the present invention, there is provided a semiconductor memory device comprising: fixed period signal generating means for generating a fixed period signal having a fixed period which is not affected by temperature change; Variable period signal generation means for generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; Low temperature sensing for detecting a low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal by comparing the period of the variable-cycle signal and the fixed-cycle signal in response to a refresh-command. Way; And outputting the variable-period signal as a refresh-period signal, and outputting the fixed-period signal as the refresh-period signal in the low temperature situation, and always outputting the variable-period signal when the test signal is activated. And selecting means for outputting the periodic signal.

According to still another aspect of the present invention, there is provided a method of driving a semiconductor memory device, the method including: generating a fixed-cycle signal having a fixed period which is not affected by temperature change; Generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; And outputting the variable-cycle signal as a refresh-cycle signal for controlling refresh driving, wherein the fixed-cycle signal is output in a low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal. And a signal output step of outputting the refresh-period signal.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

3 is a block diagram illustrating a semiconductor memory device including a cell refresh cycle generation device according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the cell refresh period signal generation device according to the present invention includes a fixed period signal generation unit 200 for generating a fixed period signal TC_OSC of a fixed period which is not affected by temperature change, and a period generation. In response to the signal OSC_EN, the variable period signal generator 100 for generating the variable-period signal TV_OSC having a variable period due to temperature fluctuation, and the refresh-period signal SREF_OSC for the variable-period signal TV_OSC ) And a crimping unit for outputting the fixed-cycle signal TC_OSC as a refresh-cycle signal SREF_OSC in a low temperature situation in which the variable-cycle signal TV_OSC has a longer period than the fixed-cycle signal TC_OSC. 300).

In addition, the crimping unit 300 compares the period of the variable-period signal TV_OSC and the fixed-period signal TC_OSC in response to the refresh-command SREF_P to detect the low-temperature situation 320. 340 and 360 and the variable-period signal TV_OSC as the refresh-period signal SREF_OSC, and output the fixed-period signal TC_OSC as the refresh-period signal SREF_OSC at low temperature, When activated, a selection unit 380 for always outputting the variable-period signal as the refresh-period signal SREF_OSC is included.

The low temperature sensing unit receives the refresh-command SREF_P and the fixed-cycle signal TC_OSC and outputs a comparison-drive signal UPDT_P indicating the starting point of the period comparison for comparing the periods of the fixed- and variable-cycle signals. A comparison section control section 320 for outputting a comparison section signal CMP indicating a section of the period comparison by receiving the comparison driving control section 320 and the comparison-driving signal UPDT_P and the variable-period signal TV_OSC. And a sensing unit 360 for sensing whether the fixed-period signal TC_OSC is applied during the comparison-period signal CMP to detect a low temperature situation and to generate the low temperature-detection signal CSTPB_P.

That is, the selector 380 may select one of the variable-period signal TV_OSC and the fixed-period signal TC_OSC in response to the comparison-driving signal UPDT_P, the low-temperature sensing signal CSTPB_P, and the test signal CLD_ST_DIS. Select and output the refresh-cycle signal SREF_OSC.

For reference, the comparison driving control unit 320 includes a counter, and activates the comparison-drive signal UPDT_P in response to the refresh-command SREF_P indicating the entry of the cell refresh, and at a predetermined interval, the comparison-drive signal ( UPDT_P) is activated. In order to generate the comparison-driven signal UPDT_P at regular intervals, the fixed-cycle signal TC_OSC that is maintained at a constant period without being influenced by temperature is applied. As described above, the comparison-drive signal UPDT_P activated in response to the activation of the refresh-command SREF_P synchronizes the activation time of the variable-cycle signal TV_OSC and the fixed-cycle signal TC_OSC. This is because the starting points of the two signals must be the same in order to measure the period lengths of the variable-period signal TV_OSC and the fixed-period signal TC_OSC. Although not shown in the drawing, the comparison-drive signal UPDT_P is applied to the fixed period signal generator and the variable period signal generator to reset each block. In addition, since the comparison-driving signal UPDT_P is activated at a predetermined interval, the period comparison between the variable-period signal TV_OSC and the fixed-period signal TC_OSC is continuously performed at that interval.

In addition, the variable-period signal TV_OSC is a signal in which the period increases proportionally as the temperature decreases.

In addition, the low temperature situation is a case where the temperature of the variable-cycle signal TV_OSC is longer than the period of the fixed-cycle signal TC_OSC due to a temperature drop, resulting in a malfunction of the refresh.

Meanwhile, the semiconductor memory device of the present invention described above compares the fixed-period signal TC_OSC and the variable-period signal TV_OSC having a period corresponding to the refresh-period signal SREF_OSC to refresh the selected signal without division. Output directly to the periodic signal SREF_OSC. As such, since the divided signals are compared, the temperature at the time when the refresh-cycle signal SREF_OSC is crimped into the fixed-cycle signal TC_OSC is constant.

Meanwhile, the internal circuit diagram of each block will now be described in detail.

4 is an internal circuit diagram of the comparison section setting unit 340 of FIG. 3.

Referring to FIG. 4, the comparison section setting unit 340 may include a signal input unit 322 for activating its output signal from the activation of the comparison-driving signal UPDT_P to the activation of the variable-period signal TV_OSC; And a latch 324 for inverting and latching the output signal of the signal input unit 322, and an inverter I1 for inverting the output signal of the latch 324 and outputting the inverted signal as the comparison-section signal CMP.

Referring to the operation, the signal input unit 322 in the comparison section setting unit 340 activates the output signal in response to the activation of the comparison-drive signal UPDT_P, the latch 324 inverts and stores it, and the inverter I1. ) Inverts the output of the latch and outputs it as a comparison section signal (CMP). Subsequently, when the variable-period signal TV_OSC is applied, the comparison period signal CMP is deactivated by the signal input unit 322, the latch 324, and the inverter.

As described above, the comparison section setting unit 340 generates the comparison section signal CMP having the activation section from the activation of the comparison-drive signal UPDT_P to the activation of the variable-period signal TV_OSC. . At this time, since the activation time of the variable-period signal TV_OSC is synchronized with the comparison-drive signal UPDT_P, the activation period of the comparison-period signal CMP is equal to the period of the variable-period signal TV_OSC.

As such, the reason for using the period of the variable-period signal TV_OSC as the activation period of the comparison-period signal CMP is to detect whether the fixed-period signal TC_OSC is applied during the activation of the comparison-period signal CMP. This is because it is possible to check whether the period of the variable-period signal TV_OSC is longer than the fixed-period signal TC_OSC. Specifically, before the specific temperature, the activation region of the comparison interval signal CMP is shorter than the period of the fixed-cycle signal TC_OSC, but when the temperature drops to a certain level, the activation of the comparison interval signal CMP is activated. The area is longer than the period of the fixed-cycle signal TC_OSC. Therefore, if the temperature falls below a certain temperature, the application of the fixed-period signal TC_OSC is sensed during the activation of the comparison-period signal CMP.

5 is an internal circuit diagram of the sensing unit 360 of FIG. 3.

Referring to FIG. 5, the sensing unit 360 includes a NAND gate ND1 for receiving a comparison-section signal CMP and a fixed-period signal TC_OSC as an input and outputting the low-temperature detection signal CSTPB_P. .

The detector 360 activates the low-temperature detection signal CSTPB_P to a logic level 'L' when the fixed-cycle signal TC_OSC is activated during the activation period of the comparison-section signal CMP. Here, the comparison-period signal CMP has the same period as the variable-period signal TV_OSC. Thus, the application of the fixed-period signal TC_OSC during the activation of the comparison-period signal CMP means that the period of the variable-period signal TV_OSC is longer than the fixed-period signal TC_OSC. In other words, the period of the variable-period signal TV_OSC becomes longer due to the decrease in temperature, which means that it has a longer period than the fixed-period signal TC_OSC.

That is, the sensing unit activates the low-temperature detection signal CSTPB_P when the period of the variable-cycle signal TV_OSC is longer than the fixed-cycle signal TC_OSC. If the period of the variable-cycle signal TV_OSC is short, the low-temperature detection signal CSTPB_P is deactivated.

6 is an internal circuit diagram of the selector 380 of FIG. 3.

Referring to FIG. 6, the selection unit 380 is initialized in response to the comparison-drive signal UPDT_P and selects a control unit for outputting a selection signal in response to the low-temperature detection signal CSTPB_P and the test signal CLD_ST_DIS. 382 and the first and second transfer gates TG1 for selecting one of the variable-period signal TV_OSC or the fixed-period signal TC_OSC and outputting the refresh-period signal SREF_OSC in response to the selection signal. TG2).

The selection control unit 382 is initialized in response to the comparison-drive signal UPDT_P, and inverts the detection signal input unit 384 and the output signal of the detection signal input unit 384 for receiving the low-temperature detection signal CSTPB_P. And a latch 386 for latching, and an output controller 388 which is controlled by the test signal CLD_ST_DIS and transmits an output signal of the latch 386 to output the selection signal.

Next, the operation of the selector 380 will be described.

First, the case where the low-temperature detection signal CSTPB_P and the test signal CLD_ST_DIS are deactivated will be described.

The sensing signal input unit 384 initializes the output signal to the logic level 'L' when the comparison-drive signal UPDT_P is applied, and then resets the output signal to the logic level 'L' in response to the deactivation of the low-temperature detection signal CSTPB_P. Activate with. Subsequently, the latch 386 inverts and latches the output signal of the sensing signal input unit to output the logic level 'H'. Subsequently, the output controller 388 outputs the selection signal at a logic level 'H' in response to the deactivation of the test signal CLD_ST_DIS and the output signal of the latch 386. Subsequently, the first transfer gate TG1 outputs the variable-period signal TV_OSC as the refresh-period signal SREF_OSC in response to the selection signal.

That is, while the variable-cycle signal TV_OSC has a longer period than the fixed-cycle signal TC_OSC, and the low-temperature detection signal CSTPB_P is deactivated, the variable-cycle signal having a cycle that varies with temperature fluctuations ( TV_OSC) is selected as the refresh-cycle signal SREF_OSC and output.

In addition, the case where the low-temperature detection signal CSTPB_P is activated due to the temperature decrease will be described. At this time, it is assumed that the test signal CLD_ST_DIS is deactivated to the logic level 'L'.

The sensing signal input unit 384 initializes the output signal to a logic level 'L' upon application of the compare-drive signal UPDT_P, and then resets the output signal to a logic level 'H' in response to the activation of the low-temperature detection signal CSTPB_P. Activate with. Subsequently, the latch 386 inverts and latches the output signal of the sensing signal input unit 384 to output the logic level 'L'. Subsequently, the output controller 388 outputs the selection signal at a logic level 'L' in response to the deactivation of the test signal CLD_ST_DIS and the output signal of the latch 386. Next, the second transfer gate TG2 outputs the fixed-period signal TC_OSC as the refresh-period signal SREF_OSC in response to the selection signal.

As described above, when the variable-period signal TV_OSC is longer than the period of the fixed-period signal TC_OSC due to the temperature drop, and the low-temperature detection signal CSTPB_P is activated, the selector 380 may perform the fixed-period signal ( TC_OSC) is output as the refresh-cycle signal SREF_OSC. That is, by outputting the fixed-period signal TC_OSC as a cell refresh signal, the period of the variable-period signal TV_OSC is prolonged due to the temperature drop, thereby preventing the refresh from being performed normally.

In addition, the case in which the test signal CLD_ST_DIS is activated will be described.

The sensing signal input unit 384 outputs an output signal in response to the application of the comparison-driving signal UPDT_P and the low-temperature sensing signal CSTPB_P, and the latch 386 inverts and stores the output signal. However, the output controller 388 always outputs the selection signal to the logic level 'H' in response to the activation of the test signal CLD_ST_DIS, regardless of whether the latch output is 'L' or 'H'. Therefore, the first transfer gate TG1 always outputs the variable-period signal TV_OSC as the refresh-period signal SREF_OSC in response to the logic level 'H' of the selection signal.

That is, when the test signal CLD_ST_DIS is activated, even when the temperature decreases and the period of the variable-cycle signal TV_OSC becomes longer than the fixed-cycle signal TC_OSC, the refresh-cycle signal SREF_OSC is applied to the variable-cycle signal TV_OSC. ) This is used in the test mode for checking the period of the variable-period signal TV_OSC when the cell refresh fail occurs due to the temperature drop. In addition, when the temperature decreases, the cell refresh interval is increased, and the test signal CLD_ST_DIS is activated and controlled even when the stopper operation for maintaining the constant refresh interval is reached when a specific temperature is reached.

Therefore, the selector 380 outputs the fixed-cycle signal TC_OSC as the refresh-cycle signal SREF_OSC when the low-temperature detection signal CSTPB_P is activated, and refreshes the variable-cycle signal TV_OSC when the low-temperature detection signal CSTPB_P is activated. Outputs the periodic signal SREF_OSC. In addition, when the test signal CLD_ST_DIS is activated, the fixed-cycle signal TC_OSC is output as the refresh-cycle signal SREF_OSC.

7 is an operation waveform diagram of the present invention shown in FIGS. 3 to 6, in particular, driving when the period of the variable-period signal TV_OSC becomes longer than the period of the fixed-period signal TC_OSC due to the temperature drop. to be.

As shown in the figure, the comparison driving control unit 320 activates the comparison driving signal UPDT_P by applying the refresh command SREF_P at the time 't1'. Subsequently, the comparison section setting unit 340 activates the comparison section signal CMP in response to the comparison driving signal UPDT_P. Here, the comparison-section signal CMP is deactivated at the time 't3', to which the variable-cycle signal TV_OSC is applied.

Subsequently, the sensing unit 360 detects that the fixed-period signal TC_OSC is applied at a time 't2' at which the comparison-section signal CMP is activated, and activates the low-temperature detection signal CSTPB_P. As mentioned above, since the period of the variable-period signal TV_OSC becomes longer due to the decrease in temperature, the fixed-period signal TC_OSC is applied in the activation period of the comparison-period signal CMP.

Next, the selector 380 outputs the fixed-cycle signal TC_OSC as the refresh-cycle signal SREF_OSC in response to the low-temperature detection signal CSTPB_P. That is, the refresh-cycle signal SREF_OSC is activated at the periodic interval of the fixed-cycle signal TC_OSC.

Thereafter, the comparison driving control unit 320 newly activates the comparison driving signal UPDT_P at a time 't4', which is a certain interval after the activation of the first comparison driving signal UPDT_P. At this time, in order to prevent the activation time of the comparison-drive signal UPDT_P from being equal to the fixed-cycle signal TC_OSC, the activation time is delayed by the period of the fixed-cycle signal TC_OSC. If the comparison-drive signal UPDT_P is activated without a delay time, the activation time of the comparison-drive signal UPDT_P and the fixed-cycle signal TC_OSC are the same, so that the period of the variable-cycle signal TV_OSC is fixed. The cold-detection signal CSTPB_P is always activated and malfunctions regardless of whether it is longer or shorter than the period of the periodic signal TC_OSC.

Subsequently, the operation of the comparison section setting unit 340 or the like by the comparison-drive signal UPDT_P is the same as the above-described process, and thus will not be specifically described.

As described above, the semiconductor memory device including the cell refresh period signal generation device according to the present invention is not affected by the process or temperature by comparing the variable-period signal with the fixed-period signal having a period capable of being output as the refresh-period signal. The period of time when crimping without is constant. In other words, in the related art, since the base-cycle signal was selected by comparing and then divided again to generate a refresh-cycle signal, the temperature at the time of crimping was different due to the temperature or the process and the like. Since the cycles are compared and crimped, the crimping operation is performed at a constant temperature.

Meanwhile, the present invention described above only illustrates a case in which the period of the cell refresh is adjusted according to the temperature, but the idea of the present invention is applicable to all other blocks for varying the cell refresh according to the temperature.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

In the present invention described above, by comparing the final period, the period of the refresh-period signal is crimped at a constant temperature, thereby ensuring stable driving of the device.

Claims (22)

delete Fixed period signal generating means for generating a fixed period signal having a fixed period which is not affected by temperature change; Variable period signal generation means for generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; And The variable-period signal is output as a refresh-period signal for controlling refresh driving, wherein the fixed-period signal is outputted in a low temperature situation in which the period of the variable-period signal is longer than the period of the fixed-period signal. Crimping means for outputting refresh-cycle signals A semiconductor memory device having a. The method of claim 2, The crimping means, A comparison drive controller for receiving a refresh command and the fixed-cycle signal and outputting a comparison-drive signal informing a start point of a period comparison; A comparison section setting unit configured to receive the comparison-drive signal and the variable-cycle signal and output a comparison-section signal informing the section of the period comparison; A sensing unit configured to detect whether the fixed-period signal is applied during activation of the comparison-section signal and to generate a low-temperature detection signal in the low-temperature situation; And selecting one of the variable-period signal and the fixed-period signal to output the refresh-period signal in response to the comparison-drive signal, the low-temperature detection signal, and the test signal. A semiconductor memory device characterized in that. The method of claim 3, And the activation period of the comparison-period signal is equal to the period of the variable-period signal. The method of claim 4, wherein The comparison section setting unit, A signal input unit for activating its output signal from an activation time point of the comparison-drive signal to activation of the variable-cycle signal; A first latch for inverting and latching an output signal of the signal input unit; And a first inverter for inverting the output signal of the first latch and outputting the comparison-section signal. A semiconductor memory device characterized in that. The method of claim 5, The sensing unit includes a NAND gate for outputting the low-temperature detection signal by receiving the comparison-section signal and the fixed-period signal as inputs. A semiconductor memory device characterized in that. The method of claim 6, The selection unit, A selection controller which is activated to the compare-drive signal and outputs a logic level of a selection signal in response to the cold-detection signal and the test signal; A first and second transfer gates for selecting one of the variable-cycle signal or the fixed-cycle signal and outputting the refresh-cycle signal according to a logic level of the selection signal; A semiconductor memory device characterized in that. The method of claim 7, wherein The selection control unit, A detection signal input unit initialized in response to the comparison-drive signal and configured to receive the low-temperature detection signal; A second latch for inverting and storing an output signal of the sensing signal input unit; And an output control part controlled by the test signal to transfer an output signal of the second latch to the selection signal. A semiconductor memory device characterized in that. The method of claim 8, The comparison driving control unit, Generating the comparison-driven signal at a periodic interval of the fixed-cycle signal, including a counter activated by the refresh-command A semiconductor memory device characterized in that. The method according to any one of claims 2 to 9, And the variable-period signal is a signal in which the period increases in proportion to the decrease in temperature. delete Fixed period signal generating means for generating a fixed period signal having a fixed period which is not affected by temperature change; Variable period signal generation means for generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; Low temperature sensing for detecting a low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal by comparing the period of the variable-cycle signal and the fixed-cycle signal in response to a refresh-command. Way; And Outputs the variable-period signal as a refresh-period signal, and outputs the fixed-period signal as the refresh-period signal in the low temperature situation, and always provides the variable-period signal with the refresh-period when the test signal is activated. Selection means for outputting as a signal A semiconductor memory device having a. The method of claim 12, The low temperature detection means, A comparison driving controller for receiving the refresh-command and the fixed-cycle signal and outputting a comparison-drive signal informing a start point of a period comparison; A comparison section setting unit configured to receive the comparison-drive signal and the variable-cycle signal and output a comparison-section signal informing the section of the period comparison; And a sensing unit for sensing whether the fixed-period signal is applied during the activation of the comparison-period signal and activating a low-temperature detection signal in the low-temperature situation. A semiconductor memory device characterized in that. The method of claim 13, And the activation period of the comparison-period signal is equal to the period of the variable-period signal. The method of claim 14, The selection means, A selection controller which is activated by the comparison-drive signal and outputs a selection signal in response to the low-temperature detection signal and the test signal; A first and second transfer gates for selecting one of the variable-cycle signal or the fixed-cycle signal and outputting the refresh-cycle signal according to a logic level of the selection signal; A semiconductor memory device characterized in that. The method of claim 15, The selection control unit, A detection signal input unit initialized in response to the comparison-drive signal and configured to receive the low-temperature detection signal; A second latch for inverting and storing an output signal of the sensing signal input unit; And an output control part controlled by the test signal to transfer an output signal of the second latch to the selection signal. A semiconductor memory device characterized in that. The method of claim 16, The comparison driving control unit, Generating the comparison-driven signal at a periodic interval of the fixed-cycle signal, including a counter activated by the refresh-command A semiconductor memory device characterized in that. The method of claim 17, The comparison section setting unit, A signal input unit for activating its output signal from an activation time point of the comparison-drive signal to activation of the variable-cycle signal; A first latch for inverting and latching an output signal of the signal input unit; And a first inverter for inverting the output signal of the first latch and outputting the comparison-section signal. A semiconductor memory device characterized in that. The method of claim 18, The sensing unit includes a NAND gate for outputting the low-temperature detection signal by receiving the comparison-section signal and the fixed-period signal as inputs. A semiconductor memory device characterized in that. Generating a fixed-cycle signal of a fixed period that is not affected by temperature change; Generating a variable-period signal having a variable period in response to a temperature change in response to the period generation signal; And The variable-period signal is output as a refresh-period signal for controlling refresh driving, and the fixed-period signal is outputted in a low temperature situation in which the period of the variable-period signal is longer than the period of the fixed-period signal. Signal output stage to output as refresh cycle signal Method of driving a semiconductor memory device comprising a. The method of claim 20, The signal output step, A low temperature sensing step of detecting the low temperature situation in which the period of the variable-cycle signal is longer than the period of the fixed-cycle signal in response to a refresh-command; Outputs the variable-period signal as a refresh-period signal, and outputs the fixed-period signal as the refresh-period signal in the low temperature situation, and always provides the variable-period signal with the refresh-period when the test signal is activated. Comprising an optional step for outputting as a signal A method of driving a semiconductor memory device, characterized in that. The method of claim 21, The low temperature detection step, Generating a compare-drive signal informing of a start point of the period comparison in response to the refresh command; Detecting a period of the period comparison by sensing the activation time of the comparison-drive signal to the activation of the variable-period signal; And detecting the low temperature situation by detecting whether the fixed-period signal is applied during the period of the period comparison. A method of driving a semiconductor memory device, characterized in that.

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