KR100824250B1 - Semiconductor package featuring metal lid member - Google Patents

Abstract

In the semiconductor package, the semiconductor chip 12 is mounted on the wiring board or the package board 11. The lead members 141 and 142 define a recess for accommodating the semiconductor chip, and are mounted on the package board so that the semiconductor chip is accommodated in the recess of the lead member. The first adhesive layer 16 is formed on the package board such that the peripheral portions 141B, 141C; 141B, 141C, 141D; 142B of the lead member are adhered onto the package board using the first adhesive layer. The second adhesive layer 17 is formed on the semiconductor chip such that the central portion of the lead member is attached to the semiconductor chip using the second adhesive layer. The following relationship,

25 μm

hd

300㎛

Is set, where "d" is the depth of the recess of the lead member, and "h" is the sum of the thickness of the semiconductor chip and the thickness of the second adhesive layer.

Package board, recess, lead member, adhesive layer

Description

Semiconductor package featuring metal lead members {SEMICONDUCTOR PACKAGE FEATURING METAL LID MEMBER}

1 is a partial cross-sectional view of a semiconductor package of the prior art.

2 is a partial cross-sectional view of a first embodiment of a BGA type semiconductor package according to the present invention;

3A to 3D are explanatory diagrams for explaining a method for manufacturing the BGA type semiconductor package of FIG. 2.

4A is a partial cross-sectional view of the BGA type semiconductor package of FIG. 3D mounted on a motherboard.

4B is a partial cross-sectional view of the BGA type semiconductor package of FIG. 4A due to internal thermal stress.

FIG. 5 is a graph showing the properties of the resin-based adhesive layer used in the BGA type semiconductor package of FIG. 2. FIG.

FIG. 6 is a graph showing another characteristic of the resin-based adhesive layer used in the BGA type semiconductor package of FIG. 2. FIG.

7 is a partial cross-sectional view of a second embodiment of a BGA type semiconductor package according to the present invention.

8 is a partial cross-sectional view of a third embodiment of a BGA type semiconductor package according to the present invention.

9 is a partial cross-sectional view of a fourth embodiment of a BGA type semiconductor package according to the present invention.

* Description of the symbols for the main parts of the drawings *

11: package board 12: semiconductor chip

12A: metal bump 13: resin seal

141: metal lead member 141A: best center portion

141B: skirt portion 141C: flange portion

15: sealing space 16: adhesive layer

17: adhesive layer 18: metal ball

The present invention relates to a semiconductor package including a package board, a semiconductor chip mounted on the package board, and a metal lead member provided on the package board so that the semiconductor chip is sealed with the metal lead member.

For example, as disclosed in JP-2000-150695 A and JP-2001-210761 A, a semiconductor package of the prior art is mounted on a package board or package board, in order to establish an electrical connection therebetween. A semiconductor chip, and a metal lead member mounted on a package board so that the semiconductor chip is sealed with a metal lead member and protects a semiconductor chip.

The metal lead member has a top center portion and a periphery where the top center portion extends, thereby defining a recess for accommodating the semiconductor chip. That is, mounting of the metal lead member onto the package board is performed so that the semiconductor chip is received in the recess of the metal lead member, and the recess of the metal lead member is closed by the package board. The metal lead member is usually produced from a copper (Cu) plate material by using a draw forming process.

At the time of mounting the metal lead member onto the package board, the periphery of the metal lead member is adhered onto the top surface of the package board by using an appropriate resin adhesive. In addition, the uppermost center portion of the metal lead member is adhered to the semiconductor chip by using a silver (Ag) paste exhibiting high thermal conductivity. That is, the metal lead member can be used as a protective material for the semiconductor chip, and the metal lead member functions as a heat radiator for the semiconductor chip.

Next, it can be seen that the above-described prior art semiconductor package has a problem to be solved as will be described later.

Before adhesion of the best center of the metal lead member to the semiconductor chip is ensured, silver (Ag) paste must be applied as a silver paste layer on the semiconductor chip prior to mounting of the metal lead member onto the package board. .

In other words, when a plurality of metal lead members are produced by the draw forming process, the depth of the recess of the metal lead members varies. If the depth of the recess is too large, the best center portion of the metal lead member may not be properly and sufficiently adhered to the semiconductor chip. On the other hand, when the depth of the recess is too small, it is difficult to obtain a large adhesive force between the periphery of the metal lead member and the top surface of the package board by the resin adhesive. These problems are discussed in detail below.

According to the first aspect of the present invention, a package board, a semiconductor chip mounted on the package board, a recess for accommodating the semiconductor chip is defined and mounted on the package board such that the semiconductor chip is received in the recess of the lead member. The lead member being formed, the first adhesive layer formed on the package board such that the periphery of the lead member is adhered onto the package board using the first adhesive layer, and the central portion of the lead member being adhered to the chip using the second adhesive layer. A semiconductor package is provided that includes a second adhesive layer formed on a semiconductor chip.

In a first aspect of the invention, the following relationship, i.e.

h-d

300 ㎛25 μm

hd

300 μm

Is set. Here, "d" is the depth of the recess of the lead member, and "h" is the sum of the thickness of a semiconductor chip and the thickness of a 2nd adhesive bond layer.

According to a second aspect of the present invention, there is provided a package board, a semiconductor chip mounted on the package board, a molded resin enveloper for encapsulating and encapsulating the semiconductor chip, for receiving a molded resin enveloper. A lead member mounted on the package board to define the recess and receive the molding resin envelope in the recess of the lead member, the peripheral portion of the lead member being formed on the package board such that the first adhesive layer is bonded onto the package board A semiconductor package is provided that includes a first adhesive layer to be formed, and a second adhesive layer formed on the molding resin envelope so that a central portion of the lead member is adhered to the molding resin envelope using the second adhesive layer.

In a second aspect of the invention, the following relationship, i.e.

h-d

300 ㎛25 μm

hd

300 μm

Is set. Here, "d" is the depth of the recess of the lead member, and "h" is the sum of the thickness of the molding resin envelope and the thickness of the second adhesive layer.

In the first and second aspects of the present invention, the first adhesive layer is preferably made of a resin-based adhesive exhibiting an elastic modulus in the range of 1 MPa to 3 GPa.

The semiconductor chip may be formed as a flip-chip type semiconductor chip having a plurality of metal bumps bonded to the top surface, and the mounting of the flip-chip type semiconductor chip may be used to establish an electrical connection between the semiconductor chip and the package board. In order to be bonded onto the package board. In this case, a resin seal may be formed to seal the metal bumps between the package board and the flip-chip type semiconductor chip.

The lead member may be formed as a shaped copper plate by a draw molding process.

The periphery of the lead member may include a skirt portion suspended from the peripheral edge of the center portion, and a flange portion extending from the skirt portion. Optionally, the perimeter of the lead member may further comprise a rim protruding from the outer peripheral edge of the flange portion.

Further, the periphery of the lead member may be formed as a thick flange portion suspended from the peripheral edge of the center portion.

The first adhesive layer is preferably made of a resin-based adhesive selected from the group consisting of a silicone-based adhesive and an epoxy-based adhesive. Similarly, the second adhesive layer may be made of a resin-based adhesive, but the second adhesive layer is preferably made of silver paste that exhibits high thermal conductivity.

Hereinafter, the present invention will be more clearly understood from the description described in comparison with the prior art with reference to the accompanying drawings.

Detailed Description of the Preferred Embodiments

Prior to description of embodiments of the present invention, in order to better understand the present invention, as described in JP-2000-150695 A and JP-2001-210761 A described above, a prior art semiconductor package refers to FIG. 1. Will be explained.

Referring to FIG. 1, which is a partial cross-sectional view, a semiconductor package of the prior art is an interposer that may be made of a suitable material such as epoxy-based resin, polyimide-based resin, polyamide-based resin, glass epoxy, ceramic, and the like. Or a package board 11. The package board 11 includes a best wiring pattern layer (not shown) formed on its top surface, an internal wiring pattern layer (not shown) formed therein, and a plurality of bottom electrode pads (not shown) formed on its bottom surface. Have The best wiring pattern layer is properly connected to the internal wiring pattern layer through a plurality of via plugs (not shown) formed in the package board 11, and the internal wiring pattern layer is a plurality of via plugs formed in the package board 11. It connects to a bottom electrode pad via (not shown).

In addition, the semiconductor package of the prior art is formed as a semiconductor chip of flip-chip (FC) type and includes a semiconductor chip 12 mounted on the top surface of the package board 11. In particular, the semiconductor chip 12 of the FC type has a plurality of metal bumps 12A bonded to the uppermost surface thereof. On the other hand, the best wiring layer of the package board 11 has a plurality of electrode pads (not shown) arranged to have a mirror image relationship with respect to the arrangement of the metal bumps 12A. The semiconductor chip 12 of the FC type is mounted upside down over the best wiring pattern layer of the package board 11 so that the metal bumps 12A are aligned with the respective electrode pads and bonded to the electrode pads.

Bonding of the metal bumps 12A to the electrode pads may be performed by a reflow process in which the metal bumps 12A are exposed to hot air. The metal bumps 12A are preferably made of lead-free solder such as eutectic solder, high-temperature solder, tin / silver alloy solder, and the like.

The semiconductor package of the prior art further includes a resin seal 13 filled in the space between the top surface of the package board 11 and the top surface of the FC type semiconductor chip 12, wherein the FC type semiconductor chip ( The side of 12) is covered with a resin seal structure 13. The resin seal structure 13 may be made of a suitable resin material such as silicone-based resin, epoxy-based resin, or the like, and for example, the formation of the resin seal structure 13 is performed by using a resin underfill process. It is possible.

That is, since the FC type semiconductor chip 12 is firmly fixed on the package board 11 by the resin seal structure 13, the metal bump 12A causes the semiconductor package to be affected by thermal stress due to temperature fluctuations. If so, it can be prevented from being damaged or cracked.

Also, in recent years, low-k (e.g., SiOCH) layers exhibiting smaller dielectric constants have been used as insulating layers in semiconductor chips to meet the demands of higher performance and higher speeds, while low-k layers are When the semiconductor package is subjected to thermal stress due to temperature fluctuations, the semiconductor package is likely to peel off. In the case where the FC type semiconductor chip 12 has a low-k layer, it is possible to prevent the peeling action of the low-k layer due to the resin seal structure 13. The resin seal structure 13 should have a high modulus of elasticity of about 10 GPa before the peeling action of the low-k layer is effectively prevented.

In addition, the semiconductor package of the prior art includes a metal lead member 14 provided on the package board 11, so that the FC type semiconductor chip 12 is placed in a sealed space 15 defined between the package board and the metal lead member. Encapsulated. The metal lead member 14 produces | generates a copper (Cu) plate raw material by using the draw molding process so that it may become a shape as shown in FIG. That is, the metal lead member 14 is the skirt portion 14B parallel to the best center portion 14A, the skirt portion 14B completely suspended from the periphery of the best center portion 14A, and the best center portion 14A. A flange portion 14C extending completely from the peripheral edge of the edge. Both the skirt portion 14B and the flange 14C define the periphery of the metal lead member 14.

The metal lead member 14 is bonded to the package board 11 at the flange portion 14C with the adhesive layer 16, and is also bonded to the bottom face of the FC type semiconductor chip 12 with the adhesive layer 17. This defines the sealing space 15 for encapsulating the FC type semiconductor chip 12. That is, the FC type semiconductor chip 12 is protected by the metal lead member 14.

For the adhesive layer 16, it is possible to use a suitable resin adhesive made of a resin substantially the same as the resin seal structure 13. That is, the adhesive layer 16 may be made of a suitable resin adhesive such as a silicone-based resin adhesive, an epoxy-based resin adhesive, or the like. On the other hand, for the adhesive layer 17, since the metal lead member 14 also functions as a heat radiator for the FC type semiconductor chip 12, it is preferable to use a silver (Ag) paste exhibiting high thermal conductivity. . However, if necessary, the adhesive layer 17 may be formed of the same resin adhesive as the adhesive layer 16.

The semiconductor package of the prior art is provided with a plurality of metal balls 18 bonded to respective electrode pads formed on the bottom surface of the package board 11. Each of the metal balls 18 functions as an external electrode terminal and is made of a suitable metal material such as gold (Au), copper (Cu), silver / tin alloy (Ag / Sn), or the like. That is, the semiconductor package is formed as a ball grid array (BGA) type semiconductor package.

In the above-described semiconductor package of the prior art, when the metal lead member 14 is mounted on the package board 11, first, an uncured resin adhesive is applied to the package board 11 for formation of the adhesive layer 16. It is applied on the top surface, and silver paste is applied on the bottom surface of the FC type semiconductor chip 12 for the formation of the adhesive layer 17. Thereafter, the metal lead member 14 is placed in place on the package board 11 and abuts against the silver paste to which the top center portion 14A and the flange portion 14C are applied and the applied resin adhesive, respectively. Thereafter, both the applied resin adhesive and the applied silver paste are baked to be cured and set, respectively, with pressure being appropriately applied on the metal lead member 14, so that the adhesive layers 16 and 17 are formed. do. Thus, the mounting of the metal lead member 14 onto the package board 11 using the adhesive layers 16 and 17 is completed.

However, when the best center portion 14A of the metal lead member cannot be sufficiently attached to the bottom face of the FC type semiconductor chip due to the dimensional variation involved in the generation of the metal lead member 14 by the draw forming process described above. There may be.

In particular, the metal lead member 14 has a recess defined by the best center portion 14A and the skirt portion 14B to accommodate the paste-type adhesive layer 17 and the FC type semiconductor chip 12, The depth "D" of the recess fluctuates upon generation of the metal lead member 14 by the draw forming process.

If the depth "D" of the recess is too large, since the flange portion 14C abuts too close to the uncured resin adhesive 16, the best center portion during the mounting of the metal lead member onto the package board 11. 14A cannot be in firm contact with the applied silver paste 17. As a result, the best center portion 14A cannot fully adhere to the bottom of the FC type semiconductor chip 12 with the adhesive layer 17. Worst of all, there may be a case where the best center portion 14A is even spaced apart from the adhesive layer 17. When sufficient thermal connection is not established between the FC type semiconductor chip 12 and the metal lead member 14, the metal lead member 14 cannot function as a heat radiator.

Since a semiconductor package in which sufficient thermal connection is not established between the FC type semiconductor chip 12 and the metal lead member 14 should be excluded as a defective product, since the adhesive layer 17 cannot be observed outward, It is very difficult and difficult to check whether the best center portion 14A is properly adhered to the bottom of the FC type semiconductor chip 12 with the adhesive layer 17.

On the other hand, when the depth "D" of the recess is too small, the uppermost center portion 14A of the metal lead member 14 can be properly brought into contact with the applied silver paste 17, but the uppermost surface of the package board 11 and the metal The space between the flange member 14C of the lead member 14 becomes larger, and the adhesive layer 16 causes the space between the top surface of the package board 11 and the flange portion 14C of the metal lead member 14 to become greater. It is difficult to obtain large adhesion.

In particular, in general, the uncured resin adhesive used to form the adhesive layer 16 exhibits a relatively large viscosity. In the case where an uncured resin adhesive is applied as a drop on the top surface of the package board 11, the height of the drop is approximately 1/3 of the bottom diameter of the drop. Thus, for example, when the non-cured resin adhesive 16 is applied on the top surface of the package board 11 so that the applied resin adhesive has a width of 1.5 mm, the applied resin adhesive is approximately 500 mu m (0.5). mm).

In this case, the space between the top surface of the package board 11 and the flange portion 14c of the metal lead member 14 is sufficiently filled with an uncured resin adhesive, thereby before obtaining a large adhesive force therebetween. The relevant space should have a height of at most 300 μm.

1st Embodiment

Next, referring to FIG. 2, which is a partial sectional view, a first embodiment of a BGA type semiconductor package according to the present invention is described.

The BGA type semiconductor package is the same as the BGA type semiconductor package of FIG. 1 except that the metal lead member 141 is replaced with the metal lead member 14 of FIG. 1. Similar to the metal lead member 14, the metal lead member 141 is made of a copper (Cu) plate material by using a draw forming process to become a shape as shown in FIG. That is, the metal lead member 141 has the skirt 141B parallel to the best center portion 141A, the skirt portion 141B completely suspended from the periphery of the best center portion 141A, and the best center portion 141A. A flange portion 141C extending completely from the peripheral edge of the edge. In addition, the metal lead member 141 has a thickness in the range of 0.5 mm to 1.0 mm.

The copper (Cu) plate material for producing the metal lead member 141 may be plated with nickel (Ni). It is also possible to use another metal plate material for the copper (Cu) plate material which exhibits physical properties similar to those of copper (Cu).

In FIG. 2, the metal lead member 141 has a depth “d” of the recess defined by the uppermost center portion 141A and the skirt portion 141B, and is of type FC having a paste-like adhesive layer 17. The semiconductor chip has a height "h".

According to the present invention, the metal lead member 141 is relatively characterized by the dimensions "d" and "h". That is, the generation of the metal lead member 141 has the following relationship, that is,

h-d

300 ㎛25 μm

hd

300 μm

Is set.

When the metal lead member 141 is mounted on the package board 11, the thickness "T" of the resin adhesive layer 16 is

T = h-d

It is limited as

As described above, for the formation of the resin adhesive layer 16, when the non-cured resin adhesive 16 is applied on the top surface of the package board 11 so that the applied resin adhesive has a width of 1.5 mm, The applied resin adhesive has a height of approximately 500 μm (0.5 mm). In this case, the space between the top surface of the package board 11 and the flange portion 141C of the metal lead member 141 is sufficiently filled with the non-hardening resin adhesive, thereby obtaining a large adhesive force therebetween. Before doing so, it should have a height of at most 300 μm.

Since the resin adhesive layer 16 is exaggerated and shown in FIG. 2, the dimension of the resin adhesive layer 16 shown is completely inaccurate. In addition, although the thickness of the adhesive layer 17 was shown to be exaggerated, in practice, it is considerably thin compared with the thickness of the resin adhesive layer 16.

On the other hand, in the space between the top surface of the package board 11 and the flange portion 141C of the metal lead member 141, the best center portion 141A of the metal lead member 141 is properly adhered to the adhesive layer 17, Therefore, before establishing sufficient thermal connection between the FC type semiconductor chip 12 and the metal lead member 141, it must have a height of 25 mu m or more.

That is, in the generation of the metal lead member 141, an error from 25 μm to 300 μm is allowed for the depth “d” of the metal lead member 141. As long as the depth “d” of the metal lead member 141 is within an error from 25 μm to 300 μm, sufficient thermal connection is achieved by the adhesive layer 17 and the FC type semiconductor chip 12 and the metal lead member 141. Not only can be sufficiently set in between, but the flange portion 141C of the metal lead member 141 can be appropriately and firmly fixed to the top surface of the package board 11 by the resin adhesive layer 16.

3A-3D, a method of manufacturing the above-described BGA type semiconductor package of FIG. 2 is described.

First, referring to FIG. 3A, which is a partial cross-sectional view, a package board 11 is provided, and the FC type semiconductor package 12 includes a wiring pattern layer (with a metal bump 12A formed on the top surface of the package board 11). The upper and lower sides are mounted upside down on the package board 11 so as to be bonded to each electrode pad included in the package. As already described with reference to FIG. 1, the bonding of the metal bumps 12A to the electrode pads may be performed by a reflow process in which the metal bumps 12A are exposed to hot air.

The resin seal structure 13 is then filled in the space between the top surface of the package board 11 and the top surface of the FC type semiconductor chip 12 and covers the side of the FC type semiconductor chip 12. Is formed. The resin underfill process may be used to carry out the formation of the resin seal structure 13.

Next, referring to FIG. 3B, which is a partial cross-sectional view, an uncured resin adhesive 16 ′ is applied in place on the top surface of the package board 11, and the silver paste 17 ′ is applied to the FC type semiconductor chip 12. It is applied on the bottom.

Next, referring to FIG. 3C, which is a partial cross-sectional view, the metal lead member 141 is placed on the top surface of the package board 11 so that the best center portion 141A and the flange portion 141C of the metal lead member 141 are coated. The silver paste 17 'and the applied resin adhesive 16' are in contact with each other. Subsequently, both the applied resin adhesive 16 'and the applied silver paste 17' are baked to be set and cured, respectively, with the pressure applied on the metal lead member 141 as appropriate, and the adhesive layer ( 16 and 17) are formed. Thus, mounting of the metal lead member 141 onto the package board 11 is completed using the adhesive layers 16 and 17, and the FC type semiconductor chip 12 is mounted with the package board 11 and the metal lead. It is encapsulated in a sealing space 15 defined between the members 141.

At this time, when the adhesive resin layer 16 is within an error from 25 μm to 300 μm, it is mounted on the metal lead member 141 onto the package board 11 using the adhesive layers 16 and 17. This means that it is successful. On the other hand, when the thickness "T" of the adhesive resin layer 16 is out of the range of the error from 25 micrometers to 300 micrometers, it means that a related product is defective. Since the adhesive resin layer 16 can be observed to the outside, it can be very easy to carry out the measurement of the thickness "T" of the adhesive resin layer 16. That is, since it may be easy to check whether the best center portion 14A is properly attached to the bottom of the FC type semiconductor chip 12 using the adhesive layer 17, a defective product can be excluded at low cost. Can be.

Next, referring to FIG. 3D, which is a partial cross sectional view, metal balls 18 are bonded to respective electrode pads formed on the bottom surface of the package board 11 to complete the generation of the BGA type semiconductor package.

Referring to FIG. 4A, which is a partial cross sectional view, a BGA type semiconductor package is mounted on a motherboard 19 of an appropriate piece of electronic equipment, such that each electrode with a metal ball 18 formed on the top surface of the motherboard 19. Bonded on a pad (not shown). Since pieces of electronic equipment may be used in various environments with varying temperatures, BGA-type semiconductor packages are generated in the package board 11 and the metal lead member 141 due to the difference in thermal expansion therebetween. It is subject to internal thermal stress.

As exaggerated in FIG. 4B, which is a partial cross-sectional view, when a BGA type semiconductor package is brought under high temperature, the package has a thermal expansion of the metal lead member 141 that is larger than that of the package board 11. Because of it. At this time, the shear stress is generated in the resin adhesive layer 16. Thus, if the resin adhesive layer 16 exhibits a high modulus of elasticity, the resin adhesive layer 16 may be damaged, and the metal lead member 141 may be removed from the package board 11.

In FIG. 4B, the distance "W" indicates the magnitude of warpage in which the package board 11 is affected, and the thickness of the metal lead member 141 is indicated by the reference numeral "t".

The inventors of the resin adhesive layer 16 when the elastic modulus of the resin adhesive layer is changed in the temperature range of 0 ° C to 125 ° C in (a), (b), (c) and (d) in four cases. A first simulation was performed to see how the maximum shear stress in the chamber changed. In case (a), t = 0.5 mm, and T = 100 μm; In case (b), t = 0.5 mm, and T = 300 μm; In case (c), t = 0.5 mm, and T = 25 μm; In case (d), t = 1.0 mm, and T = 100 μm. It is also assumed that the metal lead member 141 is made of copper (Cu).

The results of the first simulation are shown in the graph of FIG. 5.

As shown in the graph of FIG. 5, in all cases (a), (b), (c), and (d), when the elastic modulus of the resin adhesive layer 16 exceeds 3000 MPa (3GPa), the shear It can be seen that the stress rises sharply. This means that the resin adhesive layer 16 must have a low modulus of elasticity before the resin adhesive layer 16 is prevented from damage.

In addition, from the results of cases (a), (b), and (c), when the thickness "T" of the resin adhesive layer 16 is within an error from 25 µm to 300 µm, and the resin adhesive layer 16 It was found that the shear stress could be significantly reduced when the modulus of elasticity of the s) was less than 3 GPa. On the other hand, from the results of cases (a) and (d), when the thickness "t" of the metal lead member 141 is in the range of 0.5 mm to 1.0 mm, a significant reduction in the shear stress could be obtained. And it was found.

Therefore, in order to prevent the resin adhesive layer 16 from being damaged, the resin adhesive layer 16 should have an elastic modulus of less than about 3,000 MPa.

Further, the inventors, in the same case as described above, in (a), (b), (c), and (d), when the elastic modulus of the resin adhesive layer is changed in a temperature range of 0 ° C to 125 ° C, A second simulation was performed to see how the maximum distance "W" of the package board 11 changes. Similar to the first simulation described above, it is assumed that the metal lead member 141 is made of copper (Cu).

The second simulation result is shown in the graph of FIG.

As shown in the graph of FIG. 6, in cases (a), (b), (c), and (d), when the elastic modulus of the resin adhesive layer 16 is less than 1 MPa (3GPa), the distance "W" It can be seen that does not change at the point slightly above 420㎛. This means that when the elastic modulus of the resin adhesive layer 16 is less than 1 MPa, the metal lead member 141 is not substantially adhered to the package board 11 by the resin adhesive layer 16. That is, it was found that due to the fact that the elastic modulus of the resin adhesive layer 16 was too small (less than 1 MPa), the movement of the metal lead member 141 could not be substantially suppressed. In addition, this characteristic is a condition that the thickness "T" of the resin adhesive layer 16 exists in the error from 25 micrometers to 300 micrometers, and the thickness "t" of the metal lead member 141 is in the range of 0.5 mm-1.0 mm. It does not change under either condition.

Therefore, before the metal lead member 141 having the thickness “t” (0.5 mm to 1.0 mm) is effectively bonded onto the package board 11 by the resin adhesive layer 16, the thickness “T” (25 μm) To 300 μm), it was found that the resin adhesive layer 16 should have an elastic modulus exceeding 1 MPa. It has been found that when the resin adhesive layer 16 has an elastic modulus of more than 3 GPa, the distance "W" is supplied at a limited value.

That is, when the thickness "T" of the resin adhesive layer 16 is in the range of 25 µm to 300 µm, the flange portion 141C of the metal lead member 141 is packaged without damaging the resin adhesive layer 16. Before properly adhering on the board 11, it must have an elastic modulus in the range of 1 MPa to 3 GPa.

For the reasons described above, the resin adhesive layer 16 preferably has an elastic modulus in the range of 1 MPa to 3 GPa, but as long as the thickness "T" of the resin adhesive layer 16 is in the range of 25 µm to 300 µm. Due to the firm adhesion of the best center portion 141A to the bottom of the semiconductor chip 12 of the type, the resin adhesive layer can be sufficiently secured to the fixing of the metal lead member 141 onto the package board 11. The elastic modulus of 16 may be outside the range of 1 MPa to 3 GPa.

2nd Embodiment

Referring to Fig. 7, which is a partial cross sectional view, a second embodiment of a BGA type semiconductor package according to the present invention is shown.

The second embodiment is substantially the same as the first embodiment of FIG. 2 except that the resin seal structure 131 is replaced by the resin seal structure 13. In particular, the resin seal structure 131 is formed on the top surface of the package board 11 as a molding resin envelope, so that the metal bumps 12A and the FC type semiconductor chip 12 are inserted into the molding resin seal envelope 131. Fully sealed and encapsulated. By using the resin delivery molding process, it is possible to carry out the formation of the molding resin seal envelope 131. In addition, the molding resin seal structure 131 may be made of a suitable resin material such as silicone-based resin, epoxy-based resin, or the like.

In the second embodiment, the height "h" is the sum of the thickness of the molding resin thread envelope 131 and the thickness of the adhesive layer 17.

Further, in the second embodiment using the molding resin envelope 131 which encapsulates the FC type semiconductor chip 12 completely, the non-FC type semiconductor chip is replaced with the FC type semiconductor chip 12. It may be.

Third embodiment

Referring to Fig. 8, which is a partial cross sectional view, a third embodiment of a BGA type semiconductor package according to the present invention is shown.

3 embodiment is substantially the same as the first embodiment of FIG. 2, except that the metal lead member 141 is further provided with a rim portion 141D that completely protrudes from the outer peripheral edge of the flange portion 141C. same. Due to the further provision of the rim 141D, it is possible to considerably improve the rigidity of the metal lead member 141, in particular the flange 141c.

In the third embodiment, the skirt portion 141A, the flange portion 141B and the rim portion 141C define the peripheral portion of the metal lead member 141.

If necessary, a metal lead member 141 featuring the rim 141D may be used in the second embodiment of FIG. 7.

Fourth embodiment

9, which is a partial cross sectional view, a fourth embodiment of a BGA type semiconductor package according to the present invention is shown.

The fourth embodiment is substantially the same as the first embodiment of FIG. 2 except that the metal lead member 142 is replaced with the metal lead member 141 of FIG. The metal lead member 142 includes a thick flange portion 142B that is completely suspended from the best center portion 142A and the peripheral edge of the best center portion 142A, the thick flange portion 142B being a resin adhesive. Attached to the top surface of the package board 11 by layer 16.

In the fourth embodiment of FIG. 9, the metal lead member 142 has a top center portion 142A and a thick flange portion 142B so as to accommodate the paste-type adhesive layer 17 and the FC type semiconductor chip 12. It has a recess defined by.

If necessary, the metal lead member 142 may be used in the second embodiment of FIG.

Finally, the foregoing description is a description of preferred embodiments of the package and method, and those skilled in the art will understand that various changes and modifications may be made without departing from the spirit and scope of the invention.

As described above, according to the present invention, the metal lead member can be featured.

Claims (19)

Package board 11; A semiconductor chip 12 mounted on the package board; Lead members (141, 142) defining a recess for receiving the semiconductor chip and mounted on the package board such that the semiconductor chip is received in the recess of the lead member; A first adhesive layer (16) formed on the package board such that peripheral portions (141B, 141C; 141B, 141C, 141D; 142B) of the lead member are adhered to the package board using a first adhesive layer; And A second adhesive layer 17 formed on the semiconductor chip such that the central portions 141A; 142A of the lead member are adhered to the semiconductor chip using a second adhesive layer, The following relationship, 25 μm

hd

300㎛ Is set, wherein "d" is the depth of the recess of the lead member, and "h" is the sum of the thickness of the semiconductor chip and the thickness of the second adhesive layer. The method of claim 1, The first adhesive layer (16) is made of a resin-based adhesive exhibiting an elastic modulus in the range of 1 MPa to 3 GPa. The method of claim 1, The first adhesive layer (16) is made of a resin-based adhesive exhibiting an elastic modulus in the range of 1 MPa to 3 GPa, in a temperature range of 0 ° C to 125 ° C. The method of claim 1, The semiconductor chip 12 is formed as a flip-chip type semiconductor chip having a plurality of metal bumps 12A bonded on the top surface of the semiconductor chip, The mounting of the flip-chip type semiconductor chip is performed such that the metal bumps are bonded onto the package board (11) to establish an electrical connection between the semiconductor chip and the package board (11). The method of claim 4, wherein And a resin seal structure (13) formed to seal the metal bump (12A) between the package board (11) and the flip-chip type semiconductor chip (12). The method of claim 1, The lead member (141) is formed as a shape copper plate by a draw forming process. The method of claim 1, The peripheral portion of the lead member (141) includes a skirt portion (141B) suspended from a peripheral edge of the central portion (141A), and a flange portion (141C) extending from the skirt portion. The method of claim 7, wherein The peripheral portion of the lead member (141) further includes a rim portion (141D; rim protion) projecting from an outer peripheral edge of the flange portion (141C). The method of claim 1, The peripheral portion of the lead member (142) is formed as a flange portion (142B) thicker than the central portion (142A) suspended from the peripheral edge of the central portion (142A). The method of claim 1, The first adhesive layer (16) is made of any one resin-based adhesive selected from the group consisting of a silicone-based adhesive and an epoxy-based adhesive. The method of claim 1, The second adhesive layer (17) is made of any one resin-based adhesive selected from the group consisting of a silicone-based adhesive and an epoxy-based adhesive. The method of claim 1, The second adhesive layer (17) is made of silver paste. Package board 11; A semiconductor chip 12 mounted on the package board; A molded resin enveloper 131 for encapsulating and encapsulating the semiconductor chip; Lead members (141, 142) defined on the package board to define a recess for receiving the molding resin envelope and to allow the molding resin envelope to be received in the recess of the lead member; A first adhesive layer (16) formed on the package board such that peripheral portions (141B, 141C; 141B, 141C, 141D; 142B) of the lead member are adhered to the package board using a first adhesive layer; And A center portion 141A; 142A of the lead member comprises a second adhesive layer 17 formed on the molding resin envelope such that the second adhesive layer is bonded to the molding resin envelope, The following relationship, 25 μm

hd

300㎛ Is set, wherein "d" is the depth of the recess of the lead member, and "h" is the sum of the thickness of the molding resin envelope and the thickness of the second adhesive layer. The method of claim 13, The first adhesive layer (16) is made of a resin-based adhesive exhibiting an elastic modulus in the range of 1 MPa to 3 GPa. The method of claim 13, The first adhesive layer (16) is made of a resin-based adhesive exhibiting an elastic modulus in the range of 1 MPa to 3 GPa, in a temperature range of 0 ° C to 125 ° C. The method of claim 13, The lead member (141) is formed as a shaped copper plate by a draw molding process. The method of claim 13, The peripheral portion of the lead member (141) includes a skirt portion (141B) suspended from a peripheral edge of the central portion (141A), and a flange portion (141C) extending from the skirt portion. The method of claim 17, The peripheral portion of the lead member (141) further includes a rim portion (141D) protruding from an outer peripheral edge of the flange portion (141C). The method of claim 13, The peripheral portion of the lead member (142) is formed as a flange portion (142B) thicker than the central portion (142A) suspended from the peripheral edge of the central portion (142A).

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