KR100774945B1 - Plasma Display Apparatus and Driving Method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device and a method of driving the same, by controlling the intensity of set-down discharge to secure a driving margin and improve image display quality.

The plasma display device according to the present invention includes a plasma display panel including a scan electrode, and a set-down controller for controlling a minimum voltage level of a set-down pulse applied to the scan electrode in a reset period of a first subfield and a second subfield. ; And a set-down pulse in which the lowest voltage level is adjusted to the scan electrode under the control of the set-down control unit, by applying a setup pulse to the scan electrode before the set-down pulse is applied in the reset period of the first sub-field and the second sub-field. And a scan driver for supplying a pulse.

A method of driving a plasma display device according to the present invention includes applying a setup pulse to a scan electrode during a reset period of a first subfield and a second subfield; And applying a setdown pulse having a different lowest voltage level to the scan electrode during the reset period of the first subfield and the second subfield.

According to the present invention, the wall charge distribution inside the discharge cell is adjusted to an appropriate level during the reset period according to the temperature of the subfield, the APL, and the plasma display panel, and the driving margin is secured to secure driving stability and the image display quality. Has the effect of improving.

Description

Plasma Display Apparatus and Driving Method

1 is a diagram showing a subfield pattern of an 8 bit default code for implementing 256 gray scales in a plasma display panel.

2 is a view showing a drive waveform of a conventional plasma display panel.

3 illustrates a plasma display device according to an exemplary embodiment of the present invention.

4 is a diagram illustrating a set down controller of a plasma display device according to an exemplary embodiment of the present invention.

5 illustrates a driving waveform of a plasma display device according to an exemplary embodiment of the present invention.

FIG. 6 illustrates FIG. 5 in more detail for each subfield.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device and a method of driving the same, by controlling the intensity of set-down discharge to secure a driving margin and to improve image display quality.

Plasma Display Panel (hereinafter referred to as " PDP ") is used to excite and emit phosphors using ultraviolet rays generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is discharged. Is displayed. Such PDPs are not only thin and large in size, but also have improved image quality due to recent technology development.

1 is a diagram illustrating a subfield pattern of an 8-bit default code for implementing 256 gray levels in a PDP.

Referring to FIG. 1, the PDP performs time division driving by dividing one frame into several subfields having different emission counts in order to implement grayscale of an image. Each subfield is divided into a reset period for initializing the full screen, an address period for selecting a scan line and selecting a discharge cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. Each of the eight subfields SF1 to SF8 is divided into a reset period RP, an address period AP, and a sustain period SP as described above. In this case, while the reset period RP and the address period AP of each subfield are the same for each subfield, the sustain period and the number of sustain pulses allocated thereto are 2 ⁿ (n = 0,1,2) in each subfield. 3,4,5,6,7).

2 is a diagram illustrating a conventional PDP driving waveform.

Referring to FIG. 2, each of the subfields SF includes a reset period RP for initializing discharge cells of the entire screen, an address period AP for selecting discharge cells, and a sustain for discharging selected discharge cells. It includes a period SP.

In the reset period RP, the rising ramp waveform PR is simultaneously applied to all the scan electrodes Y in the setup period SU. The rising ramp waveform PR causes a weak discharge (setup discharge) to occur in the cells of the entire screen, thereby generating wall charges in the cells. After the rising ramp waveform PR is applied in the set-down period SD, a predetermined slope from the positive sustain voltage Vs lower than the peak voltage of the rising ramp waveform PR to the negative scan voltage (-Vy) is given. The falling ramp waveform NR, which falls down, is applied to the scan electrodes Y simultaneously. The falling ramp waveform NR generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, thereby uniformly retaining wall charges required for address discharges in the cells of the entire screen. .

In the address period AP, the negative scan pulse SCNP is sequentially applied to the scan electrodes Y, and the positive data pulse DP is applied to the data electrodes. As the voltage difference between the scan pulse SCNP and the data pulse DP and the wall voltage generated in the reset period RP are added, an address discharge is generated in the cell to which the data pulse DP is applied. Wall charges are generated in the cells selected by the address discharge.

The bias voltage of the sustain voltage level Vs is applied to the sustain electrodes Z during the set down period SD and the address period AP.

In the sustain period SP, the sustain pulse SUSP is applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the cell selected by the address discharge is in the form of surface discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse SUSP is applied while the wall voltage and the sustain pulse SSUS in the cell are added. Sustain discharge, that is, display discharge for displaying an image, occurs.

In this way, the driving process of the plasma display panel in one subfield is completed.

On the other hand, conventionally, the minimum voltage level of the falling ramp pulse applied to the scan electrode during the set down period is generally fixed to one level.

However, by fixing the minimum voltage level of the falling ramp pulse applied to the scan electrode during the set-down period without considering the driving environment inside and outside of the discharge cell, the wall charge distribution characteristic inside the discharge cell becomes uneven, and accordingly plasma display is performed. There arises a problem that the image display quality of the apparatus is degraded.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display device and a method of driving the same, which secure drive margins and improve image display quality by adjusting the intensity of set-down discharge.

In accordance with another aspect of the present invention, a plasma display device includes a plasma display panel including scan electrodes, and a set down pulse applied to the scan electrodes in a reset period of a first subfield and a second subfield. A set-down control unit controlling the lowest voltage level to be different; And a set-down pulse in which the lowest voltage level is adjusted to the scan electrode under the control of the set-down control unit, by applying a setup pulse to the scan electrode before the set-down pulse is applied in the reset period of the first sub-field and the second sub-field. And a scan driver for supplying a pulse.

The set-down controller selects any one of a plurality of voltage level detectors for detecting a plurality of voltage levels, a control unit for controlling to select one of the plurality of voltage level detectors, and a control signal of the controller. And a selector for selecting the lowest voltage level of the setdown pulse.

The lowest voltage level of the setdown pulse may be different in at least one subfield among the plurality of subfields of one frame.

The lowest voltage level of the setdown pulse is higher in the low gray subfield than in the high gray subfield.

The lowest voltage level of the setdown pulse is higher in the subfield with lower APL than with the subfield with high APL.

The lowest voltage level of the setdown pulse is characterized in that it is higher in a frame with a lower APL than a frame with a high APL.

The lowest voltage level of the setdown pulse is characterized in that it is lowered step by step as the temperature of the plasma display panel is lowered to high temperature, room temperature, low temperature.

The lowest voltage level of the setdown pulse when the temperature of the plasma display panel is low is the same as the lowest voltage level of the scan pulse supplied to the scan electrode during the address period.

The slope of the setdown pulses is variable.

The minimum voltage level is controlled by adjusting the application time of the setdown pulses.

A method of driving a plasma display device according to an exemplary embodiment of the present invention may include applying a setup pulse to a scan electrode during a reset period of a first subfield and a second subfield, and applying a setup pulse to the first subfield and the second subfield. And applying a set down pulse having a different lowest voltage level to the scan electrode during the reset period.

The set down control step includes a plurality of voltage level detection steps for detecting a plurality of voltage levels, and a control step and a control step for controlling to select one of the plurality of voltage levels detected in the plurality of voltage level detection steps. And selecting one of a plurality of voltage levels to select a lowest voltage level of the setdown pulse.

The lowest voltage level of the setdown pulse may be different in at least one subfield among the plurality of subfields of one frame.

The lowest voltage level of the setdown pulse is higher in the low gray subfield than in the high gray subfield.

The lowest voltage level of the setdown pulse is higher in the subfield with lower APL than with the subfield with high APL.

The lowest voltage level of the setdown pulse is characterized in that it is higher in a frame with a lower APL than a frame with a high APL.

The lowest voltage level of the setdown pulse is characterized in that it is lowered step by step as the temperature of the plasma display panel is lowered to high temperature, room temperature, low temperature.

The lowest voltage level of the setdown pulse when the temperature of the plasma display panel is low is the same as the lowest voltage level of the scan pulse supplied to the scan electrode during the address period.

The slope of the setdown pulses is variable.

The minimum voltage level is controlled by adjusting the application time of the setdown pulses.
The lowest voltage level of the scan pulse applied to the scan electrode in the address period of the first subfield and the second subfield is substantially the same.
The maximum voltage level of the setup pulse applied to the scan electrode in the reset period of the first subfield and the second subfield is substantially the same.
The weights of the sustain pulses applied to the sustain period of the first subfield and the second subfield are different from each other.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention;

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3 is a diagram illustrating a plasma display device according to an embodiment of the present invention, and FIG. 4 is a diagram illustrating a set-down control unit of the plasma display device according to an embodiment of the present invention.

As shown in FIG. 3 and FIG. 4, the plasma display device according to an exemplary embodiment of the present invention has a data electrode (X1 to Xm), scan electrodes (Y1 to Yn), and a sustain electrode in a reset period, an address period, and a sustain period. A plasma display panel 300 expressing an image by generating a gas discharge in a discharge space containing an inert gas by applying a predetermined driving pulse to Z, and data electrodes X1 formed on a rear panel (not shown). To Xm) and the lowest voltage level of the set-down pulses applied to the scan electrodes Y1 to Yn according to at least one of the temperature of the data driver 31 and the subfield, the APL, and the plasma display panel 300. A set-down control unit 32 for controlling the control unit, a scan driver 33 for supplying a set-down pulse whose minimum voltage level is adjusted to the scan electrodes Y1 to Yn under the control of the set-down control unit 32, and a front panel panel. A sustain driver 34 for driving the sustain electrode Z formed on a null (not shown), a timing controller 35 for controlling each of the drivers 31, 33, 34, and each of the drivers 31, 33, 34. ) Includes a driving voltage generator 36 supplying a driving voltage.

Hereinafter, functions and operations of each component of the plasma display device according to an exemplary embodiment will be described in detail.

First, although not shown, the plasma display panel 300 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals with a discharge space including an inert gas therebetween. For example, the scan electrodes Y1 to Yn and the sustain electrode Z are formed in pairs, and on the rear panel, the data electrodes are intersected with the scan electrodes Y1 to Yn and the sustain electrode Z. X1 to Xm) are formed.

The data driver 31 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped according to a subfield pattern preset by the subfield mapping circuit is supplied. The data driver 31 samples and latches data under the control of the timing controller 35 and then supplies the data to the data electrodes X1 to Xm.

The setdown controller 32 controls the lowest voltage level of the setdown pulses applied to the scan electrodes Y1 to Yn according to at least one of the temperature of the subfield, the APL, and the plasma display panel during the setdown period during the reset period.

This set-down control unit 32 will be described in more detail with reference to FIG. 4.

4 is a diagram illustrating a set down controller 32 of a plasma display device according to an exemplary embodiment.

As shown in FIG. 4, the set-down controller 32 includes a plurality of voltage level detectors 301 and 302, a controller 303, and a selector 304.

The plurality of voltage level detectors 301 and 302 compare the voltage level Set_dn of the signal input to the-terminal of the comparator with the voltage level (-Vy1 or -Vy2) set at the + terminal to compare the voltage level of the signal input to the-terminal ( When Set_dn exceeds the voltage level (-Vy1 or -Vy2) set at the + terminal, a signal C1 or C2 specifying a plurality of voltage levels (-Vy1 or -Vy2) is output.

The control unit 303 outputs a control signal St for selecting any one of the plurality of voltage level detection units 301 and 302 according to the temperature of the subfield, the APL, and the plasma display panel.

The selector 304 selects any one of the plurality of voltage level detectors 301 and 302 according to the control signal St received from the controller 303 to select the lowest voltage level of the setdown pulse Co. )

The scan driver 33 supplies the setup pulse which gradually rises to the scan electrodes Y1 to Yn during the setup period under the control of the timing controller 35. In addition, a setdown pulse that gradually descends under the control of the timing controller 35 and the setdown controller 32 is applied to the scan electrodes Y1 to Yn during the subsequent setdown period. In this case, the lowest voltage level of the setdown pulse is adjusted by the setdown control signal Co supplied from the setdown control unit 32.

In addition, the scan driver 33 supplies the scan electrodes Y1 to Yn to select a scan line during an address period after a reset pulse including a setup pulse and a set down pulse is supplied to the scan electrodes Y1 to Yn. A scan pulse that falls from the scan reference voltage Vsc and the scan reference voltage Vsc to the negative scan voltage -Vy is applied.

In addition, the scan driver 33 supplies a sustain pulse to the scan electrodes Y1 to Yn to allow sustain discharge to occur in the selected cell in the address period during the sustain period.

The sustain driver 34 supplies a bias voltage having a sustain voltage (Vs) level to the sustain electrode Z during the setdown period and the address period under the control of the timing controller 35, and then the scan driver 33 and the scan driver 33 during the sustain period. Alternatingly, a sustain pulse is supplied to the sustain electrode (Z).

The timing controller 35 receives the vertical / horizontal synchronization signal and generates timing control signals CTRX, CTRY, and CTRZ required for each driver, and transmits the timing control signals CTRX, CTRY, and CTRZ to the corresponding driving units 31, 33, and the like. 34, the respective drive sections 31, 33, 34 are controlled. The timing control signal CTRX applied to the data driver 31 includes a sampling clock for sampling data, a latch control signal, an energy recovery circuit, and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRY applied to the scan driver 33 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the driving switch element in the scan driver 33. The timing control signal CTRZ applied to the sustain driver 34 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the drive switch element in the sustain driver 34.

The driving voltage generation unit 36 includes each driving unit 31 and 33 including a sustain voltage Vs, a setup ramp voltage Vst, a scan reference voltage Vsc, a data voltage Va, and a scan voltage (-Vy). 34 generates various driving voltages required. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

Hereinafter, the operation principle of the plasma display device according to an exemplary embodiment of the present invention will be described in more detail with reference to FIGS. 5 and 6.

5 illustrates a driving waveform of the plasma display device according to an exemplary embodiment of the present invention.

As illustrated in FIG. 5, a plasma display device according to an exemplary embodiment implements an image in a frame unit composed of a combination of a plurality of subfields, and each of the one subfield SF initializes all cells. The operation is divided into a reset period (RP1 or RP2) for the purpose, an address period (AP1 or AP2) for selecting the cell to be discharged, and a sustain period (SP) for maintaining the discharge of the selected cell.

Hereinafter, the voltage applied to each period and its function will be described in detail.

First, in the reset period RP1 or RP2, in the setup period SU, a gradually rising setup pulse PR is simultaneously applied to all the scan electrodes Y1 to Yn, and the sustain electrode Z and the data electrodes are simultaneously applied. (X1 to Xm) maintains the ground.

Due to the setup pulse PR, a weak dark discharge occurs in the discharge cells of the entire screen. By the setup discharge, positive wall charges are accumulated on the data electrodes X1 to Xm and the sustain electrode Z, and negative wall charges are accumulated on the scan electrodes Y1 to Yn.

During the subsequent set-down periods SD1 and SD2, all scan electrodes Y1 to Yn start at the sustain voltage Vs and fall to a constant slope to a voltage level (-Vy1 or -Vy2) lower than the sustain voltage Vs. When the set-down pulse NR is applied simultaneously and a bias voltage having a positive sustain voltage Vs level is applied to the sustain electrode Z, the positive wall charges of the data electrodes X1 to Xm are maintained as they are. By discharging the positive wall charge of the sustain electrode Z by a discharge between the electrode Z and the scan electrodes Y1 to Yn, a large amount of the negative charge accumulated in the scan electrodes Y1 to Yn is removed. The sustain electrode Z and the data electrodes X1 to Xm are divided. By this set down discharge, the wall charges such that the address discharge can stably occur remain uniformly in the cells.

In this case, the lowest voltage level of the setdown pulse NR is at least any of the temperatures of the subfield, APL, and plasma display panel, in consideration of the fact that the wall charge distribution inside the discharge cell varies according to the temperature of the subfield, the APL, and the plasma display panel. There is a feature of the invention in that it is controlled according to one.

Preferably, the lowest voltage level of the setdown pulse is different in at least one subfield. In this way, the discharge cells are initialized uniformly in response to the nonuniformity of the wall charge distribution in the discharge cells generated after subfields having different gray scale weights having different numbers of sustain pulses are terminated.

The lowest voltage level of the setdown pulse is preferably higher in the low gray subfield than in the high gray subfield. This will be described with reference to FIG. 6, which shows each subfield in more detail. Referring to FIG. 6, the lowest voltage level (-Vy1) of the setdown pulse in the low gray subfield 2nd SF is set down in the high gray subfield 7th SF. Supply after adjusting higher than minimum voltage level (-Vy2) of pulse. This is because the amount of negative charges formed on the scan electrode Y after the first subfield 1st SF ends is less than the amount of negative charges formed on the scan electrode Y after the sixth subfield 6th SF ends. To compensate for the small points, set down pulse in the second subfield (2nd SF) is lowered only to -Vy1 volt higher than -Vy2 volt, which is the lowest voltage level of the setdown pulse in the seventh subfield (7th SF). The wall charge distribution state inside the discharge cell at the start of the address period of the field 2nd SF and the seventh subfield 7th SF is equalized.

On the other hand, in consideration of the fact that the wall charge distribution inside the discharge cell varies according to different APLs for each subfield or frame, the lowest voltage level of the setdown pulse is higher in a subfield or frame having a lower APL than in a subfield or frame having a high APL. It is preferable that the lowest voltage level of the set-down pulse be -Vy1 when APL is low and -Vy2 when APL is high.

The minimum voltage level of the setdown pulse is preferably lowered step by step as the temperature of the plasma display panel is lowered to high temperature, room temperature, and low temperature. In other words, in consideration of the wall charge loss that occurs when the plasma display panel is at a high temperature of about 50 ° C. or higher, in the case of a high temperature, the setdown pulse may be used to relatively reduce the intensity of the setdown discharge to reduce the wall charge cancellation amount. Adjust the minimum voltage level relatively high compared with the case of room temperature, and increase the wall charge elimination amount by relatively strengthening the strength of the set-down discharge in the case of the low temperature to prevent the bright spot mis-discharge during the subsequent address period. For this purpose, the minimum voltage level of the setdown pulse is adjusted relatively low compared to the case of room temperature.

The minimum voltage level of the setdown pulse when the temperature of the plasma display panel is low is preferably equal to the minimum voltage level of the scan pulse supplied to the scan electrode during the address period. In this manner, the voltage source for supplying the setdown pulse and the scan pulse is common to reduce the manufacturing cost of the plasma display device.

It is preferable that the slope of the setdown pulses is variable, and it is preferable to adjust the lowest voltage level of the setdown pulses by adjusting the application time of the setdown pulses. In this way, the on / off timing of the switching elements is adjusted to easily adjust the lowest voltage level of the setdown pulses according to the driving environment.

Next, in the address period AP1 or AP2, the scan reference is applied to the data pulse DP and the scan electrodes Y1 to Yn, which rise from the ground GND to the data electrodes X1 to Xm to the positive data voltage Va. When the scan pulse SCNP falling from the voltage Vsc to the negative scan voltage -Vy is synchronized and applied, the voltage difference between the data electrodes X1 to Xm and the scan electrodes Y1 to Yn, and a reset period The address discharge occurs as the wall voltage between the data electrodes X1 to Xm and the scan electrodes Y1 to Yn due to the wall charges formed during RP1 or RP2 is added.

On the other hand, in the sustain electrode Z, the voltage difference with the scan electrodes Y1 through Yn is reduced during the address period AP1 or AP2 so that the misdischarge with the scan electrodes Y1 through Yn does not occur so that the positive sustain voltage Vs level is maintained. A bias voltage with

Next, in the sustain period SP, a sustain pulse SUSP that rises from the ground GND to the sustain voltage Vs is applied to the scan electrodes Y1 to Yn and the sustain electrode Z alternately. The cell selected by the address discharge has a sustain discharge, i.e., between the scan electrodes Y1 to Yn and the sustain electrode Z every time the sustain pulse SSUS is applied as the wall voltage and the sustain pulse SSUS in the cell are added. Display discharge occurs.

In this way, the driving process of the plasma display device according to the exemplary embodiment of the present invention in one subfield is completed.

As described above in detail, the plasma display device according to an embodiment of the present invention adjusts the minimum voltage level of the set-down pulse to more precisely adjust the wall charge distribution in the discharge cell, thereby securing stable driving and Improve image display quality.

Since the driving method of the plasma display device according to an embodiment of the present invention is driven under the same principle as the plasma display device according to an embodiment of the present invention described in detail above, the detailed description is directed to the plasma display device according to an embodiment of the present invention. Replace with the description.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the following claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be construed as being included in the scope of the present invention.

As described in detail above, according to the present invention, the wall charge distribution inside the discharge cell is adjusted to an appropriate level during the reset period according to the temperature of the subfield, the APL, and the plasma display panel.

In addition, the driving margin is secured to secure driving stability.

In addition, there is an effect of improving the image display quality.

Claims (26)

delete delete delete delete A plasma display panel including a scan electrode; A set-down controller configured to control the lowest voltage level of the set-down pulses applied to the scan electrodes in the reset period of the first subfield and the second subfield; And The set-down pulse is applied to the scan electrode before the set-down pulse is applied in the reset period of the first sub-field and the second sub-field, and the lowest voltage level is adjusted to the scan electrode under the control of the set-down control unit. Scan drive to supply Including; The set down control unit A plurality of voltage level detectors for detecting a plurality of voltage levels; A control unit controlling to select any one of the plurality of voltage level detection units; And A selection unit for selecting one of the plurality of voltage level detection units according to a control signal of the control unit to select the lowest voltage level of the set down pulse; Including; And the lowest voltage level of the setdown pulse is higher in a subfield having a lower APL than in a subfield having a high APL. A plasma display panel including a scan electrode; A set-down controller configured to control the lowest voltage level of the set-down pulses applied to the scan electrodes in the reset period of the first subfield and the second subfield; And The set-down pulse is applied to the scan electrode before the set-down pulse is applied in the reset period of the first sub-field and the second sub-field, and the lowest voltage level is adjusted to the scan electrode under the control of the set-down control unit. Scan drive to supply Including; The set down control unit A plurality of voltage level detectors for detecting a plurality of voltage levels; A control unit controlling to select any one of the plurality of voltage level detection units; And A selection unit for selecting one of the plurality of voltage level detection units according to a control signal of the control unit to select the lowest voltage level of the set down pulse; Including; And the lowest voltage level of the set down pulse is higher in a frame having a lower APL than in a frame having a high APL. delete delete The method according to claim 5 or 6, And the slope of the setdown pulses is variable. The method of claim 9, And controlling the lowest voltage level by adjusting an application time of the setdown pulses. delete delete delete delete Applying a setup pulse to the scan electrode during the reset period of the first subfield and the second subfield; And Applying a setdown pulse having a different lowest voltage level to the scan electrode during a reset period of the first subfield and the second subfield; Including; The set down control step A plurality of voltage level detection steps for detecting a plurality of voltage levels; A control step of controlling to select any one of the plurality of voltage levels detected in the plurality of voltage level detection steps; And A selection step of selecting one of the plurality of voltage levels under the control of the control step to select the lowest voltage level of the setdown pulse; Including; And the lowest voltage level of the set down pulse is higher in a subfield having a lower APL than in a subfield having a high APL. Applying a setup pulse to the scan electrode during the reset period of the first subfield and the second subfield; And Applying a setdown pulse having a different lowest voltage level to the scan electrode during a reset period of the first subfield and the second subfield; Including; The set down control step A plurality of voltage level detection steps for detecting a plurality of voltage levels; A control step of controlling to select any one of the plurality of voltage levels detected in the plurality of voltage level detection steps; And A selection step of selecting one of the plurality of voltage levels under the control of the control step to select the lowest voltage level of the setdown pulse; Including; And the lowest voltage level of the set down pulse is higher in a frame having a lower APL than in a frame having a high APL. delete delete The method according to claim 15 or 16, And the slope of the setdown pulses is variable. The method of claim 19, And controlling the lowest voltage level by adjusting an application time of the setdown pulses. delete delete delete delete delete delete

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