KR20070027052A - Plasma display apparatus and driving method thereof - Google Patents

Abstract

A plasma display apparatus and a driving method thereof are provided to improve contrast by controlling a scan driver to supply two reset waveforms to a scan electrode during a rest period of sub-field having a low weight value. A plasma display apparatus includes a plasma display panel(500), a scan driver(503), and a control unit(501). A scan electrode is formed in the plasma display panel. The scan driver drives the scan electrode. The control unit controls the scan driver and supplies two rest waveforms to the scan electrode during a reset period of sub-fields having a low weight value. The low weight value sub-fields are from the sub-field having the lowest weight value to a fourth sub-field.

Description

Plasma Display Apparatus and Driving Method Thereof

1 is a diagram showing the structure of a typical plasma display panel.

2 is a diagram illustrating a method of implementing image gradation of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

4 is a view for explaining an optical waveform generated when a conventional plasma display panel is low temperature.

5 is a view for explaining a plasma display device of the present invention.

6 is a view showing a driving waveform in accordance with the driving method of the plasma display panel of the present invention;

FIG. 7 illustrates an example in which the number of reset waveforms is adjusted to a subfield having the lowest weight in the method of driving a plasma display panel according to the present invention; FIG.

8 is a view for explaining an example of adjusting the number of reset waveforms from the subfield having the lowest weight in the method of driving a plasma display panel according to the present invention.

FIG. 9 is a view for explaining an example of differently adjusting peak voltages of two reset waveforms in the method of driving a plasma display panel of the present invention; FIG.

FIG. 10 is a view for explaining an example in which any one of two reset waveforms in the driving method of the plasma display panel of the present invention is adjusted to be a rising ramp pulse; FIG.

FIG. 11 is a view for explaining a different application time of a reset waveform in the method of driving a plasma display panel according to the present invention; FIG.

12 is a view for explaining an optical waveform generated when the plasma display panel of the present invention is low temperature.

<Explanation of symbols for the main parts of the drawings>

500: plasma display panel 501: control unit

502: data driver 503: scan driver

504: sustain driver 505: drive voltage generator

The present invention relates to a plasma display device and a driving method thereof. More particularly, the present invention relates to a plasma display device and a driving method thereof capable of stably initializing a discharge cell when driving the plasma display panel to prevent erroneous discharge.

In general, a plasma display panel is a partition wall formed between a front panel and a rear panel to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 illustrates a structure of a general plasma display panel.

As shown in FIG. 1, a plasma display panel includes a front panel in which a plurality of sustain electrode pairs formed by pairing a scan electrode 102 and a sustain electrode 103 are arranged on a front glass 101 that is a display surface on which an image is displayed. The rear panel 110 on which the plurality of address electrodes 113 are arranged so as to intersect the plurality of sustain electrode pairs on the back glass 111 forming the back surface 100 and the rear surface is coupled in parallel with a predetermined distance therebetween. .

The front panel 100 is made of a scan electrode 102 and a sustain electrode 103, that is, a transparent electrode (a) formed of a transparent ITO material and a metal material to mutually discharge and maintain light emission of the cells in one discharge cell. The scan electrode 102 and the sustain electrode 103 provided as the bus electrode b are included in pairs. The scan electrode 102 and the sustain electrode 103 are covered by one or more upper dielectric layers 104 that limit the discharge current and insulate the electrode pairs, and to facilitate the discharge conditions on the upper dielectric layer 104 top surface. A protective layer 105 on which magnesium oxide (MgO) is deposited is formed.

The rear panel 110 is arranged such that a plurality of discharge spaces, that is, barrier ribs 112 of a stripe type (or well type) for forming discharge cells are maintained in parallel. In addition, a plurality of address electrodes 113 which perform address discharge to generate vacuum ultraviolet rays are arranged in parallel with the partition wall 112. On the upper side of the rear panel 110, R, G, and B phosphors 114 which emit visible light for image display during address discharge are coated. A lower dielectric layer 115 is formed between the address electrode 113 and the phosphor 114 to protect the address electrode 113.

A method of implementing image gradation in the plasma display panel having such a structure is shown in FIG. 2.

2 is a diagram illustrating a method of implementing image grayscale of a conventional plasma display panel.

As shown in FIG. 2, in the conventional method of expressing a gray level of a plasma display panel, a frame is divided into several subfields having different number of emission times, and each subfield is a reset period (RPD) for initializing all cells again. ) Is divided into an address period APD for selecting a cell to be discharged and a sustain period SPD for implementing gradation according to the number of discharges. For example, when displaying an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. 2, and eight subfields. Each of the SFs SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

The reset period and the address period of each subfield are the same for each subfield. The address discharge for selecting the cell to be discharged is caused by the voltage difference between the address electrode and the transparent electrode which is the scan electrode. The sustain period is increased at a rate of 2 ⁿ ( ^where n = 0, 1, 2, 3, 4, 5, 6, 7) in each subfield. In this way, since the sustain period is different in each subfield, the gray scale of the image is expressed by adjusting the sustain period of each subfield, that is, the number of sustain discharges.

A driving method of a conventional plasma display panel according to the general image gray scale representation method is as follows in FIG. 3.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

As shown in Fig. 3, the plasma display panel erases the reset period for initializing all the cells, the address period for selecting the cells to be discharged, the sustain period for maintaining the discharge of the selected cells, and the wall charges in the discharged cells. It is divided into an erase period for driving.

In the reset period, the rising ramp waveform Ramp-up is applied to all the scan electrodes at the same time in the setup period. This rising ramp waveform causes weak dark discharge within the full discharge cells. By this setup discharge, positive wall charges are accumulated on the address electrode and the sustain electrode, and negative wall charges are accumulated on the scan electrode.

During the set-down period, after the rising ramp waveform is supplied, the falling ramp waveform (Ramp-down) starts to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and falls to a specific voltage level below the ground (GND) level voltage. By generating a weak erase discharge in the inside, the wall charges excessively formed in the scan electrode are sufficiently erased. By this set-down discharge, wall charges such that the address discharge can stably occur remain uniformly in the cells.

In the address period, the negative scan pulses are sequentially applied to the scan electrodes, and the positive data pulses are applied to the address electrodes in synchronization with the scan pulses. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the reset period are added, address discharge is generated in the discharge cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when the sustain voltage Vs is applied. The sustain electrode is supplied with a positive polarity voltage Vz during the set down period and the address period so as to reduce the voltage difference with the scan electrode so as to prevent mis-discharge with the scan electrode.

In the sustain period, a sustain pulse Su is applied to the scan electrode and the sustain electrodes alternately. In the cell selected by the address discharge, as the wall voltage and the sustain pulse in the cell are added, a sustain discharge, that is, a display discharge, occurs between the scan electrode and the sustain electrode every time the sustain pulse is applied.

On the other hand, in the plasma display panel operated on the driving waveform according to the driving method, when the temperature around the panel decreases, for example, an excessive optical waveform occurs when the temperature is lower than the room temperature.

4 is a view for explaining an optical waveform generated when the conventional plasma display panel is low temperature.

As shown in FIG. 4, surface discharge occurs due to the voltage applied to the scan electrode Y and the voltage applied to the sustain electrode Z during the above-mentioned reset period of the plasma display panel, and at the same time, an optical waveform is generated. . Such light waves are weakly generated when the panel temperature is room temperature, so that bright spots do not occur. Such bright spots are caused by the strong generation of optical waveforms during the reset period. When the bright spots occur, the contrast characteristics deteriorate. On the other hand, when the temperature of the panel is low, the light wave is strongly generated and many bright spots are generated. The reason why such bright spots are generated is that wall charges formed in the discharge cells and the charges in the space are unstable.

As described above, if the surface discharge caused by the voltage applied to the scan electrode and the sustain electrode during the reset period becomes unstable as the temperature is lowered, bright spots occur and affect the contrast characteristics. There is a problem that the image quality of the display panel is deteriorated.

In order to solve this problem, an object of the present invention is to provide a plasma display device and a driving method thereof for supplying two reset waveforms to a scan electrode during a reset period of a low-weight subfield.

Plasma display device of the present invention for achieving the above object

And controlling a scan driver and a scan driver to drive the plasma display panel on which the scan electrodes are formed and to supply two reset waveforms to the scan electrodes during the reset period of the low-weight subfield.

In addition, the low-weight subfield is characterized in that the subfield from the lowest weight to the fourth subfield.

In addition, the peak voltages of the two reset waveforms are different from each other.

In addition, the peak voltage of the reset waveform supplied temporally among the two reset waveforms is higher than the peak voltage of the reset waveform supplied later.

In addition, one of the two reset waveforms is characterized in that it comprises a rising ramp pulse.

In addition, only the reset waveform supplied in time among the two reset waveforms includes a rising ramp pulse.

In addition, the application time of the two reset waveforms supplied to the scan electrode is different.

In addition, the application time of the reset waveform supplied in time among the two reset waveforms is longer than the application time of the reset waveform supplied later.

Hereinafter, embodiments of a plasma display device and a driving method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a view for explaining a plasma display device of the present invention.

As shown in FIG. 5, the plasma display apparatus of the present invention includes a data driver 502, a scan driver 503, a sustain driver 504, and a controller 501 for applying a driving pulse with the plasma display panel 500. It includes a drive device including a.

For example, in the plasma display apparatus of the present invention, a driving pulse is applied to the address electrodes X1 to Xm, the scan electrodes Y1 to Yn, and the sustain electrode Z in the reset period, the address period and the sustain period as shown in FIG. A plasma display panel 500 representing an image made of a frame by a combination of at least one subfield, and a data driver for supplying data to address electrodes X1 to Xm formed in the plasma display panel 500. 502, a scan driver 503 for driving the scan electrodes Y1 to Yn, a sustain driver 504 for driving the sustain electrodes Z serving as a common electrode, and a plasma display panel 500 for driving the scan electrodes 503. The control unit 501 for adjusting the size of the reset waveform by controlling the scan driver 503 at the time and supplying driving voltages to the driving units 502, 503, and 504. And a driving voltage generator 505. The

As described above, the plasma display apparatus of the present invention includes at least one subfield of a plurality of subfields in which at least one frame is supplied to the address electrode, the scan electrode, and the sustain electrode in the reset period, the address period, and the sustain period. In the low gray level subfield, a predetermined control signal is applied to the scan driver 503 such that the number of reset waveforms applied to the scan electrodes in the reset period is larger than that of other subfields.

Here, the above-described plasma display panel 500 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, a plurality of electrodes, for example, the scan electrodes (Y1 to Yn) and the sustain The electrodes Z are formed in pairs, and the address electrodes X1 to Xm are formed to intersect the scan electrodes Y1 to Yn and the sustain electrode Z.

The data driver 502 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped to each subfield is supplied by the subfield mapping circuit. The data driver 502 samples and latches data in response to a data timing control signal from a timing controller (not shown), and then supplies the data to the address electrodes X1 to Xm.

The scan driver 503 supplies the reset waveform adjusted to the scan electrodes Y1 to Yn during the reset period under the control of the controller 501. In addition, the scan driver 503 sequentially supplies the scan pulse Sp of the scan voltage (-Vy) to the scan electrodes Y1 to Yn during the address period, and supplies the sustain pulse su to the scan electrodes during the sustain period. It supplies to (Y1-Yn).

The sustain driver 504 supplies a bias voltage of the sustain voltage Vs to the sustain electrodes Z during a period in which a ramp ramp down occurs under the control of a timing controller (not shown) and an address period. Alternatingly with the scan driver 503 during the sustain period, the sustain pulse su is supplied to the sustain electrodes Z.

The controller 501 controls the scan driver 503 by generating a predetermined control signal for controlling the operation timing and synchronization of the scan driver 503 in the reset period and supplying the timing control signal to the scan driver 503. Of course, in one or more subfields among a plurality of subfields in which one frame is divided, a predetermined control signal such that the number of reset waveforms applied to the scan electrode in the reset period is larger than that of other subfields in the reset period. Is applied to the scan driver 503.

The driving voltage generator 505 generates a setup voltage Vsetup, a scan common voltage Vscan-com, a scan voltage -Vy, a sustain voltage Vs, a data voltage Vd, and the like. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

The function of the plasma display device of the present invention of FIG. 5 will be more apparent in the following driving method.

Looking at the various embodiments of the driving method performed by the plasma display device of the present invention having such a structure as follows.

6 is a view showing a driving waveform in accordance with the driving method of the plasma display panel of the present invention.

As shown in Fig. 6, in the initialization period, a rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the set-up period. Discharge occurs. By this setup discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y.

On the other hand, in the set down period, after the rising ramp waveform is supplied, the ramp ramp starts to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and falls to the base voltage GND or the specific voltage level of the negative ramp ramp. -down causes a slight erase discharge in the discharge cells, thereby partially erasing the excessively formed wall charge. However, the discharge cells initialized through one set-up period and the set-down period do not accumulate (or charge) an appropriate amount of wall charges so as to be suitable for address discharge for selecting subsequent cells, or to all discharge cells. The uniform wall charges may not be charged, causing bright spots to occur during the reset period, resulting in a decrease in contrast characteristics, as well as a cause of erroneous discharge in driving periods such as subsequent address and sustain periods.

To this end, in the present invention, in one or more of the plurality of subfields forming one frame of the reset waveform having the rising ramp waveform (Ramp-up) and falling ramp waveform (Ramp-down) in the setup period and the set-down period Plural numbers are applied to drive the plasma display panel. That is, in the present invention, in the reset period of all subfields, only one reset waveform is applied to initialize the discharge cells, whereas in the present invention, at least one reset waveform is applied and initialized in any one of the subfields. .

According to this, a plurality of rising ramp waveforms (Ramp-up) and falling ramp waveforms (Ramp-down) constituting one reset waveform is supplied to the scan electrode during the reset period, so that charge and discharge of wall charges are generated two or more times in succession. As a result, compared to the case where one reset waveform is supplied, it is possible to prevent bright spots and mis-discharge of the reset period due to wall charge deficient charging and disproportionate charging between discharge cells.

The driving method of the plasma display panel according to the present invention of FIG. 6 will be more clearly shown in FIG. 7.

FIG. 7 illustrates an example in which the number of reset waveforms is adjusted to a subfield having the lowest weight in the method of driving a plasma display panel according to the present invention.

As illustrated in FIG. 7, one frame 1Frame includes eight subfields (first to eighth subfields), and each subfield has a different gray value according to different weights. That is, the first to eighth subfields each have gray level values of 1, 2, 4, 8, 16, 32, 64, and 128, respectively.

One frame has a plurality of subfields as described above, and a plurality of reset waveforms is supplied in a reset period of at least one or more of the subfields, and in the example of FIG. 7, two reset waveforms are provided in a first subfield. One reset waveform was supplied from the second to eighth subfields. That is, the number of reset waveforms of the first subfield for expressing a relatively low gray level is greater than the number of reset waveforms for other subfields for representing a relatively high gray level. This means that if the number of reset waveforms applied in the first subfield having the lowest weight is relatively low, the distribution of wall charges in the discharge cells is not uniform, leading to bright spots during the reset period, resulting in poor contrast characteristics and subsequent address discharges. This instability causes address jitter to deteriorate, and subsequent sustain discharges become unstable.

According to the driving method of the plasma display device according to the present invention, as shown in FIG. 7, as the number of reset waveforms is increased in the first subfield having the number of reset waveforms, the wall of each discharge cell is initialized when the discharge cells are initialized. This prevents the charge from being insufficiently charged or deteriorates the uniformity of the wall charge charging between the respective discharge cells, and also suppresses the occurrence of bright spots during the reset period. Thus, the address discharge characteristics in the address period are improved, and the sustain period is further improved. It is possible to improve the sustain discharge retention characteristics at.

In the example according to FIG. 7, two reset waveforms are applied only to the first subfield, and the second subfield to the eighth subfield are used to prevent the occurrence of bright spots and false discharges. Although one reset pulse is controlled to be applied to the subfields of the prior art, more reset waveforms may be supplied to more subfields. An example of adjusting the number of reset waveforms from the lowest weighted subfield in the method of driving the plasma display panel according to the present invention of FIG. 7 will be more apparent from FIG. 8.

8 is a view for explaining an example of adjusting the number of reset waveforms from the subfield having the lowest weight in the method of driving the plasma display panel according to the present invention.

As illustrated in FIG. 8, one frame 1Frame includes eight subfields (first to eighth subfields), and each subfield has a different gray value according to different weights. That is, the first to eighth subfields each have gray scale values of 1, 2, 4, 8, 16, 32, 64, and 128, but the low-weight field is the fourth subfield indicating a single digit value.

One frame has a plurality of subfields as described above, and a plurality of reset waveforms are supplied during a reset period of at least one or more subfields, and in the example of FIG. 8, the first subfield to the fourth subfield. In this case, two reset pulses were supplied, and one reset waveform was supplied in the fifth to eighth subfields. That is, the number of reset waveforms of the first to fourth subfields for relatively low gray level is greater than the number of reset waveforms for other subfields for relatively high gray level. If the number of reset waveforms applied from the first subfield having the lowest weight to the fourth subfield is small, the distribution of wall charges in the discharge cells is not uniform, resulting in a bright point during the reset period, resulting in deteriorated contrast characteristics. Subsequent address discharges become unstable and address jitter deteriorates, and subsequent sustain discharges become unstable.

According to the driving method of the plasma display apparatus of the present invention, as shown in FIG. 8, as the number of reset waveforms is increased from the first subfield having the number of reset waveforms to the fourth subfield, the first subfield is increased. It is more effectively prevented that the wall charge of each discharge cell is insufficiently charged or the wall charge charging uniformity between each discharge cell is deteriorated at the time of initializing the discharge cells. Therefore, the address discharge characteristic in the address period is further improved, and the sustain discharge sustaining characteristic in the sustain period is further improved. Therefore, preferably, two reset waveforms are applied from the first subfield to the fourth subfield, and one reset waveform is applied to the subfields from the fifth subfield to the eighth subfield as in the prior art. It is to control the brightness point to improve the contrast characteristics and to prevent the occurrence of false discharge.

In the above, the method of suppressing the occurrence of bright spots and preventing mis-discharge by adjusting the number of application of the reset waveform from the subfield having the lowest weight has been described. In addition, in the present invention, as can be seen in FIG. 9, contrast characteristics are improved by adjusting the peak value voltage of the reset waveform differently.

9 is a view for explaining an example of differently adjusting the peak voltage voltage of the two reset waveforms in the method of driving the plasma display panel of the present invention.

As shown in FIG. 9, one frame 1Frame consists of eight subfields, and each subfield has a different gray value according to different weights.

One frame has a plurality of subfields as described above, two reset waveforms are supplied to the first subfield, and one reset waveform is supplied to the second to eighth subfields. The peak voltages of the two reset waveforms supplied to the first subfield described above are different from each other, and the peak voltage of the reset waveform supplied in time is higher than the peak voltage of the reset waveform supplied later. As described above, when the ramp-up of the reset waveforms of the reset waveforms in the first subfield are equal to each other, but the peak voltages are different so that the ramps of the same slope have the same ramp, the two reset waveforms described above have the same peak voltage. The contrast characteristic is improved due to the voltage difference of the above-described reset waveform than when the circuit has a. Also, it will be clearer from the following FIG. 10 that the reset waveform of either of the two reset waveforms becomes the rising ramp pulse.

FIG. 10 is a view for explaining an example in which one reset waveform of two reset waveforms is adjusted to be a rising ramp pulse in the method of driving a plasma display panel of the present invention.

As shown in FIG. 10, one of the two reset waveforms described above includes a rising ramp pulse, but only a reset waveform supplied in time among the two reset waveforms described above becomes a rising ramp pulse. For example, when the reset waveform supplied first in time becomes a rising ramp pulse and the subsequent waveform becomes a square pulse, it is more easily controlled when the control unit controls the scan driver. That is, the above-described control unit controls the rising ramp pulse supplied first in time and then controls the following square pulse, so that when the square pulse reaches a specific voltage, the controller only needs to maintain the above-described specific voltage for a predetermined time. It is easier to control the ramp pulse and, in addition, the contrast characteristic is also improved due to the voltage difference between the rising ramp pulse and the square pulse. Further, different application times of the two reset waveforms supplied to the scan electrodes described above will be made clear by the following FIG. 11.

11 is a view for explaining the different application time of the reset waveform in the driving method of the plasma display panel according to the present invention.

As shown in FIG. 11, the application time of the two reset waveforms supplied to the scan electrodes are different from each other, and the application of the reset waveform supplied later is applied to the application time of the reset waveform supplied in time earlier among the two reset waveforms. Longer than time As described above, even if the application time of the reset waveform is short, the above-mentioned peak voltage is the same, but the slope of the ramp-up of the above-described reset waveform becomes larger as the application time is shorter. When the inclination of the rising ramp increases, strong discharge is generated to prevent the wall charge of each discharge cell from being insufficiently charged or the uniformity of the wall charge charging between the discharge cells.

As described above, by adjusting two reset waveforms supplied to the scan electrode during the reset period, the wall charge charging uniformity between the discharge cells is more effectively prevented, thereby preventing the bright spots generated during the reset period. It will be clearer.

12 is a view for explaining an optical waveform generated when the plasma display panel of the present invention is low temperature.

FIG. 12 compares the two reset waveforms supplied to the scan electrodes described above with reference to FIG. 4, that is, adjusts the peak voltage of one of the two waveforms, adjusts the rising ramp pulse, or applies the two waveforms. Through various embodiments, such as different point of view, even when the temperature is lower than room temperature and becomes low, the wall charge of each discharge cell is insufficiently charged or the wall charge charging uniformity between each discharge cell is more effectively prevented. This indicates that the bright spots generated during the reset period are suppressed.

 As described above, after the reset waveforms are supplied to initialize the respective discharge cells in the reset period, the negative polarity scan pulse Scan is sequentially applied to the scan electrodes Y in the address period, and at the same time, the address electrode is synchronized with the scan pulse. The positive data pulse data is applied to the field X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, address discharge is generated in the discharge cell to which the data pulse is applied. In the discharge cells selected by the address discharge, wall charges such that a discharge can occur when a sustain voltage is applied are formed.

On the other hand, a waveform having a predetermined positive voltage is applied to the sustain electrode Z during the reset period. The voltage value of the positive pulse applied to the sustain electrode Z in the reset period has almost the same value as the sustain voltage Vs. In addition, a positive pulse applied to the sustain electrode Z in the reset period exists within a period of the ground GND level existing between two reset waveforms applied to the scan electrode Y. FIG. The sustain electrode Z is supplied with a positive polarity DC voltage so as to reduce the voltage difference with the scan electrode Y during the address period so that erroneous discharge with the scan electrode Y does not occur.

In the sustain period, a sustain pulse Su is applied to the scan electrodes Y and the sustain electrodes Z alternately. In the discharge cell selected by the address discharge, the sustain voltage, that is, the display discharge, is generated between the scan electrode Y and the sustain electrode Z every time the sustain pulse is applied as the wall voltage and the sustain pulse in the discharge cell are added. After the sustain discharge is completed, a ramp waveform (Ramp-ers) having a small pulse width and a low voltage level is supplied to the sustain electrode Z to erase the wall charge remaining in the discharge cells of the full screen.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described above in detail, the driving apparatus and driving method of the plasma display panel according to the present invention adjust the two reset waveforms supplied to the scan electrodes during the reset period even when the panel temperature is lower than room temperature so that the wall charges of the respective discharge cells are adjusted. Is more effectively prevented from insufficiently charging or deteriorating the wall charge charging uniformity between the respective discharge cells, thereby suppressing bright spots generated during the reset period, thereby improving contrast characteristics.

Claims (8)

A plasma display panel on which scan electrodes are formed; A scan driver to drive the scan electrode; The control unit controls the scan driver to supply two reset waveforms to the scan electrode during the reset period of the low-weight subfield. Plasma display device comprising a. The method of claim 1, And the subfield having the low weight is a subfield from the lowest subfield to the fourth subfield.  The method of claim 1, And the peak voltages of the two reset waveforms are different from each other. The method of claim 3, And the peak voltage of the reset waveform supplied temporally among the two reset waveforms is higher than the peak voltage of the reset waveform supplied later. The method of claim 1, And one of the two reset waveforms includes a rising ramp pulse. The method of claim 5, And only the reset waveform supplied in time among the two reset waveforms includes rising ramp pulses. The method of claim 1, And an application time of the two reset waveforms supplied to the scan electrodes is different. The method of claim 7, wherein Wherein the application time of the reset waveform supplied in time earlier of the two reset waveforms is longer than the application time of the reset waveform supplied later.

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