KR100772646B1 - Semiconductor package - Google Patents

Abstract

A semiconductor package is provided to improve a heat radiating property of the semiconductor package by coupling a varistor in a substrate with a ground electrode by using a heat transfer member. A semiconductor package includes a substrate having a LED(Light Emitting Device) mounting region and first and second pattern electrodes(18,20). An LED is mounted on the LED mounting region. A varistor layer is included in the substrate. First and second inner electrodes(24,26) are formed with the varistor layer between them. A heat transfer member(22) is embedded under the LED mounting region. A third inner electrode(28), a portion of which is overlapped with the first and the second inner electrodes, is formed in the varistor layer. A heat radiating electrode(30), which is exposed to a bottom surface of the substrate, is formed at a bottom surface of the heat transfer member.

Description

Semiconductor Package {Semiconductor package}

1 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention;

FIG. 2 is an enlarged view of a portion “A” of FIG. 1;

3 is an exploded perspective view of the inside of the varistor material layer of FIG. 1;

4 is a diagram illustrating an SMD surface of the semiconductor package of FIG. 1.

<Description of Symbols for Major Parts of Drawings>

10: LED chip 12: lower substrate

14: upper substrate 16: wire

18, 20: pattern electrode 22: thermosetting fluid

24: first internal electrode 26: second internal electrode

28: third internal electrode 30: heat emitting electrode

33: reflector

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a semiconductor package in which heat dissipation and ESD protection are performed.

A light emitting diode is a semiconductor device capable of realizing various colors by forming a light emitting source by changing compound semiconductor materials such as GaAs, AlGaAs, GaN, InGaN, and AlGaInP, and when a forward bias voltage is applied to an electrode, It is a diode that emits visible light of a wavelength determined by.

Currently, light emitting diodes have advantages such as low power, high efficiency, high brightness, and long life, and thus are widely used in packaged form for electronic components.

Thermal stress is one of the biggest causes of characteristic deterioration and failure in semiconductor packages using such light emitting diodes. When the LED elements are directly mounted on the same substrate with high density and used as signal lamps or lighting equipment, the LED elements emit more heat, and the amount of heat dissipation tends to increase in proportion to the total light emitting area.

In particular, the blue LED has a relatively high driving voltage compared to other high-brightness LED, so the temperature increases. Furthermore, the larger the area of the lighting equipment, the more densely mounted the LED elements will be, the worse the characteristics of LED deterioration and the occurrence of failure. However, the existing light emitting devices are not good heat dissipation characteristics, there is a limit to mounting a high density LED device in a large area.

On the other hand, the light emitting diode has a disadvantage of being vulnerable to static electricity or reverse voltage. Therefore, because the LED chip employed in the LED package is weak against static electricity and reverse voltage, a Zener diode is connected in parallel with the LED chip and used for countermeasure of static electricity and reverse voltage.

However, a method of integrally packaging a Zener diode in parallel with an LED chip has problems such as space limitation due to an additional process, an increase in the number of processes and an increase in size due to additional mounting, and an increase in manufacturing cost.

In addition, due to side effects such as scattering and refraction of light generated in the LED chip by the Zener diode placed on the same plane as the LED chip, it has been limited in the effective control of the direction angle or light. Thus, a method of increasing the static resistance of the LED chip itself for efficient use of light, a method of embedding a zener diode in a separate cavity, and the like are used. The latter method is advantageous in light efficiency or directivity over the former method, but has a disadvantage in that the manufacturing process is complicated and expensive.

In addition, in the field of automobiles, in addition to the heat generated from the LED chip, heat generated from other components (for example, an engine) becomes a problem, and thus a structure capable of emitting heat directly under the LED chip from the substrate is desired. The situation is required to insulate the anode / cathode electrodes.

The present invention has been proposed in view of the above-described conventional circumstances, and an object thereof is to provide a semiconductor package capable of protecting an LED chip from static electricity and reverse voltage while maximizing a heat dissipation effect.

In order to achieve the above object, a semiconductor package according to a preferred embodiment of the present invention, in the semiconductor package comprising a substrate on which a light emitting device mounting region is mounted and the first and second pattern electrodes are formed,

A varistor material layer is included in the substrate, and first and second internal electrodes are formed with the varistor material layer interposed therebetween.

A thermosetting fluid is embedded below the light emitting device mounting area of the substrate, and the thermosetting fluid includes a third internal electrode in which a part of the varistor material is overlapped with the first and second internal electrodes. A bottom surface of the substrate is characterized in that the heat-emitting electrode is exposed to the bottom surface of the substrate.

The thermosetting fluid is made of a slug made of a metal body of Cu, CuW, CuMo, or a slug coated with a metal material on ceramics of AlN, BN, BeO.

One end of the first internal electrode is connected to the first pattern electrode, and one end of the second internal electrode is connected to the second pattern electrode.

The heat dissipation electrode is a ground electrode, and the heat dissipation electrode is insulated with respect to the first and second pattern electrodes.

In addition, a heat dissipation groove or a heat dissipation hole may be further formed on one surface of the heat dissipation electrode.

Hereinafter, a semiconductor package according to an embodiment of the present invention will be described with reference to the accompanying drawings. Hereinafter, an LED package will be described as an optimal embodiment. The semiconductor package of the present invention may be applied to all SMD type packages such as ceramic packages, plastic packages, lead frame type packages, and plastic + lead frame type packages.

1 is a cross-sectional view of a semiconductor package according to an exemplary embodiment of the present invention, FIG. 2 is an enlarged view of a portion “A” of FIG. 1, and FIG. 3 is an exploded perspective view of the inside of the varistor material layer of FIG. 1. 4 is a diagram illustrating an SMD surface of the semiconductor package of FIG. 1.

The semiconductor package of the embodiment of the present invention, the LED chip 10; A lower substrate 12 on which the LED chip 10 is mounted; An upper substrate 14 disposed on the lower substrate 12 and having a cavity formed in an area corresponding to a region in which the LED chip 10 is mounted; Pattern electrodes 18 and 20 formed on the lower substrate 12 and connected to the LED chip 10 through wires 16; And a reflector 32 installed along the inner surface of the cavity of the upper substrate 14 to surround the LED chip 10.

The material of the upper substrate 14 may include alumina, quartz, calcium zirconate, forsterite, SiC, graphite, fused silica, and mullite. ), Cordierite, zirconia, beryllia, aluminum nitride, low temperature co-fired ceramic (LTCC), and plastics. The lower substrate 12 may also be the same as the material of the upper substrate 14 described above.

The pattern electrodes 18 and 20 are formed of an anode electrode 18 and a cathode electrode 20 formed to be spaced apart from each other. The anode electrode 18 and the cathode electrode 20 usually consist of an Ag / Ni / Ag (Au) layer.

The anode electrode 18 is formed on one upper surface of the lower substrate 12 so as to be spaced apart from each other for electrical insulation from the cathode electrode 20. In addition, the anode electrode 18 is also formed on the bottom surface of the lower substrate 12, the anode electrode 18 formed on the bottom surface of the lower substrate 12 is an anode electrode formed on the upper surface of the lower substrate 12 ( 18 may be extended or may be electrically connected to the anode electrode 18 formed on the upper surface of the lower substrate 12.

The cathode electrode 20 is formed in the opposite direction to the anode electrode 18 and is formed as in the description of the anode electrode 18. Of course, if necessary, the anode electrode 18 may be a cathode electrode and the cathode electrode 20 may be replaced with an anode electrode. In this case, the driving power application method may be reversed.

The inner surface of the cavity of the upper substrate 14 is provided with a reflecting plate 32, in order to allow the light emitted from the side of the LED chip 10 is reflected from the reflecting plate 32 to emit light to the front surface The inclination angle of the cavity of (14) is approximately 0 to 45 degrees. Preferably, the reflective plate 32 may be manufactured separately and installed on the inner surface of the cavity of the upper substrate 14 by a silicon-based bonding material. Alternatively, when using a low temperature co-fired ceramic (Low Temperature Co-fired Ceramic) method, the reflector 32 is a low temperature co-fired ceramic after printing 2 to 20 microns Ag on the ceramic surface After sintering by a method, 2 to 10 microns of Ni is plated on the Ag sintered surface, and then 2 to 10 microns of Ag (Au) is plated again. When sintering by low temperature co-fired ceramic method, it starts at 25 ℃ and increases by 2 ℃ / min and reaches 830 ~ 900 ℃. It keeps about 20 minutes and then drops by 2 ℃ / min and reaches 25 ℃. do. The above mentioned plating and firing conditions are general and there are some differences depending on the composition and additives.

On the other hand, the lower end of the reflecting plate 32 is slightly spaced apart from the anode electrode 18 and the cathode electrode 20, which is to insulate the reflecting plate 32 and the electrodes 18, 20 of the LED chip 10 In order to prevent the light emitted from the side surface from being absorbed (leaked) into the body of the upper substrate 14, the smaller the spacing is, the better. Of course, you can get rid of it.

The lower substrate 12 includes a varistor layer VS. In the lower substrate 12, the metallic first inner electrode 24 and the second inner electrode 26 are formed in parallel with each other with the varistor layer VS interposed therebetween. One end of the first internal electrode 24 is connected to the anode electrode 18, and one end of the second internal electrode 26 is connected to the cathode electrode 20. Here, the first inner electrode 24 and the second inner electrode 26 are preferably made of the same material. The first internal electrode 24 may be integrally formed with the first pattern electrode 18, and the second internal electrode 26 may be integrally formed with the second pattern electrode 20.

Meanwhile, a conductive thermal fluid 22 having a size larger than that of the LED chip 10 is vertically buried under the light emitting device mounting region of the lower substrate 12 to penetrate the lower substrate 12. The thermofluid 22 is insulated from the first and second pattern electrodes 18 and 20. The thermosetting fluid 22 is a Cu slug or a slug having a high thermal conductivity such as CuW or CuMo and a low thermal expansion coefficient of the metal, or a metal material having excellent electrical conductivity to a ceramic having excellent thermal conductivity such as AlN, BN, BeO, or the like. Made of coated slug. The cross-sectional shape of the thermoelectric fluid 22 may be formed in a circle, a square, a polygon, or the like.

In the central portion of the thermofluid 22, a third metallic third internal electrode 28 overlapping the first and second internal electrodes 24 and 26 in the varistor layer VS is formed. Is formed. In addition, a metal heat emission electrode 30 exposed to a bottom surface of the lower substrate 12 is formed on a bottom surface of the thermoelectric fluid 22. The heat dissipation electrode 30 is used as a ground electrode.

In addition, a heat dissipation groove 30a as shown in FIG. 2 may be formed on one surface (lower surface) of the heat dissipation electrode 30 to maximize the heat dissipation effect. That is, the flow of air into the heat dissipation groove 30a is naturally induced or heat is quickly exhausted through the heat dissipation groove 30a, thereby maximizing the heat dissipation effect. The shape of the heat dissipation groove 30a may be any shape as long as it is a shape that can maximize the heat dissipation effect such as a hemispherical shape, a recess shape, and the like. In addition, although shown as the heat dissipation groove 30a in FIG.

The varistor material layer VS has a structure in which at least three sheets are stacked. That is, as shown in FIG. 3A, the first sheet 40, the second sheet 44, and the third sheet 42 are stacked. It is assumed that the thermodynamic fluid 22 is cylindrical. The first sheet 40 has a circular hole 40a (a hole through which the thermal fluid 22 penetrates) is formed at the center thereof, and the first inner electrode 24 is patterned to a predetermined length from one end to the other end. . One end of the first internal electrode 24 is connected to the anode electrode 18. The second sheet 44 is formed at the center thereof with a circular hole 44a having the same diameter as that of the hole 40a and is opposite from the first inner electrode 24 to the second inner side from the other end to one side end. The electrode 26 is patterned to a predetermined length. The other end of the second internal electrode 26 is connected to the cathode electrode 20. The third sheet 42 is formed at the center thereof with a circular hole 42a having the same diameter as that of the hole 40a (a hole through which the thermal fluid 22 penetrates) and surrounds the hole 42a. The electrode 28 is patterned, the third inner electrode 28 is patterned smaller than the size of the sheet 42.

The patterned shape of the internal electrodes 24, 26, 28 described above may be square, not rectangular, as shown in FIG. And, if necessary, when the first and second internal electrodes 24 and 26 are to be made longer, as shown in (b) of FIG. 3, one end or not the center of one end or the center of the other end, The other end may move to any one of the corner portions that are in contact with each other. When moved to one of the corner portions, the first and second internal electrodes 24 and 26 are horizontally patterned in the diagonal directions. For example, in FIG. 3B, the first inner electrode 24 is patterned a predetermined length from one corner portion of the sheet to an opposite corner portion located in the lengthwise opposite direction, and the second inner electrode 26 may be The predetermined length is patterned from the other edge portion of the sheet to the opposite edge portion located opposite in the longitudinal direction, and the third internal electrode 28 is roughly the same as the third internal electrode 28 in FIG.

In FIG. 3, a third sheet 42 is laminated on the second sheet 44 and the first sheet 40 is laminated on the third sheet 42. The bottom surface (ie, SMD surface) of the semiconductor package including the varistor material layer VS is as illustrated in FIG. 4.

On the other hand, although not shown in the figure, the Ag epoxy cream having excellent thermal conductivity and adhesion is interposed between the LED chip 10 and the thermosetting fluid 30. Such Ag epoxy has a thermal conductivity of about 4 W / mK or less, which acts as a thermal resistance in a high-power LED chip. The Ag epoxy is applied to the LED chip 10 for quick bonding and thermal conductivity between the LED chip 10 and the thermal fluid 22. By forming a structure capable of eutectic bonding, the heat generated from the LED chip 10 can be quickly transferred to the thermofluid 22 and can be released through the thermofluid 22. In addition, since the adhesion to the bonding interface is excellent, peeling of the LED chip 10 due to the difference in thermal expansion coefficient between the LED chip 10 and the thermosetting fluid 22 is prevented.

In addition, the thermal fluid 22 having a size larger than that of the LED chip 10 is placed directly under the LED chip 10 so that the position receives the heat from the LED chip 10 first and foremost. This is because it is a position, so as to quickly dissipate a large amount of heat through the thermal fluid (22).

On the other hand, the varistor material (VS) in the lower substrate 12 may be manufactured by LTCC, Al ₂ O ₃ , ZnO-based varistors, respectively, preferably ZnO-based varistors are best. This is because varistors of ZnO series have the highest thermal conductivity. Therefore, when the ZnO-based varistor material is manufactured, it not only functions as a varistor but also rapidly lowers the temperature of the semiconductor package due to the high thermal conductivity of the varistor itself. Of course, the lower substrate 12 may be made of a varistor substrate having a high thermal conductivity.

In FIG. 1, the portion where the first internal electrode 24 and the third internal electrode 28 overlap and the portion where the second internal electrode 26 and the third internal electrode 28 overlap may be understood as varistors. Accordingly, the varistor voltage at the lower substrate 12 is determined by the distance between the first inner electrode 24 and the third inner electrode 28 and between the second inner electrode 26 and the third inner electrode 28. The capacitance increases in proportion to the distance, and the capacitance is a portion where the first inner electrode 24 and the third inner electrode 28 overlap and the second inner electrode 26 and the third inner electrode 28 overlap. It increases in proportion to the size of the area of the part. That is, the characteristics of the varistor can be adjusted by using an interval between the first and second internal electrodes 24 and 26 and the third internal electrode 28 and an overlapping area, and the characteristics of the internal electrodes 24, 26 and 28 can be adjusted. By increasing the number it is possible to adjust the capacity of the varistor. In FIG. 1, one varistor is formed on the left side and one varistor is formed on the right side of the thermoelectric fluid 22. However, the number of internal electrodes is not limited and may be changed according to desired characteristics and capacity of the varistor. Do.

In FIG. 1, when an electrostatic or reverse voltage is input through, for example, the anode electrode 18, the input electrostatic or reverse voltage is converted into the first internal electrode 24, the third internal electrode 28, and the thermal fluid 22. Is removed by the heat emitting electrode 30 (used as the ground electrode).

On the contrary, when the electrostatic or reverse voltage is input through the cathode electrode 20, the input electrostatic or reverse voltage is transmitted through the second internal electrode 26, the third internal electrode 28, and the thermal fluid 22. 30 is used as the ground electrode.

That is, when static electricity or a reverse voltage (that is, an overvoltage above a specific voltage) is input to the anode electrode 18 and / or the cathode electrode 20, the first internal electrodes 24 and the third almost all currents exhibit the varistor function. LED chip because the internal electrode 28 and / or the second internal electrode 26 and the third internal electrode 28 flow through the thermofluid 22 to the heat dissipation electrode 30 (used as the ground electrode). 10 is protected. The following table shows the data measured in HBM mode of 1500Ω, 100pF.

(table)

     Test condition break down voltage before break down voltage after Luminescence Characteristics (Number of samples: 7 each)    2KV 10times      11.68 V      12.55 V   LED glows    4KV 10times      11.93 V      20.61 V   LED glows    8KV 10times      11.96 V      13.58 V   LED glows

In the case of a general substrate without a zener diode, the LED is damaged when the 2KV is applied, but the semiconductor package according to the present invention can be seen that the LED is emitted even when 2KV, 4KV, and 8KV are applied. Of course, in the case of a general substrate with a zener diode, the LED is not damaged even if 2KV is applied, but the above table shows that ESD protection can be sufficiently performed using the semiconductor package of the present invention without using the zener diode. Able to know.

Although not shown in FIG. 1, silicon (or epoxy) may be filled after the LED chip 10 is mounted in the cavity of the upper substrate 14. Thus, the LED chip 10 is protected by silicon even if static electricity or the like is introduced through the air.

The process for manufacturing the semiconductor package of the present invention described above will be briefly described as follows. The manufacturing process described below may be viewed as any one of various methods of manufacturing the semiconductor package of the present invention. It is assumed that both the upper substrate 14 and the lower substrate 12 are made of varistor material in consideration of heat dissipation.

First, in the case of the upper substrate 14, for example, about eight sheets of a sheet having a thickness of about 100 µm are laminated, and then a cavity is formed by a method such as punching or processing.

In the case of the lower substrate 12, the pattern electrodes 18 and 20 to which the LED chip 10 is bonded are printed on a separate sheet (not shown), and the first sheet 40 and the second sheet as shown in FIG. Each of the internal electrodes 24, 26, 28 is printed on the set 44, the third sheet 42. Then, the heat-emitting electrode 30 capable of SMD is printed on a separate sheet (not shown). At this time, the printed electrodes 18, 20, 24, 26, 28, 30 are printed using AgPd paste. Then, after stacking the sheets with the printed electrodes 18, 20, 24, 26, 28, 30, the holes for the thermofluid 22 are punched out.

Thereafter, the upper substrate 14 is laminated on the lower substrate 12 and co-sintering is performed. Sintering conditions start at 25 degrees and rise to 3 degrees / minute up to 400 degrees, and hold at 400 degrees for 4 hours to remove the binder component contained in the sheet, then rise to 4 degrees / minute up to 1050 degrees and then at 1050 degrees 2 After holding for about an hour, the temperature is lowered to 25 degrees at 2 degrees / minute to complete the sintering. The sintering conditions mentioned above are general and may vary slightly depending on the composition and additives.

Thereafter, Ni and Ag are plated in the cavity of the upper substrate 14 through electroplating to form the reflecting plate 32. The process for forming the reflecting plate 32 has already been described.

On the other hand, the present invention is not limited only to the above-described embodiment, but can be modified and modified within the scope not departing from the gist of the present invention, the technical idea to which such modifications and variations are also applied to the claims Must see

As described in detail above, according to the present invention, the electrical characteristics of the varistor are provided on the lower substrate to effectively prevent static electricity without mounting or embedding a separate zener diode.

And, through the thermal conductivity and thermal fluid of the varistor itself, the heat emitted from the LED device is quickly released.

In particular, the flow of air into the heat dissipation groove or the heat dissipation hole formed on the bottom surface of the thermofluid is naturally induced, thereby maximizing the heat dissipation effect.

In addition, as a separate ground electrode is added to the two pattern electrodes (anode electrode and cathode electrode) and the varistor inside the substrate is combined with the ground electrode through a thermofluid, the heat dissipation effect is maximized and ESD can be effectively It can be prevented.

In the past, when a Zener diode is mounted, a process such as die attach and wire bonding for mounting the Zener diode should be added, and the bonded wire may cause interference with light of the LED chip. In the present invention, since the varistor is present in the substrate as part of a conventional substrate manufacturing process, the manufacturing process is much simpler than in the related art, and an incidental phenomenon in which no interference of light is caused by the varistor is generated. There is an advantage.

Claims (6)

A semiconductor package comprising a substrate on which a light emitting device mounting region on which a light emitting device is mounted is formed, and on which first and second pattern electrodes are formed, A varistor material layer is included in the substrate, and first and second internal electrodes are formed with the varistor material layer interposed therebetween. A thermosetting fluid is embedded below the light emitting device mounting area of the substrate, and the thermosetting fluid includes a third internal electrode in which a part of the varistor material is overlapped with the first and second internal electrodes. The bottom surface of the semiconductor package, characterized in that the heat emission electrode is exposed to the bottom surface of the substrate. The method according to claim 1, The thermosetting fluid is a semiconductor package, characterized in that made of a slug made of a metal material of Cu, CuW, CuMo or a metal material coated on the ceramic of AlN, BN, BeO. The method according to claim 1, And one end of the first internal electrode is connected to the first pattern electrode, and one end of the second internal electrode is connected to the second pattern electrode. The method according to claim 1, And the heat dissipation electrode is insulated from the first and second pattern electrodes. The method according to claim 1, The heat dissipation electrode is a semiconductor package, characterized in that the ground electrode. The method according to any one of claims 1 to 5, The semiconductor package according to claim 1, wherein a heat dissipation groove or a heat dissipation hole is further formed on one surface of the heat dissipation electrode.

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