JP2008085109A - Light-emitting diode mounting substrate - Google Patents

Light-emitting diode mounting substrate Download PDF

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JP2008085109A
JP2008085109A JP2006264041A JP2006264041A JP2008085109A JP 2008085109 A JP2008085109 A JP 2008085109A JP 2006264041 A JP2006264041 A JP 2006264041A JP 2006264041 A JP2006264041 A JP 2006264041A JP 2008085109 A JP2008085109 A JP 2008085109A
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emitting diode
electrode
light emitting
light
diode mounting
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Hidenori Katsumura
英則 勝村
Hideaki Tokunaga
英晃 徳永
Kenji Nozoe
研治 野添
Tatsuya Inoue
竜也 井上
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors

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Abstract

<P>PROBLEM TO BE SOLVED: To achieve miniaturization without reducing luminescence efficiency. <P>SOLUTION: The light-emitting diode mounting substrate comprises: an insulating substrate 1; a cathode electrode 3 and an anode electrode 2 for electrically connecting to a cathode terminal and an anode terminal of the light-emitting diode that are provided on at least one surface of the insulating substrate 1, respectively; a discharge electrodes 5 that electrically connect the cathode electrode 3 and anode electrode 2 in parallel and are disposed to face each other via a discharge space 7 of 20 μm or less; a nonlinear resistor 6 that is electrically connected to the discharge electrodes 5 that are provided to embed the discharge space 7 and are disposed to face each other; and a cathode terminal electrode 8b and an anode terminal electrode 8a that are connected to the cathode electrode 3 and anode electrode 2, respectively. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、静電気保護機能を有する発光ダイオード実装用基板に関する。   The present invention relates to a light emitting diode mounting substrate having an electrostatic protection function.

以下、従来の発光ダイオード実装用基板について図面を参照しながら説明する。   Hereinafter, a conventional light emitting diode mounting substrate will be described with reference to the drawings.

青色発光ダイオードの急激な技術進展により、発光ダイオードによってほぼ全ての色を発光させることができるようになった。この進展にともない携帯電話の液晶バックライト、カメラのフラッシュ、信号等に発光ダイオードが既に用いられている。さらに発光効率が向上すれば、近い将来、照明の大部分が発光ダイオードに置き換わるかもしれないと言われている。   With the rapid technological development of blue light emitting diodes, almost all colors can be emitted by the light emitting diodes. With this development, light emitting diodes have already been used for liquid crystal backlights of mobile phones, camera flashes, signals, and the like. It is said that if the luminous efficiency is further improved, most of the lighting may be replaced by light emitting diodes in the near future.

青色発光ダイオードの発光効率を向上させるためには、発光ダイオード自体の技術進展が重要であることは言うまでもないが、発光ダイオードを実装する基板の性能も重要となる。すなわち、発光ダイオード自身から発生する熱を効率よく逃がす放熱性、発光した光が基板にできるだけ吸収されない反射性が基板において重要であることはよく知られている。   In order to improve the light emission efficiency of the blue light emitting diode, it goes without saying that the technological progress of the light emitting diode itself is important, but the performance of the substrate on which the light emitting diode is mounted is also important. That is, it is well known that heat dissipation that efficiently releases heat generated from the light emitting diode itself and reflectivity that allows the emitted light to be absorbed into the substrate as much as possible are important in the substrate.

また一般的な青色発光ダイオードはサファイア基板上に窒化ガリウム、窒化インジウムガリウムを成長させてｐｎ接合を形成しているが、それぞれの材料の格子定数が大きく異なるため、界面には格子欠陥が発生している。発光ダイオードの光量を大きくするためには断面積を大きくする必要があるが、これは格子欠陥の数を増やすことにつながり、過電圧により破壊される確率を高くしている。   In general blue light-emitting diodes, a pn junction is formed by growing gallium nitride and indium gallium nitride on a sapphire substrate. However, since the lattice constants of the respective materials are greatly different, lattice defects are generated at the interface. ing. In order to increase the amount of light emitted from the light emitting diode, it is necessary to increase the cross-sectional area, but this leads to an increase in the number of lattice defects and increases the probability of being destroyed by overvoltage.

特に最近静電気パルスによる過電圧付加が問題となっている。静電気パルスは青色発光ダイオードが搭載された電子機器と人体が接触した場合だけでなく、青色発光ダイオードを基板に実装する製造工程でも入力される。したがって青色発光ダイオードを実装する基板は、あらかじめ静電気対策がなされていることが望ましい。   In particular, the addition of overvoltage due to electrostatic pulses has recently become a problem. The electrostatic pulse is input not only when the human body comes into contact with an electronic device on which the blue light-emitting diode is mounted, but also in a manufacturing process for mounting the blue light-emitting diode on the substrate. Therefore, it is desirable that the substrate on which the blue light-emitting diode is mounted be pre-measured against static electricity.

図９は、従来の発光ダイオード実装用基板の上面図である。   FIG. 9 is a top view of a conventional LED mounting substrate.

従来、上記のような静電気パルスへの対策としては、図９のように発光ダイオード１０４のカソード電極ライン１０２とアノード電極ライン１０３間に、ツェナーダイオード１０５を電気的に並列に実装して接続し、静電気パルスをツェナーダイオード１０５にバイパスさせ、発光ダイオード１０４への過電圧付加を抑制する方法が行われている（例えば、特許文献１参照）。   Conventionally, as a countermeasure against the above-described electrostatic pulse, a Zener diode 105 is electrically mounted in parallel and connected between the cathode electrode line 102 and the anode electrode line 103 of the light emitting diode 104 as shown in FIG. A method is employed in which an electrostatic pulse is bypassed to the Zener diode 105 to suppress overvoltage application to the light emitting diode 104 (see, for example, Patent Document 1).

しかしこの方法では、ツェナーダイオードを実装する面積が必要となるため、青色発光ダイオード基板の小型化を阻害する。また発光ダイオードを実装する前にツェナーダイオードを実装する必要があり、実装工程が複雑となる。またツェナーダイオードは青色発光ダイオードの高さと同等かまたは高いため、発生した光がツェナーダイオードに当たって反射し、結果として発光効率を低下させる原因となる。   However, this method requires an area for mounting the Zener diode, which hinders downsizing of the blue light emitting diode substrate. In addition, it is necessary to mount a Zener diode before mounting the light emitting diode, which complicates the mounting process. Further, since the Zener diode is equal to or higher than the height of the blue light emitting diode, the generated light hits the Zener diode and is reflected, resulting in a decrease in luminous efficiency.

また図１０に示すように、実装面積を小さくし、発生した光を阻害させないためにツェナーダイオードの上に発光ダイオードを立体的に実装する方法も考案されている。すなわち、図１０は、従来の発光ダイオードの側面図であり、第１ドープ領域２２１に接続された第１外部電極２２５、第１電極２２３、第２ドープ領域２２２とこの第２ドープ領域に接続された第２電極２２４からなるツェナーダイオード２２０の上にソルダーボール２１１、２１２を介して発光ダイオード２００の第１電極２０５、第２電極２０４が接続されている。この発光ダイオード２００は基板２０１上に第１エピタキシャル層２０２、第２エピタキシャル層２０３を積層し、前記第１電極２０５が第１エピタキシャル層２０２に前記第２電極２０４が第２エピタキシャル層２０３にそれぞれ接続されたものである。（例えば、特許文献２参照）。しかしこの工法では素子の小型化を阻害する。
特開２００５−２５９７５４号公報 特許第３７７１１４４号公報 Also, as shown in FIG. 10, a method has been devised in which light-emitting diodes are three-dimensionally mounted on a Zener diode in order to reduce the mounting area and not inhibit generated light. That is, FIG. 10 is a side view of a conventional light emitting diode. The first external electrode 225, the first electrode 223, the second doped region 222 connected to the first doped region 221 and the second doped region are connected. The first electrode 205 and the second electrode 204 of the light emitting diode 200 are connected to the Zener diode 220 including the second electrode 224 via solder balls 211 and 212. In the light emitting diode 200, a first epitaxial layer 202 and a second epitaxial layer 203 are stacked on a substrate 201, and the first electrode 205 is connected to the first epitaxial layer 202 and the second electrode 204 is connected to the second epitaxial layer 203, respectively. It has been done. (For example, refer to Patent Document 2). However, this method hinders downsizing of the element.
JP 2005-259754 A Japanese Patent No. 3771144

そこで、本発明はかかる問題点に鑑みてなされたものであり、発光効率を低下させることなく小型化を実現することができる発光ダイオード実装用基板を提供することを目的とするものである。   Accordingly, the present invention has been made in view of such problems, and an object of the present invention is to provide a light emitting diode mounting substrate that can be miniaturized without lowering the light emission efficiency.

上記目的を達成するために本発明は、以下の構成を有する。   In order to achieve the above object, the present invention has the following configuration.

本発明は、絶縁性基板と、この絶縁性基板の少なくとも一方の面に設けた、発光ダイオードのカソード端子およびアノード端子とそれぞれ電気的に接続するためのカソード電極およびアノード電極と、このカソード電極およびアノード電極を電気的に並列接続するとともに２０μｍ以下の放電間隙を介して互いに対向配置された放電電極と、前記放電間隙を埋めるように設けて前記対向配置された放電電極と電気的に接続された非直線性抵抗体と、前記カソード電極およびアノード電極とそれぞれ接続されたカソード端子電極およびアノード端子電極からなる構成としたものである。   The present invention provides an insulating substrate, a cathode electrode and an anode electrode, which are provided on at least one surface of the insulating substrate, and are electrically connected to a cathode terminal and an anode terminal of a light emitting diode, respectively, The anode electrodes are electrically connected in parallel, and are disposed opposite to each other with a discharge gap of 20 μm or less, and electrically connected to the oppositely disposed discharge electrodes provided so as to fill the discharge gap. The non-linear resistor is composed of a cathode terminal electrode and an anode terminal electrode connected to the cathode electrode and the anode electrode, respectively.

本発明によれば、絶縁性基板上に非直線性抵抗体を薄く、かつ、小面積にて形成することができるので、発光ダイオード実装用基板として発光効率を低下させることなく小型化を実現することができる。   According to the present invention, since the non-linear resistor can be formed thin and in a small area on the insulating substrate, the light emitting diode mounting substrate can be reduced in size without reducing the light emission efficiency. be able to.

また、前記非直線性抵抗体は従来の技術を用いて形成することができるので前記効果を容易に得ることができる。   In addition, since the non-linear resistor can be formed using a conventional technique, the above effect can be easily obtained.

（実施の形態１）
以下、本発明の発光ダイオード実装用基板を、図面を参照しながら説明する。 (Embodiment 1)
Hereinafter, a light emitting diode mounting substrate of the present invention will be described with reference to the drawings.

図１は本発明の実施の形態１における発光ダイオード実装用基板の上面図、図２は図１のＡ−Ａ’線の断面図である。１は絶縁性基板である。絶縁性基板１は耐熱性、強度が高い方が良くセラミック材料が望ましい。そのなかでも発光ダイオードの放熱性を考慮し、酸化アルミニウム、窒化アルミニウム、炭化ケイ素、または窒化ホウ素の一つを主成分とするセラミック材料であることがより好ましく、これにより放熱性の優れた基板とすることができる。   FIG. 1 is a top view of a light-emitting diode mounting substrate according to Embodiment 1 of the present invention, and FIG. 2 is a cross-sectional view taken along line A-A ′ of FIG. Reference numeral 1 denotes an insulating substrate. The insulating substrate 1 should have high heat resistance and high strength, and is preferably a ceramic material. Among these, considering the heat dissipation of the light emitting diode, it is more preferable that the ceramic material is mainly composed of one of aluminum oxide, aluminum nitride, silicon carbide, or boron nitride. can do.

２、３は発光ダイオードを実装するための電極でありそれぞれアノード電極２、カソード電極３である。電極の材料は発光ダイオードが実装しやすい材料であれば特に限定しないが金などがよく用いられる。また電極の形成工法も発光ダイオードが安定して実装できる工法であれば特に限定しないが、スクリーン印刷工法、メッキ工法、スパッタ工法、フォトリソ工法などが使用できる。発光ダイオードは例えば発光ダイオード実装位置４に実装される。   Reference numerals 2 and 3 denote electrodes for mounting a light emitting diode, which are an anode electrode 2 and a cathode electrode 3, respectively. The material of the electrode is not particularly limited as long as it is a material that can be easily mounted on the light emitting diode, but gold or the like is often used. The electrode forming method is not particularly limited as long as the light-emitting diode can be stably mounted, and a screen printing method, a plating method, a sputtering method, a photolithography method, and the like can be used. For example, the light emitting diode is mounted at the light emitting diode mounting position 4.

５は放電電極であり放電間隔７が形成されている。放電電極５の材料、形成工法も特に限定しないが、発光ダイオードの前記アノード電極２、カソード電極３と同じ材料、工法であれば製造プロセスが簡単になり製造コストを低減できる。   Reference numeral 5 denotes a discharge electrode, in which a discharge interval 7 is formed. The material and the forming method of the discharge electrode 5 are not particularly limited, but if the same material and method as the anode electrode 2 and the cathode electrode 3 of the light emitting diode are used, the manufacturing process can be simplified and the manufacturing cost can be reduced.

放電間隔７の幅は２０μｍ以下と狭くしないと印加された静電気をこの放電電極５間でバイパスすることができない。放電間隔７の形成工法は特に限定されるものではないが、安定して同じ放電間隔幅が形成できる工法が好ましい。例えばスパッタ工法、フォトリソ工法などによるファインパターニング工法が用いられる。またその他の工法として放電間隔７のない放電電極５を形成した後、ＹＡＧレーザーなどによって放電電極５と絶縁性基板１の表面をカットすることにより放電間隔７を形成する工法も用いることができる。   The applied static electricity cannot be bypassed between the discharge electrodes 5 unless the width of the discharge interval 7 is narrowed to 20 μm or less. The method for forming the discharge interval 7 is not particularly limited, but a method that can stably form the same discharge interval width is preferable. For example, a fine patterning method using a sputtering method, a photolithography method or the like is used. As another method, a method of forming the discharge interval 7 by forming the discharge electrode 5 without the discharge interval 7 and then cutting the surfaces of the discharge electrode 5 and the insulating substrate 1 with a YAG laser or the like can be used.

放電間隔７の幅はより狭い方が低い電圧で静電気を放電することができるため好ましいが、あまり狭くしすぎるとショート不良を起こす原因となるため、放電間隔７の形成工法の精度に依存する。したがって、上記のファインパターニング工法やレーザーカット工法を用いる場合、５〜１０μｍ程度が工法の精度上適している。   Although it is preferable that the width of the discharge interval 7 is narrower because static electricity can be discharged at a lower voltage, it is preferable to make the discharge interval 7 too narrow, which causes a short circuit failure, and therefore depends on the accuracy of the method of forming the discharge interval 7. Therefore, when using the fine patterning method or the laser cut method, about 5 to 10 μm is suitable for the accuracy of the method.

放電間隔７を形成した状態では印加された静電気はアルミナ基板上の空気を放電することになるため、安定して放電できない。そこで放電間隔７を埋めるようにして非直線性抵抗体６を形成する。非直線性抵抗体６とは通常時は絶縁体であるが、静電気などによる高電圧が印加されると抵抗値が急激に低下し電流を流す材料である。最も簡単かつ小面積で薄く形成できる材料として、絶縁性樹脂に導電性微粉末を添加した材料があげられる。導電性微粉末間に絶縁性樹脂がいわゆる粒界のように存在し、電圧が印加されていない場合、もしくは低電圧が印加されている場合には、絶縁性樹脂の粒界によって絶縁性を示すが、静電気パルスのような高電圧が印加されると、電子がこの絶縁性樹脂を飛び越えるようになるため抵抗値が急激に低下し電流が流れる。   In the state where the discharge interval 7 is formed, the applied static electricity discharges the air on the alumina substrate, and thus cannot be stably discharged. Therefore, the non-linear resistor 6 is formed so as to fill the discharge interval 7. The non-linear resistor 6 is normally an insulator, but is a material that causes a current to flow rapidly when a high voltage due to static electricity or the like is applied to the resistor. As a material that can be formed most easily and thinly in a small area, a material obtained by adding conductive fine powder to an insulating resin can be given. When the insulating resin exists between the conductive fine powders like so-called grain boundaries and no voltage is applied or when a low voltage is applied, the insulating resin exhibits the insulating properties due to the grain boundaries. However, when a high voltage such as an electrostatic pulse is applied, electrons jump over the insulating resin, so that the resistance value decreases rapidly and a current flows.

非直線性抵抗体６の形成工法は特に限定しないが、絶縁性樹脂と導電性微粉末を混練してペースト状にし、スクリーン印刷工法などを用いて放電間隔７の部分に形成した後、樹脂が硬化する温度で処理する工法などが考えられる。絶縁性樹脂は熱硬化性樹脂で絶縁性、耐熱性の高い材料が好ましく、例えばエポキシ樹脂などが考えられるが特に限定しない。   The formation method of the non-linear resistor 6 is not particularly limited, but after the insulating resin and the conductive fine powder are kneaded into a paste and formed on the portion of the discharge interval 7 using a screen printing method or the like, the resin is A method of processing at a curing temperature can be considered. The insulating resin is a thermosetting resin and is preferably a material having high insulation and heat resistance. For example, an epoxy resin can be considered, but the insulating resin is not particularly limited.

また導電性微粉末の種類も特に限定しないが、アルミニウムのようにその粉末表面に薄い絶縁層が形成される金属材料であれば絶縁性の粒界が二重構造となるためより好ましい。また導電性微粉末の粒径は細かくなるほど絶縁性樹脂によるいわゆる粒界が増えるため、絶縁性から導電性へ変化する電圧が高くなるため静電気パルスの抑制効果は低下するが、放電安定性、長寿命化には効果がある。通常１〜５μｍ程度の導電性粉末を用いるが特に限定しない。   The type of the conductive fine powder is not particularly limited, but is preferably a metal material such as aluminum in which a thin insulating layer is formed on the powder surface because the insulating grain boundary has a double structure. In addition, as the particle size of the conductive fine powder becomes finer, so-called grain boundaries due to the insulating resin increase, so that the voltage that changes from insulating to conductive increases, so the effect of suppressing electrostatic pulses decreases, but the discharge stability, long It is effective in extending the service life. Usually, although about 1-5 micrometers conductive powder is used, it does not specifically limit.

非直線性抵抗体６は放電間隔７を埋めるように形成しておれば良いが、薄すぎると絶縁性樹脂が静電気の印加によって早く劣化してしまうが、特に厚く形成する必要もない。スクリーン印刷工法などによって硬化後２０〜４０μｍ程度形成できれば良いがこの厚みも特に限定しない。   The non-linear resistor 6 may be formed so as to fill the discharge interval 7. However, if it is too thin, the insulating resin will deteriorate quickly due to the application of static electricity, but it does not need to be formed thick. Although it is sufficient that the film can be formed to about 20 to 40 μm after curing by a screen printing method or the like, this thickness is not particularly limited.

８は入出力端子電極でありこれも材料、形成工法は特に限定しない。ただし入出力端子電極８はマザー基板の電極と固定されるため、例えば半田で固定する場合には半田耐熱性が要求される。またマザー基板のたわみ、歪みによる力がこの入出力端子電極８に負荷されるため、その負荷に耐えられる材料、構造にする必要がある。   Reference numeral 8 denotes an input / output terminal electrode, and the material and the forming method are not particularly limited. However, since the input / output terminal electrode 8 is fixed to the electrode of the mother board, for example, when it is fixed with solder, solder heat resistance is required. In addition, since force due to bending and distortion of the mother substrate is applied to the input / output terminal electrode 8, it is necessary to use a material and a structure that can withstand the load.

このように構成した発光ダイオード実装用基板によれば、通常の電圧印加時には放電電極５の部分は絶縁体（高抵抗）であるため電流は流れず、発光ダイオードのアノード電極２、カソード電極３へ流れ、発光ダイオード（図示せず）を発光させる。また静電気パルスのような高電圧が印加された場合には、放電電極５の部分の抵抗値が大きく低下し、電流の大部分が放電電極５を通して流れ、発光ダイオードへはほとんど流れず、静電気パルス印加による発光ダイオードの破壊を防ぐことができる。   According to the substrate for mounting a light emitting diode configured as described above, when a normal voltage is applied, the discharge electrode 5 is an insulator (high resistance), so that no current flows, and the anode electrode 2 and the cathode electrode 3 of the light emitting diode do not flow. The light emitting diode (not shown) emits light. In addition, when a high voltage such as an electrostatic pulse is applied, the resistance value of the discharge electrode 5 portion is greatly reduced, most of the current flows through the discharge electrode 5 and hardly flows to the light emitting diode. The destruction of the light emitting diode due to the application can be prevented.

またこの放電電極５、非直線性抵抗体６、放電間隔７はいずれも大きな面積は必要なく、また薄く形成することができるため、図９のようなツェナーダイオードの実装と比較すると小面積化、薄型化を図ることができ、また発光ダイオードの発光効率を低下させることがない。またこれらは電極のファインパターニングまたはレーザーカットと、非直線性抵抗体の硬化だけのプロセスで形成することができる。酸化亜鉛を主成分とするバリスタセラミック材料を形成する工法と比較すると極めて低温で形成することができる。またツェナーダイオードや積層チップバリスタなどの静電気対策部品を実装する工法と比較すると、半田づけ工程が不要であるため極めてクリーンに形成することができる。これは発光ダイオードの実装工法に良い影響を与える。   Further, since the discharge electrode 5, the non-linear resistor 6, and the discharge interval 7 are all not required to have a large area and can be formed thinly, the area is reduced as compared with the mounting of a Zener diode as shown in FIG. The thickness can be reduced, and the light emission efficiency of the light emitting diode is not lowered. These can be formed by a process of only fine patterning or laser cutting of the electrode and curing of the non-linear resistor. Compared with a method of forming a varistor ceramic material containing zinc oxide as a main component, it can be formed at an extremely low temperature. In addition, compared with a method of mounting an anti-static component such as a Zener diode or a multilayer chip varistor, a soldering process is not required, so that it can be formed extremely cleanly. This has a positive effect on the light emitting diode mounting method.

（実施の形態２）
図３は、入出力端子電極８を、発光ダイオード実装面と反対側の面に形成した発光ダイオード実装用基板の上面図、図４は図３のＢ−Ｂ’線の断面図である。発光ダイオードのアノード電極２、カソード電極３と入出力端子電極８を接続するためには、絶縁性基板１を貫通する電極９が必要となる。この貫通電極９の材料と形成工法は特に限定しないが、この貫通電極９は熱放散の役割も担うことができるので、焼結した金属であることが好ましい。また貫通電極９はそれぞれの端子電極に一つずつ設けているが、電気的接続性の確保、放熱性の向上のため複数設けても良い。 (Embodiment 2)
3 is a top view of a light emitting diode mounting substrate in which the input / output terminal electrode 8 is formed on the surface opposite to the light emitting diode mounting surface, and FIG. 4 is a cross-sectional view taken along line BB ′ of FIG. In order to connect the anode electrode 2 and cathode electrode 3 of the light emitting diode to the input / output terminal electrode 8, an electrode 9 penetrating the insulating substrate 1 is required. The material and forming method of the through electrode 9 are not particularly limited. However, since the through electrode 9 can also play a role of heat dissipation, it is preferably a sintered metal. One through electrode 9 is provided for each terminal electrode, but a plurality of through electrodes 9 may be provided in order to ensure electrical connectivity and improve heat dissipation.

また、図５は本実施の形態２における他の一例である発光ダイオード実装用基板の上面図、図６は図５のＣ−Ｃ’線の断面図、図７は図５のＤ−Ｄ’線の断面図である。この構成の方が放電間隔７の長さが長く放電可能な部分が増えるため、静電気パルスの抑制効果は向上する。   5 is a top view of a light emitting diode mounting substrate as another example of the second embodiment, FIG. 6 is a cross-sectional view taken along the line CC ′ of FIG. 5, and FIG. 7 is DD ′ of FIG. It is sectional drawing of a line. In this configuration, since the discharge interval 7 is longer and more portions can be discharged, the effect of suppressing electrostatic pulses is improved.

また図５〜図７において、１０は白色着色部である。絶縁性基板１にアルミナのように白色の材料を用いる場合には必要ないが、炭化珪素のように黒灰色の基板を用いる場合には発光ダイオードから発生した光の一部が基板に吸収され結果として発光効率が低下する。したがって、発光ダイオード周縁部を光反射率の高い白色または銀色に着色するのが好ましい。着色方法は特に規定しないが、例えば白色に着色するには、酸化チタンとガラスの混合物を印加形成し、緻密に焼成する温度で焼き付けることによって実現できる。   5 to 7, reference numeral 10 denotes a white colored portion. This is not necessary when a white material such as alumina is used for the insulating substrate 1, but when a black-gray substrate such as silicon carbide is used, a part of the light generated from the light emitting diode is absorbed by the substrate. As a result, the luminous efficiency decreases. Therefore, it is preferable to color the periphery of the light emitting diode in white or silver with high light reflectance. Although the coloring method is not particularly defined, for example, coloring in white can be realized by applying and forming a mixture of titanium oxide and glass and baking at a temperature at which the mixture is densely fired.

また、絶縁性基板１の発光ダイオード実装部の周縁部を物理的または化学的に研磨するなどの表面処理をして光反射率を向上させることも可能である。   It is also possible to improve the light reflectivity by subjecting the peripheral portion of the light emitting diode mounting portion of the insulating substrate 1 to physical or chemical polishing.

他の構成については実施の形態１と同様である。   Other configurations are the same as those in the first embodiment.

図８は発光ダイオードを多連接続する場合の発光ダイオード実装用基板の上面図である。各発光ダイオード（図示せず）に対して並列に放電電極５、非直線性抵抗体６、放電間隔７を形成すれば、入出力端子電極８から印加された静電気パルスによる過電圧、および各発光ダイオード間の電極から印加された静電気パルスによる過電圧のいずれに対しても発光ダイオードを保護することができる。また多連の場合、従来のツェナーダイオードを実装する例では発光ダイオードの数だけツェナーダイオードを実装する必要があったが、本発明によれば電極のファインパターニングまたはレーザーカットと、非直線性抵抗体材料の形成と硬化だけのプロセスで一括形成できるため大幅な工程短縮、コストダウンが実現できる。   FIG. 8 is a top view of a light-emitting diode mounting substrate in the case where multiple light-emitting diodes are connected. If the discharge electrode 5, the non-linear resistor 6, and the discharge interval 7 are formed in parallel to each light emitting diode (not shown), an overvoltage caused by an electrostatic pulse applied from the input / output terminal electrode 8, and each light emitting diode The light-emitting diode can be protected against any overvoltage caused by electrostatic pulses applied from the electrodes in between. Also, in the case of multiple series, it is necessary to mount as many Zener diodes as the number of light emitting diodes in the example of mounting a conventional Zener diode, but according to the present invention, fine patterning of the electrode or laser cutting, and a nonlinear resistor Since it can be formed at once by the process of material formation and curing, the process can be greatly shortened and the cost can be reduced.

以上のように本発明にかかる発光ダイオード実装用基板は、発光効率を低下させることなく小型化を達成し、実装工程および人体との接触によって発生する静電気パルスによる過電圧付加を抑制することができるので、例えば高出力の発光ダイオードフラッシュ、照明などに適用できる。   As described above, the light emitting diode mounting substrate according to the present invention can achieve downsizing without lowering the light emission efficiency, and can suppress the addition of overvoltage due to electrostatic pulses generated by the mounting process and contact with the human body. For example, the present invention can be applied to high-power light emitting diode flashes and lighting.

本発明の実施の形態１における発光ダイオード実装用基板の上面図1 is a top view of a light-emitting diode mounting substrate according to Embodiment 1 of the present invention. 図１のＡ−Ａ’線断面図A-A 'line sectional view of FIG. 本発明の実施の形態２における発光ダイオード実装用基板の上面図The top view of the light emitting diode mounting substrate in Embodiment 2 of this invention 図３のＢ−Ｂ’線断面図B-B 'line sectional view of FIG. 本発明の実施の形態２における発光ダイオード実装用基板の上面図The top view of the light emitting diode mounting substrate in Embodiment 2 of this invention 図５のＣ−Ｃ’線断面図C-C 'line sectional view of FIG. 図５のＤ−Ｄ’線断面図D-D 'line sectional view of FIG. 本発明の実施の形態２における多連発光ダイオード実装用基板の上面図The top view of the board | substrate for multiple light emitting diode mounting in Embodiment 2 of this invention 従来の発光ダイオード実装用基板の上面図Top view of a conventional LED mounting board 従来の発光ダイオードの側面図Side view of conventional light emitting diode

符号の説明Explanation of symbols

１ 絶縁性基板
２ アノード電極
３ カソード電極
４ 発光ダイオード実装位置
５ 放電電極
６ 非直線性抵抗体
７ 放電間隔
８ 入出力端子電極
８ａ アノード端子電極
８ｂ カソード端子電極
９ 貫通電極
１０ 白色着色部 DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Anode electrode 3 Cathode electrode 4 Light emitting diode mounting position 5 Discharge electrode 6 Nonlinear resistor 7 Discharge space | interval 8 I / O terminal electrode 8a Anode terminal electrode 8b Cathode terminal electrode 9 Through electrode 10 White coloring part

Claims (6)

絶縁性基板と、この絶縁性基板の少なくとも一方の面に設けた、発光ダイオードのカソード端子およびアノード端子とそれぞれ電気的に接続するためのカソード電極およびアノード電極と、このカソード電極およびアノード電極を電気的に並列接続するとともに２０μｍ以下の放電間隙を介して互いに対向配置された放電電極と、前記放電間隙を埋めるように設けて前記対向配置された放電電極と電気的に接続された非直線性抵抗体と、前記カソード電極およびアノード電極とそれぞれ接続されたカソード端子電極およびアノード端子電極からなる発光ダイオード実装用基板。 An insulating substrate, a cathode electrode and an anode electrode provided on at least one surface of the insulating substrate for electrically connecting to the cathode terminal and the anode terminal of the light emitting diode, respectively, and the cathode electrode and the anode electrode are electrically connected Discharge electrodes arranged in parallel and opposed to each other with a discharge gap of 20 μm or less, and a non-linear resistance provided so as to fill the discharge gap and electrically connected to the opposed discharge electrodes A light-emitting diode mounting substrate comprising a body and a cathode terminal electrode and an anode terminal electrode connected to the cathode electrode and the anode electrode, respectively. カソード端子電極およびアノード端子電極は、カソード電極およびアノード電極とは異なる、絶縁性基板の他方の面に設けた請求項１記載の発光ダイオード実装用基板。 The light emitting diode mounting substrate according to claim 1, wherein the cathode terminal electrode and the anode terminal electrode are provided on the other surface of the insulating substrate different from the cathode electrode and the anode electrode. 絶縁性基板は、酸化アルミニウム、窒化アルミニウム、炭化ケイ素、窒化ホウ素から選ばれた一つを主成分とする請求項１記載の発光ダイオード実装用基板。 The light-emitting diode mounting substrate according to claim 1, wherein the insulating substrate is mainly composed of one selected from aluminum oxide, aluminum nitride, silicon carbide, and boron nitride. 絶縁性基板における発光ダイオード実装部の周縁部は、発光ダイオードからの光の反射率を向上させるための表面処理がなされた請求項１記載の発光ダイオード実装用基板。 The light emitting diode mounting substrate according to claim 1, wherein the peripheral portion of the light emitting diode mounting portion on the insulating substrate is subjected to a surface treatment for improving the reflectance of light from the light emitting diode. 絶縁性基板における発光ダイオード実装部の周縁部は、略白色または略銀色である請求項１記載の発光ダイオード実装用基板。 The light emitting diode mounting substrate according to claim 1, wherein a peripheral portion of the light emitting diode mounting portion in the insulating substrate is substantially white or substantially silver. 非直線性抵抗体は、絶縁性樹脂と導電性微粉末からなる請求項１記載の発光ダイオード実装用基板。 The light-emitting diode mounting substrate according to claim 1, wherein the non-linear resistor is made of an insulating resin and conductive fine powder.
JP2006264041A 2006-09-28 2006-09-28 Light-emitting diode mounting substrate Pending JP2008085109A (en)

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