KR100729777B1 - a thin film transistor array panel for a liquid crystal display and a manufacturing method thereof - Google Patents

Abstract

Gate wirings and storage electrodes including first and second gate lines, first and second gate electrodes, and first and second gate pads are formed on an insulating substrate, and a gate insulating film is formed thereon. First and second semiconductor layers are formed on the gate insulating layer on the first and second gate electrodes, respectively, and the first and second data lines and the first and second source electrodes, respectively, A data wiring including a drain electrode having a second branch and first and second data pads is formed. On the data line, a protective film having a drain electrode, contact holes exposing the first and second gate pads and the first and second data pads, respectively, is formed. The pixel electrode, the first and second auxiliary gate pads, and the first and second auxiliary data pads are formed on the passivation layer. Here, the first branch of the first gate electrode, the first source electrode, the drain electrode, and the first semiconductor layer constitute the first thin film transistor, and the second gate electrode, the second source electrode, the second branch of the drain electrode, and the second The semiconductor layer forms a second thin film transistor, and a response speed may be improved by applying a signal having a higher voltage than the image signal through the first thin film transistor and applying an image signal through the second thin film transistor.

Thin film transistor, image signal, response speed

Description

A thin film transistor array panel for a liquid crystal display and a manufacturing method

1 is a layout view schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1;

3A is a layout view illustrating a thin film transistor substrate for a liquid crystal display device in a first step of manufacturing according to an embodiment of the present invention;

FIG. 3B is a cross-sectional view taken along line IIIb-IIIb in FIG. 3A;

FIG. 4a is a layout view in the next step of FIG. 3a;

4B is a cross-sectional view taken along line IVb-IVb in FIG. 4A;

FIG. 5A is a layout view of the next step of FIG. 4A;

FIG. 5B is a cross-sectional view taken along the line Vb-Vb of FIG. 5a;

FIG. 6a is a layout view in the next step of FIG. 5a;

FIG. 6B is a cross-sectional view taken along line VIb-VIb in FIG. 6A.

The present invention relates to a thin film transistor substrate for a liquid crystal display device and a manufacturing method thereof.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal layer between the two substrates and the two substrates on which the plurality of electrodes are formed to generate an electric field is attached to the outer surface of each substrate to polarize light. It consists of two polarizing plates, and is a display device for controlling the amount of light transmitted by rearranging the liquid crystal molecules of the liquid crystal layer by applying a voltage to the electrode.

A thin film transistor is formed on one substrate of the liquid crystal display, which serves to switch a voltage applied to the electrode. On the substrate on which the thin film transistor is formed, a plurality of signal lines, that is, a plurality of gate lines and data lines, are formed in row and column directions, respectively. A pixel electrode is formed in the pixel region defined by the intersection of the gate line and the data line, and the thin film transistor controls the image signal transmitted through the data line according to the scan signal transmitted through the gate line and sends it out to the pixel electrode.

On the substrate facing the thin film transistor substrate, a color filter corresponding to the pixel electrode and a black matrix corresponding to the other region are formed, and a common electrode which generates an electric field together with the pixel electrode of the thin film transistor substrate is formed.

Such liquid crystal displays are applied to portable devices having small monitors, to monitors and televisions of computers, and the like. When applied to televisions having a large screen of 40 inches or more, the response speed is slowed and the charging margin of pixel electrodes is reduced. have.

An object of the present invention is to improve the response speed of the liquid crystal display.

In order to achieve this problem, the present invention forms two thin film transistors in one pixel area.

According to the present invention, a first gate line is formed on an insulating substrate, and a second gate line is formed in parallel with the first gate line. A first data line is formed to insulate and intersect the first gate line, and a second data line is formed to insulate and intersect the second gate line and be parallel to the first data line. The pixel electrode is formed in the pixel region where the first and second gate lines intersect the first and second data lines. A first thin film transistor electrically connected to the first gate line, the first data line, and the pixel electrode is formed, and a second thin film transistor electrically connected to the second gate line, the second data line and the pixel electrode is formed. have.

Here, the drain electrodes of the first and second thin film transistors are connected to each other, and the storage wiring may be further formed in the same layer in parallel with the first and second gate lines.

Meanwhile, first and second gate pads respectively connected to the first and second gate lines and first and second data pads respectively connected to the first and second data lines may be further formed. In this case, the first and second auxiliary gate pads connected to the first and second gate pads and the first and second auxiliary data pads connected to the first and second data pads, respectively, are formed on the same layer as the pixel electrode. It may be.

The thin film transistor substrate for a liquid crystal display device includes a first gate electrode and a first gate electrode that is a part of the first gate line, a second gate line that is parallel to the first gate line, and a second gate electrode that is part of the second gate line on the insulating substrate. The gate wiring is formed. The gate wiring is covered with a gate insulating film, and first and second semiconductor layers are formed on the gate insulating film on the first and second gate electrodes, respectively. On the gate insulating layer and the first and second semiconductor layers, a first source electrode which is part of the first data line and the first data line, a second data line that is parallel to the first data line, and a second source electrode that is part of the second data line, first and second A data line including first and second drain electrodes facing the first and second source electrodes, respectively, is formed around the two gate electrodes. A protective film having a first contact hole for exposing the first and second drain electrodes is formed thereon, and a pixel electrode connected to the first and second drain electrodes through the first contact hole is formed. The two drain electrodes are connected to each other.

Here, the sustain wiring may be further formed in the same layer as the gate wiring.

Meanwhile, the gate wiring further includes first and second gate pads connected to the first and second gate lines, respectively, and the data wiring is first and second data pads respectively connected to the first and second data lines. It may further include. In this case, the passivation layer and the gate insulating layer have second and third contact holes exposing the first and second gate pads and fourth and fifth contact holes exposing the first and second data pads, respectively. First and second data through first and second auxiliary gate pads and fourth and fifth contact holes respectively connected to the first and second gate pads through three contact holes and formed in the same layer as the pixel electrode. The display device may further include first and second auxiliary data pads connected to the pads and formed of the same layer as the pixel electrode.

In addition, the first and second ohmic contacts separated from the first gate electrode on the first semiconductor layer and the third and fourth ohmic contacts separated from the second gate electrode on the second semiconductor layer. It may be further formed.

When manufacturing a thin film transistor substrate for a liquid crystal display device, first, a first gate electrode, a part of a first gate line and a part of a first gate line, a second gate line parallel to the first gate line, and a second gate part of a second gate line on the insulating substrate. A gate wiring including an electrode is formed. Next, a gate insulating film is formed, and first and second semiconductor layers are formed. Next, a first source electrode that is part of the first data line and the first data line, a second data line that is parallel to the first data line, a second source electrode that is part of the second data line, and a first facing the first and second source electrodes, respectively And a drain electrode having a second electrode having a second branch. Next, after forming a protective film having a first contact hole that exposes the drain electrode, a pixel electrode connected to the drain electrode is formed through the first contact hole.

Here, the storage wiring may be further formed under the drain electrode in the same layer as the gate wiring.                     

Meanwhile, the gate wiring further includes first and second gate pads connected to the first and second gate lines, respectively, and the data wiring is first and second data pads respectively connected to the first and second data lines. The protective layer and the gate insulating layer may further include second and third contact holes exposing the first and second gate pads, and fourth and fifth contact holes exposing the first and second data pads, respectively. First and second auxiliary gate pads are connected to the first and second gate pads through the second and third contact holes, respectively, and have the same layer as the pixel electrode, and the first and second contact holes are respectively formed through the fourth and fifth contact holes. The first and second auxiliary data pads may be formed on the same layer as the pixel electrode and connected to the second data pad.

In addition, the first and second ohmic contacts separated from the first gate electrode on the first semiconductor layer and the third and fourth ohmic contacts separated from the second gate electrode on the second semiconductor layer. It may form further.

In the present invention, the gate line and the data line are doubled in one pixel area and two thin film transistors are formed to apply a signal having a voltage higher than the pixel voltage to the pixel electrode through one thin film transistor to improve the response speed. Can be.

Next, a thin film transistor substrate for a liquid crystal display device and a method for manufacturing the same according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the same. do.

First, a structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 2.

FIG. 1 is a layout view schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1.

1 and 2, on the insulating substrate 10, aluminum (Al) or aluminum alloy (Al alloy), molybdenum (Mo) or molybdenum-tungsten alloy (MoW), chromium (Cr), tantalum (Ta), etc. Gate wirings 21, 22, 23, 24, 25, and 26 and a sustain electrode 27 made of a metal or a conductor are formed. The gate wirings include first and second gate lines 21 and 22 extending in the horizontal direction, and first and second gate electrodes 23 and a portion of each of the first and second gate lines 21 and 22. 24 and first and second gate pads 25 and 26 connected to ends of the first and second gate lines 21 and 22, respectively, to receive gate signals from the outside. The storage electrode 27 is formed across the pixel area in parallel with the first and second gate lines 21 and overlaps with the drain electrode 67 to be described later to form a storage capacitor that improves the charge retention capability of the pixel. .

The gate wirings 21, 22, 23, 24, 25, and 26 and the storage electrode 27 may be formed in a single layer, or may be formed in two or more layers. In this case, it is preferable that one layer is formed of a material having a low resistance and the other layer is formed of a material having good contact properties with other materials. Examples thereof include a double layer of chromium and aluminum or a double layer of aluminum and molybdenum.

The gate wirings 21, 22, 23, 24, 25, 26 and the storage electrode 27 are covered with the gate insulating film 30 made of silicon nitride.                     

First and second semiconductor layers 41 and 42 formed of semiconductors such as amorphous silicon are formed on the gate insulating layer 30 on the first and second gate electrodes 23 and 24, respectively. On the semiconductor layers 41 and 42, ohmic contacts 53, 54, 55 and 56 made of a semiconductor such as amorphous silicon doped with n-type impurities such as phosphorus (P) are formed. In this case, the ohmic contacts 53 and 55 are separated on both sides of the first gate electrode 23, and the ohmic contacts 54 and 56 are separated on both sides of the second gate electrode 24. have.

On the ohmic contact layers 53, 54, 55, 56 and the gate insulating layer 30, data wirings 61, 62, 63, made of a metal or a conductor such as aluminum or an aluminum alloy, molybdenum or molybdenum-tungsten alloy, chromium or tantalum, 64, 67, 68, 69) are formed. The data wirings include first and second source electrodes 63 and 64 which are branches of the first and second data lines 61 and 62 and the first and second data lines 61 and 62 respectively extending in the vertical direction. And a drain electrode 67 formed on the sustain electrode 27, and first and second data pads 68 and 69 connected to ends of the first and second data lines 61 and 62. At this time, the first and second branches 65 and 66, which are part of the drain electrode 67 and connected to both sides of the drain electrode 67, are formed around the first and second gate electrodes 23 and 24, respectively. The first and second source electrodes 63 and 64 face each other.

The data lines 61, 62, 63, 64, 67, 68, and 69 may also be formed in a single layer like the gate lines 21, 22, 23, 24, 25, and 26, but may be formed in more than one layer.                     

A protective film 70 made of silicon nitride is formed on the data wires 61, 62, 63, 64, 67, 68, and 69, the first and second semiconductor layers 41 and 42, and the gate insulating film 30. The passivation layer 70 has contact holes 75 and 76 exposing the first and second gate pads 25 and 26 together with the gate insulating layer 30, as well as the first and second data pads 68,. Contact holes 78 and 79 exposing 69 and contact holes 77 exposing drain electrode 67, respectively.

The pixel electrode 80 and the first and second auxiliary gate pads 85 and 86 made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) or an opaque conductive material having excellent reflectivity on the passivation layer 70. ) And first and second auxiliary data pads 88 and 89 are formed.

The pixel electrode 80 is connected to the drain electrode 67 through the contact hole 77. The first and second auxiliary gate pads 85 and 86 are connected to the first and second gate pads 25 and 26 through contact holes 75 and 76, respectively. 88 and 89 are connected to data pads 68 and 69 through contact holes 78 and 79, respectively, which complement the adhesion between pads 25, 26, 78 and 79 and external circuit devices and Protects (25, 26, 78, 79).

The thin film transistor substrate having such a structure includes a first gate electrode 23, a first source electrode 63, a first branch 65 of the drain electrode 67, and a first semiconductor layer 41. The second gate electrode 24, the second source electrode 64, the second branch 66 of the drain electrode 67, and the second semiconductor layer 42 form the second thin film transistor TFT2. It is done. Two thin film transistors TFT1 and TFT2 are formed in one pixel area, and the drain electrode 67 serves as a common drain electrode of the two thin film transistors.

The first thin film transistor TFT1 receives a first gate signal from the first gate pad 25 and the first gate line 21 to allow a current to flow in the first semiconductor layer 41. Is turned on, and the second thin film transistor TFT2 receives the second gate signal from the second gate pad 26 and the second gate line 22 to the second semiconductor layer 42. An on state is formed in which a conductive channel through which current can flow is formed. When the thin film transistors TFT1 and TFT2 are turned on as described above, the pixel electrode 80 is provided with the first data signal and the second data pad 69 applied from the first data pad 68 and the first data line 61. ) And the second data signal applied from the second data line 62 may be applied together.

At this time, the response speed is increased by applying a voltage higher than the second data signal as the image signal to the first data signal.

Since the gate lines 21 and 22 and the data lines 61 and 62 are formed in a single pixel area, the aperture ratio is expected to be reduced. However, in the case of the large screen, the size of the pixel area is increased, so that it does not have a large influence.

Next, a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 3A to 6B and FIGS. 1 and 2.

First, as shown in FIGS. 3A and 3B, the gate wiring conductor layer is deposited and patterned on the insulating substrate 10 to a thickness of 1,000 kPa to 3,000 kPa by a method such as sputtering, to form the gate wirings 21, 22, 23, 24, and 25. And the sustain electrode 27 are formed.

Next, as shown in FIGS. 4A and 4B, the gate insulating film 30, the semiconductor layer, and the ohmic contact layer are deposited in the order of 1,500 kV to 5,000 kV, 500 kV to 1,500 kPa, and 300 kPa to 600 kPa, respectively. The two layers of are patterned to form the first and second semiconductor layers 41 and 42 and the ohmic contacts 51 and 52.

Next, as illustrated in FIGS. 5A and 5B, the data wiring conductor layer is deposited to a thickness of 1,500 Å to 3,000 Å and patterned by a method such as sputtering to form the data lines 61, 62, 63, 64, 67, 68, and 69. Form. Next, the resistive contact layer 51 exposed between the first source electrode 63 and the first branch 65 of the drain electrode 67 is removed and separated into two parts 53 and 55, and the second source electrode ( The resistive contact layer 52 exposed between the 64 and the second branch 66 of the drain electrode 67 is removed and separated into two parts 54 and 56.

Next, as shown in FIGS. 6A and 6B, the protective film 70 is deposited and patterned to a thickness of 3,000 kPa or more by chemical vapor deposition or spin coating to form contact holes 75, 76, 77, 78, and 79.

Next, as illustrated in FIGS. 1 and 2, a transparent or opaque conductive material is deposited and patterned to have a thickness of 400 kPa to 500 kPa by a method such as sputtering, to form the pixel electrode 80, the first and second auxiliary gate pads 85 and 86. First and second auxiliary data pads 88 and 89 are formed.

 As described above, in the present invention, the gate line and the data line are doubled in one pixel area, and two thin film transistors are formed to apply a data signal to the pixel electrode through one thin film transistor to improve the response speed.

Claims (14)

Insulation board, A first gate line formed on the substrate, A second gate line formed in parallel with the first gate line, Sustain wiring formed in the same layer in parallel with the first and second gate lines; A first data line insulated from and intersecting the first gate line, A second data line insulated from and intersecting the second gate line and formed parallel to the first data line; A pixel electrode formed in a pixel region where the first and second gate lines and the first and second data lines cross each other; A first thin film transistor electrically connected to the first gate line, the first data line, and the pixel electrode; A second thin film transistor electrically connected to the second gate line, the second data line, and the pixel electrode Including; The first and second thin film transistors include drain electrodes connected to each other, and the drain electrode overlaps at least a portion of the sustain wiring. delete delete In claim 1, A thin film for a liquid crystal display device further comprising first and second gate pads connected to the first and second gate lines, respectively, and first and second data pads connected to the first and second data lines, respectively. Transistor substrate. In claim 4, First and second auxiliary gate pads formed of the same layer as the pixel electrode and connected to the first and second gate pads, and first and second auxiliary pads respectively connected to the first and second data pads. The thin film transistor substrate for a liquid crystal display device further including a data pad. Insulation board, A gate including a first gate line formed on the substrate, a first gate electrode which is a part of the first gate line, a second gate line formed in parallel with the first gate line, and a second gate electrode which is a part of the second gate line Wiring, A holding wiring formed of the same layer as the gate wiring, A gate insulating film covering the gate wiring, First and second semiconductor layers formed on the gate insulating layer on the first and second gate electrodes, respectively; A first data line formed on the gate insulating layer, the first and second semiconductor layers, a first source electrode which is a part of the first data line, a second data line formed in parallel with the first data line, and the second data A data line including a second source electrode which is a part of a line, and first and second drain electrodes respectively facing the first and second source electrodes with respect to the first and second gate electrodes; A protective film having a first contact hole exposing the first and second drain electrodes, A pixel electrode connected to the first and second drain electrodes through the first contact hole Including; The first and second drain electrodes are connected to each other and overlap with at least a portion of the sustain line. delete delete In claim 6, The gate wiring further includes first and second gate pads connected to the first and second gate lines, respectively, and the data wiring is first and second connected to the first and second data lines, respectively. Further includes a data pad, The passivation layer and the gate insulating layer have second and third contact holes exposing the first and second gate pads and fourth and fifth contact holes exposing the first and second data pads, respectively. The first and second auxiliary gate pads and the fourth and fifth contact holes that are connected to the first and second gate pads through the second and third contact holes, respectively, and formed of the same layer as the pixel electrode. First and second auxiliary data pads connected to the first and second data pads through the same layer as the pixel electrode, respectively. Thin film transistor substrate for a liquid crystal display device further comprising. In claim 6, First and second ohmic contacts formed on the first semiconductor layer and separated from the first gate electrode, and third and formed separated from the second gate electrode and on the second semiconductor layer; A thin film transistor substrate for liquid crystal display device further comprising a fourth ohmic contact layer. Forming a gate wiring on the insulating substrate, the gate wiring including a first gate line and a first gate electrode which is a part of the first gate line, a second gate line parallel to the first gate line, and a second gate electrode which is a part of the second gate line; Forming a sustain wiring on the same layer as the gate wiring; Forming a gate insulating film on the gate wiring; Forming first and second semiconductor layers on the gate insulating layer, A first source electrode which is a part of the first data line and the first data line, a second data line that is parallel to the first data line, a second source electrode that is part of the second data line on the first and second semiconductor layers, and the first And forming a data line including a drain electrode having first and second branches respectively facing the second source electrode, Forming a protective film having a first contact hole exposing the drain electrode, Forming a pixel electrode connected to the drain electrode through the first contact hole Including; And the drain electrode is formed to overlap at least a portion of the sustain wiring. delete In claim 11, The gate wiring further includes first and second gate pads connected to the first and second gate lines, respectively, and the data wiring is first and second connected to the first and second data lines, respectively. Further includes a data pad, The passivation layer and the gate insulating layer have second and third contact holes exposing the first and second gate pads and fourth and fifth contact holes exposing the first and second data pads, respectively. First and second auxiliary gate pads are formed through the second and third contact holes, respectively, and are formed on the same layer as the pixel electrode, and the fourth and fifth contact holes are formed. And forming first and second auxiliary data pads on the same layer as the pixel electrode, respectively, connected to the first and second data pads through the first and second data pads, respectively. In claim 11, First and second ohmic contacts that are separated from the first gate electrode on the first semiconductor layer and third and fourth ohmic contacts that are separated from the second gate electrode on the second semiconductor layer. A method of manufacturing a thin film transistor substrate for a liquid crystal display device, further comprising the step of forming a layer.

Images