KR100727296B1 - Plasma display apparatus and driving method thereof - Google Patents

Abstract

A plasma display apparatus and a driving method thereof are provided to prevent electrical damage to driving elements in the plasma display apparatus by adjusting applying time of a ramp-up waveform. A plasma display apparatus includes a plasma display panel, a driver, and a driving pulse controller. The plasma display panel includes scan and sustain electrodes(Y,Z), and address electrodes(X) which are formed to cross the scan and sustain electrodes. The driver applies a driving voltage to the electrodes during a reset period, an address period after the reset period, or a sustain period after the address period. The driving pulse controller applies a set-up waveform, which gradually rises to a first voltage(Vsc) with a first slope and a second voltage(Vsc+Vs) with a second slope, to the scan electrodes during a set-up period of the reset period, applies a first bias waveform with positive polarity to the address electrodes, applies a ramp-down waveform with negative polarity to the scan electrodes, and applies a positive polarity waveform to the sustain electrodes.

Description

Plasma display device and driving method thereof

1 is a diagram showing the structure of a typical plasma display panel.

2 is a diagram illustrating a method of implementing image gradation of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

4 is a diagram showing a distribution of a discharge start voltage according to a distance between electrodes.

5 is a diagram showing a process of changing the cell voltage when the setup voltage of the conventional setup waveform is applied to the scan electrode Y according to the distance between the discharge electrodes.

6 is a diagram for explaining a first embodiment of the plasma display device according to the present invention;

Fig. 7 is a view for explaining an example of the first embodiment of the method of driving the plasma display device of the present invention.

FIG. 8 is a diagram for explaining the reason why a positive first bias waveform is applied to the address electrode X while the setup waveform is applied to the scan electrode Y. FIG.

9 is a diagram for explaining the superposition state of the sustain pulses applied to the scan electrode Y and the sustain electrode Z in the sustain period.

FIG. 10 is a diagram for explaining a positive voltage applied to the address electrode X in response to the first sustain pulse applied in the sustain period. FIG.

11 is a view for explaining a long gap electrode structure.

12 is a diagram for explaining another example of the first embodiment of the method of driving the plasma display device of the present invention;

Fig. 13 is a view for explaining still another example of the first embodiment of the method of driving the plasma display device of the present invention.

Fig. 14 is a view for explaining still another example of the first embodiment of the method of driving the plasma display device of the present invention.

FIG. 15 is a view illustrating a process of voltage change in a discharge cell during a setup period using a hexagonal voltage curve (Vt-Curve). FIG.

16A to 16B illustrate a method of applying a first bias waveform only in selected subfields among a plurality of subfields of a frame.

FIG. 17 is a diagram for explaining the magnitude of voltage of a reset waveform in a plurality of subfields of a frame; FIG.

18 is a diagram for explaining a second embodiment of the plasma display device according to the present invention;

19A to 19B are views for explaining a second embodiment of a method of driving a plasma display device of the present invention.

20 is a diagram for explaining in detail the waveform applied to the sustain electrode Z in the set-down period.

21 is a diagram for explaining a third embodiment of the plasma display device according to the present invention;

22A to 22B are diagrams for explaining a third embodiment of the driving method of the plasma display device of the present invention.

Fig. 23 is a diagram for explaining in detail the waveform applied to the scan electrode Y in the setdown period.

24 is a view for explaining the case where the voltage of the scan reference waveform rises sharply in the conventional drive waveform.

25 is a diagram for explaining the case where the voltage of the scan reference waveform gradually rises in the drive waveform of the present invention;

26 is a diagram for explaining a concept of a scan electrode group;

27A to 27B are views for explaining a driving method of adjusting an application time of a rising waveform in accordance with the scan electrode group of FIG.

28A to 28B are views for explaining a driving method for differently adjusting the application time of the rising waveform for each scan electrode;

29 is a diagram for explaining a fourth embodiment of the plasma display device according to the present invention;

30A to 30B are views for explaining a fourth embodiment of a method of driving a plasma display device of the present invention.

<Explanation of symbols for the main parts of the drawings>

600; Plasma display panel 601; Data driver

602; Scan driver 603; Sustain drive

604; Driving pulse controller

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to adjust a driving waveform supplied to an address electrode (X) while a setup waveform is supplied to a scan electrode (Y) in a reset period. The present invention relates to a plasma display device and a driving method thereof for preventing the light emission efficiency and improving the luminous efficiency.

In general, a plasma display panel is a partition wall formed between a front panel and a rear panel to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 illustrates a structure of a general plasma display panel.

As shown in FIG. 1, a plasma display panel includes a front panel including a plurality of sustain electrodes formed by pairing a scan electrode 102 and a sustain electrode 103 on a front substrate 101, which is a display surface on which an image is displayed. The rear panel 110 on which the plurality of address electrodes 113 are arranged so as to intersect the plurality of storage electrodes described above on the back substrate 111 forming the back surface 100 and the rear surface is coupled in parallel with a predetermined distance therebetween.

The front panel 100 is made of a scan electrode 102 and a sustain electrode 103, that is, a transparent electrode (a) formed of a transparent ITO material and a metal material to mutually discharge and maintain light emission of the cells in one discharge cell. The scan electrode 102 and the sustain electrode 103 provided as the bus electrode b are included in pairs. The scan electrode 102 and the sustain electrode 103 are covered by one or more upper dielectric layers 104 that limit the discharge current and insulate the electrode pairs, and to facilitate the discharge conditions on the upper dielectric layer 104 top surface. A protective layer 105 on which magnesium oxide (MgO) is deposited is formed.

The rear panel 110 is arranged such that a plurality of discharge spaces, that is, barrier ribs 112 of a stripe type (or well type) for forming discharge cells are maintained in parallel. In addition, a plurality of address electrodes 113 which perform address discharge to generate vacuum ultraviolet rays are arranged in parallel with the partition wall 112. On the upper side of the rear panel 110, R, G, and B phosphors 114 which emit visible light for image display during address discharge are coated. A lower dielectric layer 115 is formed between the address electrode 113 and the phosphor 114 to protect the address electrode 113.

A method of implementing image gradation in such a plasma display panel is shown in FIG. 2.

2 is a diagram illustrating a method of implementing image grayscale of a conventional plasma display panel.

As shown in FIG. 2, in the conventional method of expressing a gray level of a plasma display panel, a frame is divided into several subfields having different number of emission times, and each subfield is a reset period (RPD) for initializing all cells again. ) Is divided into an address period APD for selecting a cell to be discharged and a sustain period SPD for implementing gradation according to the number of discharges. For example, when displaying an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. 2, and eight subfields. Each of the SFs SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

The reset period and the address period of each subfield are the same for each subfield. The address discharge for selecting the cell to be discharged is caused by the voltage difference between the address electrode and the transparent electrode which is the scan electrode. The sustain period is increased at a rate of 2 ⁿ ( ^where n = 0, 1, 2, 3, 4, 5, 6, 7) in each subfield. In this way, the sustain period is different in each subfield, so that the gray scale of the image is expressed by adjusting the sustain period of each subfield, that is, the number of sustain discharges. The driving waveforms according to the driving method of the plasma display panel are shown in FIG. 3.

3 is a diagram illustrating a driving waveform according to a driving method of a conventional plasma display panel.

As shown in FIG. 3, the plasma display panel is driven by being divided into a reset period for initializing all cells, an address period for selecting a cell to be discharged, and a sustain period for maintaining discharge of the selected cell. In addition, an erase period for erasing wall charge in the discharged cell may be additionally included and driven.

In the reset period, a ramp-up waveform is simultaneously applied to all scan electrodes. This rising ramp waveform causes weak dark discharge within the full discharge cells. By this setup discharge, positive wall charges are accumulated on the address electrode and the sustain electrode, and negative wall charges are accumulated on the scan electrode.

During the set-down period, after the rising ramp waveform is supplied, the ramp ramp begins to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and then falls to a specific voltage level below the ground level voltage. ) Generates a weak erase discharge in the cells, thereby sufficiently erasing wall charges excessively formed in the scan electrode. By this set-down discharge, wall charges such that the address discharge can stably occur remain uniformly in the cells.

In the address period, a scan reference waveform of the scan reference voltage Vsc is applied to the scan electrode Y, and a negative scan voltage (-Vy) falling from the scan reference voltage Vsc of the scan reference waveform is applied to the scan electrode ( At the same time, the positive data voltage is applied to the address electrode in correspondence with the scan voltage. As the voltage difference between the scan voltage and the data voltage and the wall voltage generated in the reset period are added, address discharge is generated in the discharge cell to which the data voltage is applied. In the cells selected by the address discharge, wall charges such that a discharge can occur when a sustain pulse SUS of the sustain voltage Vs is applied are formed. The sustain bias voltage Vz is supplied to the sustain electrode Z so that the voltage difference with the scan electrode Y is reduced during the set down period and the address period so that erroneous discharge with the scan electrode Z does not occur.

In the sustain period, a sustain pulse Su of the sustain voltage Vs is applied to the scan electrode Y and the sustain electrodes Z alternately. In the cell selected by the address discharge, the sustain voltage, that is, the display discharge, is generated between the scan electrode Y and the sustain electrode Z every time the sustain pulse is applied as the wall voltage in the cell and the sustain voltage of the sustain pulse are added. .

After the sustain discharge is completed, in the erase period, a voltage of an erase ramp (Ramp-ers) waveform having a small pulse width and a low voltage level is supplied to the sustain electrode to erase the wall charge remaining in the cells of the full screen.

On the other hand, in recent years, the interval between the scan electrode (Y) and the sustain electrode (Z) is widened to improve the luminance of the plasma display panel.

As such, when the distance between the scan electrode Y and the sustain electrode Z increases, the light emission efficiency is improved by enlarging both photonic regions, but the increase of the distance between the electrodes causes an increase in the driving voltage. Accordingly, the probability of occurrence of bright spots during the reset process is increased to cause false discharge, and the power consumption is increased to decrease driving efficiency.

These problems will be described in more detail by using a hexagonal voltage curve (Vt-Curve) used for the discharge generation principle and the voltage margin of the plasma display panel.

4 is a diagram showing the distribution of discharge start voltages according to the distance between electrodes.

Referring to FIG. 4, the horizontal axis represents the relative voltage difference between the sustain electrode Z and the scan electrode Y, and the vertical axis represents the relative voltage difference between the address electrode X and the scan electrode Y.

The region inside the hexagonal voltage curve of FIG. 4 is a region where wall charges are distributed in the discharge cell, and no discharge occurs in this region.

Vf1 displayed in the three-quadrant discharge region of the voltage curve indicates a voltage at which discharge starts between the scan electrode Y and the sustain electrode Z when the distance between the scan electrode Y and the sustain electrode Z is relatively short. . When the distance between the Vf2 scan electrode Y and the sustain electrode Z is relatively long, the voltage at which discharge starts between the scan electrode Y and the sustain electrode Z is shown.

As can be seen from FIG. 4, the discharge start voltage increases in proportion to the difference in distance between the scan electrode Y and the sustain electrode Z. FIG. This may be expressed as Equation 1 below.

ΔV = Vf2-Vf1

As can be seen from Equation 1 and FIG. 4, it can be seen that a difference ΔV of the discharge start voltage occurs depending on the distance between the scan electrode Y and the sustain electrode Z.

The discharge by the setup voltage of the setup waveform applied in the setup period of the reset period of the conventional driving waveform of FIG. 3 using the hexagonal voltage curve is as follows.

5 is a diagram illustrating a process of changing the cell voltage when the setup voltage of the conventional setup waveform is applied to the scan electrode Y according to the distance between the discharge electrodes.

Referring to FIG. 5, point A of FIG. 5 represents a wall voltage immediately after the sustain voltage Vs of the last sustain pulse is applied to the sustain electrode Z.

Here, when the ramp-up waveform according to the conventional driving method is supplied to the scan electrode Y in the setup period of the reset period, the discharge cell voltage is the plane of three quadrants along the direction of the arrow shown from the point A. It moves through the discharge area. Here, when the discharge cell voltage reaches the boundary value of the surface discharge region in the three quadrants, surface discharge occurs between the scan electrode Y and the sustain electrode Z.

At this time, when the distance between the scan electrode (Y) and the sustain electrode (Z) is relatively short, surface discharge occurs at the point A '.

On the other hand, when the distance between the scan electrode Y and the sustain electrode Z is relatively long, surface discharge occurs at the point A ".

In this case, as illustrated, point A ″ is a region where the surface discharge and the counter discharge have a high probability of coexisting.

4 to 5 described above, if the interval between the scan electrode (Y) and the sustain electrode (Z) is increased to increase the luminous efficiency, the scan electrode (Y) and the address electrode unintentionally during the setup period of the reset period The probability of occurrence of opposite discharge between (X) is relatively high. In this case, when unintentional discharge between the scan electrode (Y) and the address electrode (X) occurs in the setup period of the reset period, the luminance of the plasma display panel is lowered, and an incorrect discharge is caused to cause the entire drive to become unstable. There is this.

In order to solve this problem, the present invention adjusts the driving waveform applied to the address electrode (X) while the setup waveform is applied to the scan electrode (Y) in the reset period to prevent the mis-discharge during the setup period, SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display device and a driving method thereof for improving luminous efficiency.

Another object of the present invention is to provide a plasma display device and a method of driving the same, which reduce noise generated in driving waveforms applied to the scan electrode Y in a period to prevent electrical damage of the device for the plasma display panel. There is this.

Plasma display device of the present invention for achieving the above object is a plasma display panel including a scan electrode and a sustain electrode, the address electrode formed in a direction crossing the scan electrode and the sustain electrode and a reset period, an address period, a sustain period Controlling a driver and a driver for applying a driving voltage to the electrodes in at least one of the at least one of the plurality of subfields of the frame to the first voltage at the first slope to the scan electrode in the setup period of the reset period. And a driving pulse control unit configured to apply a setup waveform that gradually rises to a second voltage at a second slope and gradually apply a first bias waveform having a positive polarity to the address electrode while the setup waveform is applied to the scan electrode. Characterized in that.

In addition, the peak voltage of the above-described first bias waveform may be 1 to 1.5 times the data voltage applied to the address electrode in the address period.

In addition, the above-described first bias waveform is characterized in that the rectangular waveform or ramp waveform.

In addition, the above-described driving pulse controller is characterized in that the first bias waveform is applied before the setup waveform.

In addition, the above-described driving pulse controller is characterized in that the first bias waveform is applied in synchronization with the setup waveform.

In addition, the above-described driving pulse controller is characterized in that the first bias waveform is applied in one or more subfields of the frame.

The driving pulse controller may be configured such that the pulse width of the first bias waveform is widest in the subfield having the lowest gray scale weight among the plurality of subfields of the frame.

The driving pulse controller may be configured to apply the first bias waveform to a low gray level subfield having a low gray scale weight among a plurality of subfields of the frame.

The low gray level subfield may be one or more of the subfields from the first subfield to the third subfield in the order of low gray scale weight among the plurality of subfields of the frame.

The driving pulse controller may be configured such that the pulse width of the first bias waveform is widest in the subfield having the lowest gray scale weight among the low gray subfields of the frame.

In addition, the aforementioned first slope is larger than the second slope.

In addition, the magnitude of the aforementioned first voltage may be equal to the magnitude of the voltage of the scan reference waveform applied to the scan electrode in the address period after the reset period.

In addition, the magnitude of the above-described first voltage is characterized in that the 100V or more and 150V or less.

In addition, the magnitude of the above-described second voltage is characterized in that the 230V or more and 350V or less.

In addition, the above-described driving pulse controller is characterized in that the magnitude of the second voltage in any one of the plurality of subfields of the frame is different from the other subfields.

In addition, the above-described driving pulse controller may be configured such that the magnitude of the second voltage in a subfield having a lower gray scale weight is greater than another subfield among any two subfields having different gray weights.

In addition, the aforementioned drive pulse controller is characterized in that the sustain bias waveform having a voltage magnitude of 80V or more and 120V or less is applied to the sustain electrode in the address period.

In addition, the driving pulse controller described above does not overlap the first sustain pulse applied to the scan electrode in the sustain period and the first sustain pulse applied to the scan electrode, and the last sustain pulse applied to the scan electrode in the sustain period. Also, the last sustain pulse applied to the sustain electrode may not be overlapped.

In addition, the above-described driving pulse controller is characterized in that the second bias waveform of positive polarity is applied to the address electrode while the first sustain pulse is applied to the scan electrode or the sustain electrode in the sustain period.

In addition, the voltage of the above-described second bias waveform is the same as the voltage of the data pulse applied to the voltage of the first bias waveform or the address electrode.

In addition, the above-mentioned interval between the scan electrode and the sustain electrode is characterized by being 90 µm (micrometer) or more and 200 µm (micrometer) or less.

In addition, the above-described scan electrode and the sustain electrode each include a transparent electrode and a bus electrode, the interval between the scan electrode and the sustain electrode is characterized in that the interval between the transparent electrode of the scan electrode and the transparent electrode of the sustain electrode.

In addition, the driving pulse controller described above is applied to the scan electrode a negative waveform including a falling ramp waveform in which the voltage gradually falls before the reset period of the first subfield of the plurality of subfields, and the positive electrode to the sustain electrode. It is characterized in that the polarity waveform is applied.

In addition, the above-described negative waveform is characterized in that the lowest voltage is the same as the voltage of the scan pulse applied to the scan electrode in the address period.

In addition, the above-mentioned positive waveform is characterized in that the voltage is equal to the voltage of the sustain pulse applied in the sustain period.

In addition, the above-mentioned voltage difference between the first voltage and the second voltage is characterized in that the same as the magnitude of the voltage of the sustain pulse applied to the scan electrode or the sustain electrode in the sustain period.

In addition, another plasma display device of the present invention for achieving the above object is a plasma display panel including a scan electrode and a sustain electrode, the address electrode formed in a direction intersecting the scan electrode and the sustain electrode and a reset period, the address A driving part for applying a driving voltage to the electrodes in one or more of a period, a sustain period, and a driving part, so that at least one subfield of the plurality of subfields of the frame has a first slope to the scan electrode in the setup period of the reset period. Apply a setup waveform that gradually rises up to the first voltage and then gradually rises up to the second voltage with a second slope, and applies a first bias waveform of positive polarity to the address electrode while the setup waveform is applied to the scan electrode, First with scan electrode after setup period Scan pulse is supplied to the size of the voltage applied to the sustain electrodes in the period between the previous preferably includes a driving pulse control section to be lower than that of the sustain bias voltage waveform applied to the sustain electrode in the address period.

In addition, the above-described driving pulse control unit is within a period from after the setup period until before the first scan pulse is supplied to the scan electrode, The voltage applied to the sustain electrode is kept equal to the voltage applied to the sustain electrode in the setup period, and at the end of the set-down period, the voltage is raised to a voltage that is greater than the voltage applied to the sustain electrode in the setup period and lower than the voltage of the sustain bias waveform. Characterized in that.

In addition, the driving pulse control unit maintains the voltage applied to the sustain electrode at the ground level GND within the period after the setup period and before the first scan pulse is supplied to the scan electrode. At the end of is characterized in that to increase to a voltage greater than the voltage of the ground level and lower than the voltage of the sustain bias waveform.

In addition, another plasma display apparatus of the present invention for achieving the above object is a plasma display panel including a scan electrode and a sustain electrode, the address electrode formed in a direction crossing the scan electrode and the sustain electrode and a reset period, A driver and a driver for applying a driving voltage to the electrodes in one or more of an address period and a sustain period are controlled, so that at least one subfield of a plurality of subfields of a frame is provided to the scan electrode in a setup period of the reset period. Apply a setup waveform that gradually rises to a first voltage at one slope and then gradually rises to a second voltage at a second slope, and applies a positive first bias to the address electrode while the setup waveform is applied to the scan electrode. Allow the waveform to be applied and set up In the set-down period after the period, a falling waveform falling to a third voltage is applied to the scan electrode, and after a rising waveform rising to a predetermined slope from the third voltage to a fourth voltage is applied, And a driving pulse control unit configured to apply a scan pulse falling to 5 voltages.

In addition, the predetermined slope of the rising waveform described above is smaller than the slope of the sustain pulse applied in the sustain period.

The rising waveform may be maintained at the fourth voltage for a predetermined period of time.

In addition, the aforementioned rising waveform may be applied until the first scan pulse of the scan pulses applied to the scan electrode is applied.

In addition, the application time of the above-mentioned rising waveform is characterized in that it is within the range of 0 ms (microsecond) and 20 ms (microsecond) or less.

In addition, the application time of the above-mentioned rising waveform is characterized in that it is in the range of 6 ms (microsecond) or more and 10 ms (microsecond) or less.

In addition, the third voltage and the fifth voltage described above are the same.

In addition, the driving pulse controller may be configured so that the application time of the rising waveform applied to at least one scan electrode of the scan electrodes is different from the application time of the rising waveform applied to at least one other scan electrode. .

In addition, the above-described scan electrodes are divided into two or more scan electrode groups including at least one scan electrode, and the driving pulse controller has at least one or more application times of the rising waveform applied to the at least one scan electrode group. It is characterized in that it is different from the application time of the rising waveform applied to the other scan electrode group.

In addition, the aforementioned two or more scan electrode groups are characterized by including the same number of the scan electrodes.

The scan electrode group may include at least one scan electrode group different from the number of scan electrodes included in the other scan electrode groups.

In addition, all the scan electrodes included in the above-described scan electrode group may have the same application time of the rising waveform.

In addition, the difference in the application time of the rising waveform is applied to the two or more scan electrode group including at least one scan electrode is characterized in that the same or different.

In addition, another plasma display apparatus of the present invention for achieving the above object is a plasma display panel including a scan electrode and a sustain electrode, the address electrode formed in a direction crossing the scan electrode and the sustain electrode and a reset period, A driving unit for applying a driving voltage to the electrodes in at least one of an address period and a sustain period and the driving unit are controlled so that at least one of the plurality of subfields of the frame is connected to the scan electrode in the setup period of the reset period. Apply a setup waveform that gradually rises to a first voltage with a first slope and then gradually rises to a second voltage with a second slope, and applies a first positive polarity to the address electrode while the setup waveform is applied to the scan electrode. A bias waveform is applied, and In the set-down period after the setup period, a falling waveform gradually descending to the third voltage is applied to the scan electrode, and after the rising waveform gradually rising with a predetermined slope from the third voltage to the fourth voltage is applied, Sustain is applied to the sustain electrode in the address period to the sustain electrode within the period from which the scan pulse falling from the fourth voltage to the fifth voltage is applied and before the first scan pulse is supplied to the scan electrode. And a driving pulse controller for applying a voltage lower than the voltage of the bias waveform.

Hereinafter, embodiments of a plasma display device and a driving method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

<First Embodiment>

6 is a view for explaining a first embodiment of the plasma display device according to the present invention.

As shown in FIG. 6, the plasma display apparatus of the present invention includes a plasma display panel 600, a data driver 601, a scan driver 602, a sustain driver 603, and a driving pulse controller 604.

Here, the above-described plasma display panel 600 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, a plurality of electrodes, for example, the scan electrode (Y) and the sustain electrode (Z) Are formed in pairs, and the address electrodes X are formed to intersect the scan electrode Y and the sustain electrode Z.

In the data driver 601, reverse gamma correction and half tone correction are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield by a subfield mapping circuit. Is supplied. The data driver 601 applies a predetermined driving voltage to the address electrode X in at least one of a reset period, an address period, and a sustain period. For example, the data driver 601 applies data supplied in the address period to the address electrode X under the control of the drive pulse controller 604.

The scan driver 602 applies a predetermined driving voltage to the scan electrode Y in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 604. For example, a reset waveform including a reset pulse, for example, a rising ramp waveform Ramp-up and a falling ramp waveform Ramp-down, is applied to the scan electrode Y during the reset period. In addition, the scan driver 602 sequentially applies the scan pulse Sp of the negative scan voltage (-Vy) to the scan electrode Y during the address period, and applies the sustain pulse SUS to the scan electrode Y during the sustain period. ) Is applied.

The sustain driver 603 applies a predetermined driving voltage to the sustain electrode Z in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 604. For example, the positive sustain bias waveform Vzb is supplied to the sustain electrode Z during the address period, and is alternately operated with the scan driver 602 during the sustain period to supply the sustain pulse SUS to the sustain electrode Z. do.

The drive pulse control unit 604 controls predetermined control signals CTRX and CTRY for controlling the operation timing and synchronization of the data driver 601, the scan driver 602 and the sustain driver 603 in the reset period, the address period, and the sustain period. , CTRZ, and the control signal is supplied to the data driver 601, the scan driver 602, and the sustain driver 603, respectively, to supply the data driver 601, the scan driver 602, and the sustain driver 603. To control.

In particular, the driving pulse controller 604 increases the first voltage to the first voltage to the scan electrode Y in the one or more subfields of the plurality of subfields of the frame in the setup period of the reset period, and then to the second voltage to the second slope. The rising setup waveform is applied to the first waveform, and the first bias waveform of the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y. That is, the driving pulse controller 604 supplies a predetermined control signal to the scan driver 602, causing the scan driver 602 to scan electrodes in one or more of the plurality of subfields of the frame in the setup period of the reset period. Apply a setup waveform that rises to the first voltage at a first slope and then rises to a second voltage at a second slope to (Y), and the drive pulse controller 604 sends a predetermined control signal to the data driver 601. The data driver 601 causes the data driver 601 to apply a positive first bias waveform to the address electrode X while the setup waveform is applied to the scan electrode Y described above.

The configuration and operation of the first embodiment of the plasma display device of the present invention will be more clearly understood through the description of the first embodiment of the method of driving the plasma display device.

7 is a view for explaining an example of the first embodiment of the method of driving the plasma display device of the present invention.

Referring to FIG. 7, in the first exemplary embodiment of the method of driving the plasma display device, the first slope is applied to the scan electrode Y in the setup period of the reset period in one or more of the plurality of subfields of the frame. A setup waveform that gradually rises up to the voltage and then gradually rises up to the second voltage with the second slope is applied, and the first bias waveform of the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y as described above. Is applied.

Here, the absolute value of the first slope of the above-described setup waveform is preferably larger than the absolute value of the second slope. That is, the first slope is steeper than the second slope.

In addition, the above-described first voltage is preferably equal in magnitude to the scan reference voltage Vsc of the scan reference waveform applied to the scan electrode Y in the address period after the reset period. For example, when the voltage of the scan reference waveform applied to the scan electrode Y in the address period is -Vsc, the magnitude of the first voltage is Vsc of | -Vsc |. It is also preferable that the magnitude of this first voltage is 100 V or more and 150 V or less.

In addition, it is preferable that the above-mentioned second voltage is the sum of the voltage of the scan reference waveform, that is, the scan reference voltage Vsc and the sustain voltage Vs applied in the sustain period. It is also preferable that the magnitude of this second voltage is 230 V or more and 350 V or less.

Such, my The voltage difference between the first voltage and the second voltage is preferably equal to the magnitude of the voltage Vs of the sustain pulse applied to the scan electrode Y or the sustain electrode Z in the sustain period.

The magnitudes of the first voltage and the second voltage are relatively small compared with the conventional driving waveform of FIG. 3. The reason why the magnitudes of the first voltage and the second voltage, that is, the voltages of the reset pulses can be made relatively small is that the pre-reset period is further included before the reset period. Looking at the pre-reset period in more detail as follows.

This pre-reset period is included before the reset period of the first subfield of the plurality of subfields of the above-described frame. For example, assuming that one frame is composed of a total of 12 subfields from the first subfield to the twelfth subfield in order of magnitude of the gray scale weight, the gray scale weight of the total 12 subfields is the most. The pre-reset period is further included before the reset period of the first subfield, which is the low subfield.

In this pre-reset period, a negative waveform including a falling ramp waveform in which voltage gradually falls is applied to the scan electrode Y, and a positive waveform is applied to the sustain electrode Z.

Here, it is preferable that the above-mentioned negative waveform is equal to the voltage (-Vy) of the scan pulse SP to which the lowest voltage is applied to the scan electrode Y in the address period.

In addition, it is preferable that the positive waveform is equal to the voltage Vs of the sustain pulse applied in the sustain period.

In this pre-reset period, positive wall charges are accumulated on the scan electrode Y in the discharge cell by the negative waveform applied to the scan electrode Y. In addition, negative wall charges are accumulated on the sustain electrode Z in the discharge cell by the positive waveform applied to the sustain electrode Z. Thus, the distribution of the wall charges formed in the discharge cells in the pre-reset period is maintained until the reset period of the first subfield having the lowest gray scale weight, so that the voltage of the setup waveform applied in the reset period of the first subfield is determined by the scan reference. Even if the voltage is set to the sum of the voltage Vsc and the sustain voltage Vs, in other words, an effective reset can be performed even if the voltage of the setup waveform applied in the reset period of the first subfield is set to a relatively low voltage. Will be.

On the other hand, the rectangular waveform of the first bias waveform applied to the above-described address electrode X, the peak voltage (Vxb1) of the data voltage of the data pulse applied to the address electrode (Xd) in the address period (Vd) It is preferable that they are 1 or more and 1.5 times or less. For example, assuming that the data voltage Vd of the data pulse is 100V, the peak voltage of the above-described first bias waveform has a range of 100V or more and 150V or less.

The reason why the first bias waveform having the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y as described above is that the separation distance between the scan electrode Y and the address electrode X is determined by the scan electrode ( This is to consider the point that is relatively shorter than the separation distance between Y) and the sustain electrode (Z).

As described above, a reason for applying the first bias waveform having the positive polarity to the address electrode X while the setup waveform is applied to the scan electrode Y will be described with reference to FIG. 8.

FIG. 8 is a diagram for explaining the reason why the first bias waveform having the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y. FIG.

Referring to FIG. 8, (a) shows a setup discharge form in a discharge cell when the first bias waveform is omitted in a long gap structure in which the distance between the scan electrode Y and the sustain electrode Z is relatively large. (B) shows the setup discharge form in the discharge cell when the first bias waveform is applied to the address electrode X in the long gap structure in which the distance between the scan electrode Y and the sustain electrode Z is relatively large. Is shown.

Referring to (a), since the interval between the scan electrode Y and the sustain electrode Z is relatively large, and the interval between the scan electrode Y and the address electrode X is relatively small, scanning is performed in the setup period of the reset period. When the setup waveform is applied to the electrode Y, the intensity of the counter discharge generated between the scan electrode Y and the address electrode X is greater than the surface discharge generated between the scan electrode Y and the sustain electrode Z. do. This causes problems such as unstable reset discharge and bright spots.

Referring to (b), when the first bias waveform having the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y, the distance between the scan electrode Y and the sustain electrode Z is relatively small. Although large and the distance between the scan electrode Y and the address electrode X is relatively small, the scan electrode Y and the address electrode X when the setup waveform is applied to the scan electrode Y in the setup period of the reset period. By reducing the voltage difference therebetween, the surface discharge between the scan electrode (Y) and the sustain electrode (Z) is strengthened, while the counter discharge between the scan electrode (Y) and the address electrode (X) is relatively weak, whereby the reset discharge is stabilized. In addition, it is to suppress the occurrence of bright spots.

On the other hand, the first bias waveform described above is applied in synchronization with the setup waveform, that is, the setup waveform gradually rising up to the first voltage with the first slope and then gradually rising up to the second voltage with the second slope, or applied before the setup waveform. It is preferable to be. Here, in FIG. 7, only the first bias waveform is applied before the setup waveform, and the first bias waveform is applied in synchronization with the setup waveform will be described later in other drawings.

On the other hand, in the set down period and the address period after the reset period, a scan reference waveform having a scan reference voltage Vs is applied to the scan electrode Y, and a scan pulse SP falling from the scan reference voltage Vsc is applied. The sustain bias waveform of the sustain bias voltage Vzb applied in the set down period is continuously applied to the sustain electrode Z, thereby generating surface discharge between the scan electrode Y and the sustain electrode Z in the address period. Suppress

It is preferable that the voltage Vzb of the sustain bias waveform is set within a range of 80V or more and 120V or less.

Here, it is preferable that the level of the voltage of the above-mentioned scan reference waveform is a negative level. In other words, the magnitude of the voltage of the scan reference waveform is Vsc, but the voltage level is a negative level. That is, the voltage level of the scan reference waveform is -Vsc based on the ground level GND.

Thus, by setting the voltage level of the scan reference waveform to a negative level equal to or less than the ground level GND, the scan pulse falling from the scan reference voltage to the voltage of -Vy even when the magnitude of the voltage of the scan reference waveform is relatively small ( The voltage difference between the SP and the data pulse applied to the address electrode X can be sufficiently secured. Accordingly, the electrical burden of the driving circuit can be reduced.

In the sustain period after the address period, a sustain pulse of the sustain voltage Vs is applied to the scan electrode Y and the sustain electrode Z alternately.

It is preferable that the first sustain pulse and the last sustain pulse among the sustain pulses applied in the sustain period are set not to overlap, which will be described with reference to FIG. 9.

FIG. 9 is a view for explaining an overlap state of a sustain pulse applied to the scan electrode Y and the sustain electrode Z in the sustain period.

Referring to FIG. 9, (a) shows an overlapping state of the remaining sustain pulse pairs except for the first sustain pulse pair and the last sustain pulse pair among the sustain pulses applied to the scan electrode Y and the sustain electrode Z in the sustain period. (B) shows an overlapping state of the first sustain pulse pair and the last sustain pulse pair among the sustain pulses applied to the scan electrode Y and the sustain electrode Z in the sustain period.

Referring to (a), in the sustain period, the remaining sustain pulse pairs except the first sustain pulse pair and the last sustain pulse pair among the sustain pulses applied to the scan electrode Y and the sustain electrode Z overlap each other by the interval d. That is, in the remaining sustain pulse pairs except for the first and last sustain pulse pairs, the sustain pulses applied to the scan electrode Y and the sustain pulses applied to the sustain electrode Z overlap each other. As a result, a larger number of sustain pulses can be applied to the scan electrode Y and the sustain electrode Z in a limited sustain period, and the sustain discharge is stabilized and the efficiency of light emission due to the sustain discharge is increased.

Referring to (b), the first sustain pulse pair and the last sustain pulse pair of the sustain pulses applied to the scan electrode Y and the sustain electrode Z in the sustain period do not overlap each other. This stabilizes the sustain discharge caused by the relatively unstable first sustain pulse. Further, since the last sustain pulse pair does not overlap, the distribution of the wall charges in the discharge cells by the last sustain pulse pair described above is advantageous to the reset discharge occurring in the reset period of the other subfields after successive.

In this sustain period, when the first sustain pulse is applied, the surface discharge between the scan electrode Y and the sustain electrode Z is likely to become unstable due to the interference of the address electrode X. Accordingly, when the first sustain pulse is applied to either the scan electrode Y or the sustain electrode Z, a predetermined voltage is applied to the address electrode X to stabilize the sustain discharge. See FIG. 10. Looking at it as follows.

FIG. 10 is a diagram for describing a positive voltage applied to the address electrode X in response to the first sustain pulse applied in the sustain period.

Referring to FIG. 10, (a) shows an address when the first sustain pulse is applied to either the scan electrode Y or the sustain electrode Z in the sustain period of the driving waveform according to the driving method of the plasma display apparatus of the present invention. It is shown that the second bias waveform of the positive voltage Vxb2 is applied to the electrode X. In addition, (b) except for the first sustain pulse applied to any one of the scan electrode (Y) or the sustain electrode (Z) of the sustain pulses applied in the sustain period of the driving waveform according to the driving method of the plasma display device of the present invention. Sustain pulses are shown.

Referring to (a), when the first sustain pulse is applied to either the scan electrode Y or the sustain electrode Z in the sustain period, the second bias waveform of the positive voltage Vxb2 is applied to the address electrode X. Is approved. This is because when the first sustain pulse is applied to either the scan electrode (Y) or the sustain electrode (Z) in the sustain period, the scan electrode (Y) and the surface discharge generated between the scan electrode (Y) and the sustain electrode (Z) are different. Since the intensity of the opposing discharge generated between the address electrodes X is greater and the sustain discharge is likely to be unstable, the first sustain pulse is applied to either the scan electrode Y or the sustain electrode Z to prevent this. When the second bias waveform of the positive voltage (Vxb2) is applied to the address electrode to reduce the voltage difference between the first electrode of the scan electrode (Y) or the sustain electrode (Z) to which the first sustain pulse is applied and the address electrode (X) By intensifying the surface discharge between the scan electrode Y and the sustain electrode Z, while the counter discharge between the scan electrode Y and the address electrode X is relatively weak, It is to stabilize the discharge stain.

As shown in (a), when the sustain discharge by the first sustain pulse is stabilized, subsequent sustain discharges are generated depending on the distribution of wall charges in the discharge cells formed by the first sustain pulse. When the sustain pulse of is supplied, the second bias waveform may be omitted.

The voltage Vxb2 of the second bias waveform is the same as the voltage Vxb1 of the first bias waveform in the setup period of the above-described reset period or the voltage Vd of the data pulse applied to the address electrode X in the address period. It is preferable that the same as).

The plasma display device and the driving method thereof according to the present invention described above are more effectively applied to a long gap structure having a relatively large distance between the scan electrode Y and the sustain electrode Z in the discharge cell. The reason for this is that as described above, in the long wrap structure, the interval between the scan electrode Y and the sustain electrode Z is relatively large, and the interval between the scan electrode Y and the address electrode X is relatively small. When surface discharge occurs between the electrode Y and the sustain electrode Z, the surface discharge between the scan electrode Y and the sustain electrode Z is more likely to become unstable due to the interference by the voltage of the address electrode X. Because it increases.

In addition, the above-described long gap is defined as the interval between the scan electrode (Y) and the sustain electrode (Z), which will be described with reference to FIG.

11 is a view for explaining a long gap electrode structure.

Referring to FIG. 11, the gap between the scan electrode Y and the sustain electrode Z is treated as a long gap electrode structure when the gap is greater than 90 um (micrometer). That is, the plasma display device and the driving method thereof of the present invention are more effectively applied when the distance between the scan electrode Y and the sustain electrode Z is 90 um (micrometer) or more. More preferably, the plasma display device and the driving method thereof according to the present invention are applied when the interval between the scan electrode Y and the sustain electrode Z is 90 um (micrometer) or more and 200 um (micrometer) or less.

11 illustrates a case in which the aforementioned scan electrode Y and the sustain electrode Z each include a transparent electrode a and a bus electrode b. In this case, the interval between the scan electrode Y and the sustain electrode Z is preferably set to the interval between the transparent electrode a of the scan electrode Y and the transparent electrode a of the sustain electrode Z.

In FIG. 7 described above, the first bias waveform is only illustrated and described before being applied to the setup waveform, that is, the waveform which gradually rises to the first voltage with the first slope and then gradually rises to the second voltage with the second slope. Alternatively, the first bias waveform may be applied in synchronization with the setup waveform. This will be described with reference to FIG. 12.

12 is a view for explaining another example of the first embodiment of the method of driving the plasma display device of the present invention.

Referring to FIG. 12, unlike FIG. 7, the first bias waveform is applied in synchronization with a setup waveform, that is, a waveform gradually rising up to a first voltage with a first slope and gradually rising up to a second voltage with a second slope. The first bias waveform of FIG. 12 is the same rectangular waveform as in FIG. 7 described above.

The driving waveform of FIG. 12 differs from the above-described driving waveform of FIG. 7 except that the first bias waveform is applied in synchronization with the setup waveform, and is substantially the same as the driving waveform of FIG.

In the driving waveforms of FIGS. 7 to 12 described above, only the first bias waveform is a driving waveform. However, the first bias waveform may be set to a ramp waveform in which the voltage gradually rises. Looking at it as follows.

13 is a view for explaining still another example of the first embodiment of the method of driving the plasma display device of the present invention.

Referring to FIG. 13, unlike FIG. 7 to FIG. 12, the first bias waveform is a ramp waveform in which the voltage gradually rises.

This is because, during the setup period, a setup waveform is applied to the scan electrode Y starting from the ground, rising to the first voltage Vsc with the first slope, and then rising to the second voltage Vsc + Vs with the second slope. In consideration of this point, a ramp waveform having a slope corresponding to the slope of the setup waveform applied to the scan electrode Y is also applied to the address electrode X more efficiently to counter discharge discharge between the scan electrode Y and the address electrode X. To prevent that.

The driving waveform of FIG. 13 is substantially the same as the driving waveform of FIGS. 7 to 12 except that the first bias waveform is a ramp waveform in which the voltage gradually increases as compared with the driving waveform of FIGS. 7 to 12. Duplicate description will be omitted.

In FIG. 13 described above, the first bias waveform is only illustrated and explained before being applied to the setup waveform, that is, the waveform which gradually rises to the first voltage with the first slope and then gradually rises to the second voltage with the second slope. Alternatively, the first bias waveform may be applied in synchronization with the setup waveform. This will be described with reference to FIG. 14.

14 is a view for explaining still another example of the first embodiment of the method of driving the plasma display device of the present invention.

Referring to FIG. 14, unlike FIG. 13, the first bias waveform is applied in synchronization with a setup waveform, that is, a waveform gradually rising up to a first voltage with a first slope and gradually rising up to a second voltage with a second slope. The first bias waveform of FIG. 14 is the same ramp waveform as FIG. 13 described above.

The driving waveform of FIG. 14 differs from the driving waveform of FIG. 13 described above only in that the first bias waveform is applied in synchronization with the setup waveform, and is substantially the same as the driving waveform of FIG.

Hexagonal voltage used for the discharge generation principle of the plasma display panel and the measurement of the voltage margin of the voltage in the discharge cell according to the driving waveform according to the first embodiment of the driving method of the plasma display device of the present invention described in detail above. Looking in more detail by using the curve (Vt-Curve) as shown in Figure 15.

FIG. 15 is a view illustrating a process of changing a voltage in a discharge cell during a setup period using a hexagonal voltage curve Vt-Curve.

Referring to FIG. 15, the point A1 represents the state of the wall voltage in the discharge cell immediately after the last sustain pulse is applied to the sustain electrode Z.

Thereafter, in the setup period, the setup waveform starting from the ground GND to the scan electrode Y and rising to the first voltage Vsc with the first slope and then rising to the second voltage Vsc + Vs with the second slope is shown. In this case, when the first bias waveform of the positive voltage Vxb1 is applied to the address electrode X, the voltage in the discharge cell moves to the point A2.

That is, it moves to the point A2 by adding the wall voltage at the point A1 and the externally applied voltage Vx applied to the address electrode X, that is, the voltage of the first bias waveform.

When the scan waveform Y is applied to the setup waveform starting at the ground level GND and rising to the first voltage Vsc with the first slope and then rising to the second voltage Vsc + Vs with the second slope, the cell The voltage moves along the direction of the solid arrow shown.

The scan electrode at the moment when the sum of the wall voltage Vw at the point A2 and the voltage Vsc + Vs of the setup waveform applied externally exceeds the discharge start voltage Vw + V ₂ ′, that is, the point A22 in FIG. 15. The setup discharge in the form of surface discharge between (Y) and the sustain electrode Z is generated stably.

If the address electrode X is maintained at the ground level GND during the setup period, when the setup waveform is applied to the scan electrode Y, the voltage in the discharge cell moves along the direction of the dotted line arrow shown.

The scan electrode and the sustain at the moment when the sum of the wall voltage Vw at the point A1 and the voltage Vsc + Vs of the setup waveform applied from the outside exceeds the discharge start voltage Vw + V2, that is, at the point A11 of FIG. 15. Surface discharge between the electrodes occurs.

However, as illustrated in FIG. 15, the A11 point is adjacent to the counter discharge region, and thus, a region where the unintentional counter discharge between the scan electrode Y and the address electrode X is likely to occur during the setup process is high.

In general, considering that the opposite discharge has the characteristics of a strong discharge having a high light emission amount, the unintentional generation of the undesired opposite discharge serves as a major factor for lowering the luminance of the plasma display device.

Therefore, in the plasma display device and the driving method thereof according to the present invention, as described above, the first bias waveform having the positive voltage Vx is applied to the address electrode X before the setup waveform is applied or when the setup waveform is applied. This prevents the occurrence of unintentional counter discharge between the scan electrode Y and the address electrode X during the setup process.

That is, the surface discharge occurrence point between the scan electrode Y and the sustain electrode Z is moved from the A11 point to the A22 point, thereby preventing the occurrence of unintentional counter discharge between the scan electrode Y and the address electrode Z. will be.

In addition, as shown in FIG. 15, the setup voltage applied to the scan electrode Y to generate the setup discharge by moving the surface discharge occurrence point between the scan electrode Y and the sustain electrode Z from the A11 point to the A22 point. Can reduce the size.

This is expressed as in Equation 2 below.

ΔV ₂ = V ₂ -V ₂ '

V ₂ is the voltage minimum of the setup waveform required for the scan electrode Y for setup discharge at the point A11, and V2 'is the voltage minimum of the setup waveform required for the scan electrode Y for setup discharge at the point A22.

As can be seen from the description of Equation 2 and FIG. 15, the first bias waveform is applied to the address electrode X before the setup waveform is applied or in synchronization with the setup waveform, thereby maintaining the scan electrode Y and the sustain. By moving the surface discharge generation point between the electrodes Z from the A11 point to the A22 point, the voltage minimum value of the setup waveform required for the scan electrode Y to generate the setup discharge can be lowered by ΔＶ2.

In the above description of the plasma display device and the driving method thereof, only the case where the gray scale weight is applied to the first subfield having the lowest gray scale weight among the subfields of the frame has been described. However, the driving waveform may be different for each subfield, such as applying a first bias waveform to the address electrode X only in a predetermined number of subfields among the plurality of subfields included in the frame. This is as follows.

16A to 16B are diagrams for describing a method of applying a first bias waveform only in selected subfields among a plurality of subfields of a frame.

First, referring to FIG. 16A, a first bias waveform is applied to all of a plurality of subfields of a frame.

That is, in all the subfields included in the frame, a setup waveform is gradually applied to the scan electrode Y to the first voltage and then gradually rises to the second voltage at the second slope in the setup period of the reset period. In this way, the first bias waveform having the positive polarity is applied to the address electrode X while the setup waveform is applied to the scan electrode Y.

Here, the first bias of the positive polarity applied to the address electrode X while the setup waveform is applied to the scan electrode Y in the setup period of the reset period of the first subfield having the lowest gray scale weight among the plurality of subfields of the frame The waveform is wider than the other subfields. That is, the pulse width of the first bias waveform of the first subfield is wider than the pulse width of the first bias waveform of the other subfields.

As such, the reason why the pulse width of the first bias waveform of the first subfield having the lowest gray scale weight among the plurality of subfields of the frame is wider than the pulse width of the first bias waveform of the other subfields is the lowest. Since the discharge is most likely to be unstable in the first subfield because the number of sustain pulses applied in the sustain period is smallest, the surface discharge between the scan electrode Y and the sustain electrode Z in the first subfield is reduced. To make it more stable.

Next, referring to FIG. 16B, unlike FIG. 16A, the first bias waveform is applied only to a predetermined number of subfields selected from among a plurality of subfields included in a frame. More preferably, the first bias waveform is applied in the low gray level subfield among the plurality of subfields of the frame.

Here, the above-described low gray level subfield is preferably a subfield from the first subfield to the third subfield in the order of low gray scale weight among the plurality of subfields of the frame. For example, when one frame includes a total of 12 subfields from the first subfield to the twelfth subfield in the order of the gray scale weight, the first subfield having the lowest gray scale weight and the next gray scale weight are the lowest. The second subfield and the third subfield having the next low gray scale weight are set as the low gray subfield.

Also in FIG. 16B, the positive polarity applied to the address electrode X while the setup waveform is applied to the scan electrode Y in the setup period of the reset period of the first subfield having the lowest gray scale weight among the low gray subfields of the frame is shown. The first bias waveform is wider than the other subfields. That is, the pulse width of the first bias waveform of the first subfield is wider than the pulse width of the first bias waveform of the other subfields.

The reason why the first bias waveform is applied only to the low gray level subfield among the subfields of the frame is that the wall charges in the discharge cells formed in the previous subfield in the remaining subfields except the low gray level subfield, that is, the high gray level subfield. This is because it is possible to omit the first bias waveform because a sufficiently stable reset can be performed by using.

Meanwhile, it is also possible to set the voltage of the reset waveform applied to the scan electrode Y to be different from other subfields in the reset period of any one subfield in the frame of such a structure. Same as

17 is a diagram for explaining the magnitude of a voltage of a reset waveform in a plurality of subfields of a frame.

17, the magnitude of the voltage of the reset waveform in any one of the plurality of subfields of the frame is different from the other subfields. More specifically, the magnitude of the second voltage of the setup waveform applied to the scan electrode Y is different from the other subfields in the setup period of the reset period in any one of the plurality of subfields of the frame.

For example, the magnitude of the voltage of the reset waveform in the first subfield of the frame subfield is V1, the magnitude of the voltage of the reset waveform in the second subfield is V2, and the magnitude of the reset waveform in the third subfield is The magnitude of the voltage is V3, and the magnitude of the voltage of the reset waveform in the fourth subfield is V4. The reason why the voltage of the reset waveform is different in this way is because the magnitude of the second voltage of the setup waveform is different. That is, the magnitude of the second voltage in the subfield having the lower gray scale weight among the two subfields having different gray scale weights among the plurality of subfields of the frame is larger than the other subfields.

As such, the reason for making the magnitude of the second voltage of the setup waveform of one subfield having a low gray scale weight among the subfields of the frame larger than the magnitude of the second voltage of the setup waveform of another subfield having a relatively high gray scale weight is as follows. The discharge is more likely to be unstable in a subfield having a low gray scale weight, so that the voltage of the reset waveform is made relatively large to stabilize the discharge.

In the first embodiment of the present invention described above, although the sustain bias waveform is applied to the sustain electrode Z from the set down period after the setup period of the reset period, the sustain bias is set in the set down period for the stabilization of discharge and the fast addressing. It is also possible not to apply a waveform, which is the same as in the second embodiment.

Second Embodiment

18 is a view for explaining a second embodiment of the plasma display device according to the present invention.

As shown in FIG. 18, the plasma display apparatus of the present invention includes a plasma display panel 1800, a data driver 1801, a scan driver 1802, a sustain driver 1803, and a driving pulse controller 1804.

Here, the above-described plasma display panel 1800 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and a plurality of electrodes, for example, the scan electrode (Y) and the sustain electrode (Z). Are formed in pairs, and the address electrodes X are formed to intersect the scan electrode Y and the sustain electrode Z.

In the data driver 1801, reverse gamma correction and half tone correction are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield by a subfield mapping circuit. Is supplied. The data driver 1801 applies a predetermined driving voltage to the address electrode X in at least one of a reset period, an address period, and a sustain period. For example, the data driver 1801 applies the data supplied in the address period to the address electrode X under the control of the drive pulse controller 1804.

The scan driver 1802 applies a predetermined driving voltage to the scan electrode Y in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 1804. For example, a reset waveform including a reset pulse, for example, a rising ramp waveform Ramp-up and a falling ramp waveform Ramp-down, is applied to the scan electrode Y during the reset period. In addition, the scan driver 1802 sequentially applies the scan pulse Sp of the negative scan voltage (-Vy) to the scan electrode Y during the address period, and applies the sustain pulse SUS to the scan electrode Y during the sustain period. ) Is applied.

The sustain driver 1803 applies a predetermined driving voltage to the sustain electrode Z in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 1804. For example, the positive sustain bias waveform Vzb is supplied to the sustain electrode Z during the address period, and is alternately operated with the scan driver 1802 during the sustain period to supply the sustain pulse SUS to the sustain electrode Z. do.

The drive pulse control unit 1804 controls predetermined control signals CTRX and CTRY for controlling the operation timing and synchronization of the data driver 1801, the scan driver 1802, and the sustain driver 1803 in the reset period, the address period, and the sustain period. , CTRZ, and supply the control signal to the data driver 1801, the scan driver 1802, and the sustain driver 1803, respectively, to supply the data driver 1801, the scan driver 1802, and the sustain driver 1803. To control.

In particular, the driving pulse controller 1804 increases the first voltage to the first voltage to the scan electrode Y in the one or more subfields of the plurality of subfields of the frame in the setup period of the reset period, and then to the second voltage to the second slope. The rising waveform is applied to the scan electrode (Y), and the first bias waveform of the positive polarity is applied to the address electrode (X) while the setup waveform is being applied to the scan electrode (Y). The magnitude of the voltage applied to the sustain electrode Z within the period until the first scan pulse is supplied is lower than the voltage of the sustain bias waveform Vzb applied to the sustain electrode Z in the address period. That is, the drive pulse controller 1804 supplies a predetermined control signal to the scan driver 1802, causing the scan driver 1802 to scan electrodes in the setup period of the reset period in one or more of the subfields of the frame. Apply a setup waveform that rises to the first voltage at a first slope and then rises to a second voltage at a second slope to (Y), and the driving pulse controller 1804 sends a predetermined control signal to the data driver 1801. The first bias waveform is applied to the address electrode X while the data driver 1801 applies the setup waveform to the above-described scan electrode Y, and the drive pulse controller 1804 The control signal is supplied to the sustain driver 1803 to cause the sustain driver 1803 to be supplied after the above-described setup period and before the first scan pulse is supplied to the scan electrode Y. In this case, a voltage lower than the voltage Vzb of the sustain bias waveform applied to the sustain electrode Z is applied to the sustain electrode Z in the address period.

The configuration and operation of the second embodiment of the plasma display device of the present invention will be more clearly understood through the description of the second embodiment of the method of driving the plasma display device.

19A to 19B are views for explaining a second embodiment of the method of driving the plasma display device of the present invention.

Here, in the description of the second embodiment of the driving method of the plasma display device according to the present invention of FIGS. 19A to 19B, the same description as that of the first embodiment described above will be omitted.

19A to 19B, in the second exemplary embodiment of the method of driving the plasma display device, the first slope is applied to the scan electrode Y in the setup period of the reset period in one or more of the plurality of subfields of the frame. A setup waveform that gradually rises to the first voltage and then gradually rises to the second voltage with a second slope is applied, and thus, while the setup waveform is applied to the scan electrode (Y), the positive polarity is applied to the address electrode (X). One bias waveform is applied and is lower than the voltage Vzb of the sustain bias waveform applied to the sustain electrode Z in the address period within the period after the setup period and before the first scan pulse is supplied to the scan electrode Y. Voltage is applied to the sustain electrode Z.

First, referring to FIG. 19A, a scan electrode (1) is applied to each of a plurality of subfields of a frame, and a scan electrode (eg, a scan electrode) The first bias waveform of the positive polarity applied to the address electrode X while the setup waveform is applied to Y) is wider than the other subfields. That is, the pulse width of the first bias waveform of the first subfield is wider than the pulse width of the first bias waveform of the other subfield.

Next, referring to FIG. 19B, unlike FIG. 19A, the first bias waveform is applied only to a predetermined number of subfields selected from among a plurality of subfields included in a frame. More preferably, the first bias waveform is applied in the low gray level subfield of the plurality of subfields of the frame, and the low gray level subfield is the first sub in the order of the low gray level weight of the plurality of subfields of the frame. This is the case of subfields from the field to the third subfield.

A more detailed driving waveform applied to the sustain electrode Z in the set down period is as shown in FIG. 20.

20 is a view for explaining in detail the waveform applied to the sustain electrode (Z) in the set-down period.

Referring to FIG. 20, region A of FIG. 19A described above is enlarged.

Here, in the set-down period after the setup period of the reset period, the voltage applied to the sustain electrode Z is kept the same as the voltage applied to the sustain electrode Z in the set-up period, but at a part of the end of the set-down period, the set-up period The voltage rises to a voltage greater than the voltage applied to the sustain electrode Z and lower than the voltage Vzb of the sustain bias waveform. More preferably, in this set down period, the voltage applied to the sustain electrode Z is maintained at the voltage of the ground level GND, and at a part of the end of the set down period, it is larger than the ground level voltage and is larger than the voltage of the sustain bias waveform. Rise to low voltage.

In the address period after this set-down period, a sustain bias waveform of the sustain bias voltage Vzb is applied to the sustain electrode Z. Accordingly, in the address period, the sustain electrode Z is sustained at the end of the set-down period. To rise.

As such, the sustain electrode Z maintains the voltage at the ground level GND during most of the set down period, thereby stabilizing the discharge in the set down period, thereby stabilizing the address discharge in the address period, thereby enabling high-speed addressing. do.

In the first and second embodiments of the present invention described above, although a scan reference waveform rapidly rising to the scan electrode Y is applied in the address period after the reset period, a scan in which the voltage gradually rises to stabilize the discharge It is also possible to apply a reference waveform, that is, a rising waveform to the scan electrode Y, which will be described as follows.

Third Embodiment

21 is a view for explaining a third embodiment of the plasma display device according to the present invention.

As shown in FIG. 21, the plasma display apparatus of the present invention includes a plasma display panel 2100, a data driver 2101, a scan driver 2102, a sustain driver 2103, and a driving pulse controller 2104.

Here, the above-described plasma display panel 2100 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and a plurality of electrodes, for example, the scan electrode (Y) and the sustain electrode (Z). Are formed in pairs, and the address electrodes X are formed to intersect the scan electrode Y and the sustain electrode Z.

In the data driver 2101, reverse gamma correction and half tone correction are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield by a subfield mapping circuit. Is supplied. The data driver 2101 applies a predetermined driving voltage to the address electrode X in at least one of a reset period, an address period, and a sustain period. For example, the data driver 2101 applies data supplied in the address period to the address electrode X under the control of the drive pulse controller 2104.

The scan driver 2102 applies a predetermined driving voltage to the scan electrode Y in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 2104. For example, a reset waveform including a reset pulse, for example, a rising ramp waveform Ramp-up and a falling ramp waveform Ramp-down, is applied to the scan electrode Y during the reset period. In addition, the scan driver 2102 sequentially applies the scan pulse Sp of the negative scan voltage (-Vy) to the scan electrode Y during the address period, and applies the sustain pulse SUS to the scan electrode Y during the sustain period. ) Is applied.

The sustain driver 2103 applies a predetermined driving voltage to the sustain electrode Z in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 2104. For example, the positive sustain bias waveform Vzb is supplied to the sustain electrode Z during the address period, and is alternately operated with the scan driver 2102 during the sustain period to supply the sustain pulse SUS to the sustain electrode Z. do.

The driving pulse control unit 2104 controls a predetermined control signal CTRX, for controlling the operation timing and synchronization of the data driver 2101, the scan driver 2102, and the sustain driver 2103 in the reset period, the address period, and the sustain period. CTRY and CTRZ are generated, and the control signals are supplied to the data driver 2101, the scan driver 2102 and the sustain driver 2103, respectively, to the data driver 2101, the scan driver 2102 and the sustain driver 2103. To control.

In particular, the driving pulse controller 2104 increases the first voltage to the first voltage to the scan electrode Y in the one or more subfields of the plurality of subfields of the frame in the setup period of the reset period, and then to the second voltage to the second slope. To apply a rising setup waveform to the scan electrode Y and to apply a first bias waveform having a positive polarity to the address electrode X while the setup waveform is applied to the scan electrode Y, and to After the falling waveform falling to the third voltage is applied to the electrode Y, and the rising waveform rising to the predetermined slope from the third voltage to the fourth voltage is applied, the scan pulse falling from the fourth voltage to the fifth voltage To be applied.

That is, the drive pulse controller 2104 supplies a predetermined control signal to the scan driver 2102, causing the scan driver 2102 to scan electrodes in a setup period of a reset period in one or more of the plurality of subfields of the frame. In (Y), a setup waveform that rises to the first voltage with the first slope and then rises to the second voltage with the second slope is applied. Also, in the set-down period after the above-described setup period, the third voltage is applied to the scan electrode Y. A falling waveform that falls down to is applied, a rising waveform that rises with a predetermined slope from the third voltage to the fourth voltage is applied, and then a scan pulse that falls from the fourth voltage to the fifth voltage is applied. The control unit 2104 supplies a predetermined control signal to the data driver 2101 to allow the data driver 2101 to apply an address while the setup waveform is applied to the scan electrode Y described above. The first bias waveform of the positive polarity is applied to the electrode X, and the driving pulse control unit 2104 supplies a predetermined control signal to the sustain driving unit 2103 to cause the sustain driving unit 2103 after the above-described setup period. In the set-down period, a voltage lower than the voltage Vzb of the sustain bias waveform applied to the sustain electrode Z is applied to the sustain electrode Z in the address period.

The configuration and operation of the third embodiment of the plasma display device of the present invention will be more clearly understood through the description of the second embodiment of the method of driving the plasma display device.

22A to 22B are views for explaining a third embodiment of the method of driving the plasma display device of the present invention.

Here, in the description of the third embodiment of the method of driving the plasma display device of the present invention of FIGS. 22A to 22B, the same descriptions as those of the first to second embodiments will be omitted.

22A to 22B, in a third embodiment of the driving method of the plasma display device according to the present invention, the first slope is applied to the scan electrode Y in the setup period of the reset period in one or more subfields of the plurality of subfields of the frame. The setup waveform is gradually applied up to the first voltage and then gradually rises up to the second voltage with the second slope. Thus, while the setup waveform is applied to the scan electrode (Y), the positive polarity is applied to the address electrode (X). One bias waveform is applied, and in the set-down period after the above-described setup period, a falling waveform falling to the third voltage is applied to the scan electrode Y, and the rising waveform rising to a predetermined slope from the third voltage to the fourth voltage. After this is applied, a scan pulse that falls from the fourth voltage to the fifth voltage is applied.

First, referring to FIG. 22A, a scan electrode (1) is applied to each of a plurality of subfields of a frame, and a scan electrode (eg, The first bias waveform of the positive polarity applied to the address electrode X while the setup waveform is applied to Y) is wider than the other subfields. That is, the pulse width of the first bias waveform of the first subfield is wider than the pulse width of the first bias waveform of the other subfield.

Next, referring to FIG. 22B, unlike FIG. 22A, the first bias waveform is applied only to a predetermined number of subfields selected from a plurality of subfields included in a frame. More preferably, the first bias waveform is applied in the low gray level subfield of the plurality of subfields of the frame, and the low gray level subfield is the first sub in the order of the low gray level weight of the plurality of subfields of the frame. This is the case of subfields from the field to the third subfield.

A more detailed driving waveform applied to the scan electrode Y in the set down period is as shown in FIG. 23.

FIG. 23 is a diagram for explaining in detail a waveform applied to the scan electrode Y in the setdown period.

Referring to FIG. 23, region B of FIG. 22A described above is enlarged.

Here, in the set-down period of the reset period, the falling waveform falling to the third voltage is applied to the above-described scan electrode Y, that is, a set-down pulse is applied, and the rising rises by a predetermined slope from the third voltage to the fourth voltage. The waveform is applied. That is, a scan reference waveform in which the voltage gradually rises to the scan reference voltage Vsc, that is, a scan reference waveform having a voltage rise time S, is applied to the scan electrode Y.

As such, the reason why the scan reference waveform in which the voltage gradually rises at the end of the set-down period is applied to the scan electrode Y is to reduce noise generated in the driving waveform. An example of such noise reduction is shown in FIGS. Referring to Figure 25 as follows.

First, FIG. 24 is a diagram for describing a case where a voltage of a scan reference waveform rises rapidly in a conventional driving waveform.

25 is a view for explaining the case where the voltage of the scan reference waveform gradually rises in the driving waveform of the present invention.

First, referring to FIG. 24, a conventional driving waveform is shown in (a). In the plasma display panel driven by such a driving waveform, the point of time of applying the scan reference waveform applied to the scan electrode Y in the address period is the same as ts at all the scan electrodes Y, and the voltage is rapidly increased.

As such, when the scan reference waveform is applied to each scan electrode Y at the same time, noise is generated in the scan reference waveform applied to the scan electrode Y. An example in which noise generated when the scan reference waveforms are applied to the scan electrodes Y at the same time point is shown in (b).

Referring to (b), when scan reference waveforms are suddenly applied to the scan electrodes Y at the same time in the address period, noise is generated in the driving waveforms applied to the scan electrodes. Such noise is caused by coupling through capacitance of the panel, and rising noise is generated in the driving waveform applied to the scan electrode Y when the voltage of the scan reference waveform rises sharply.

As described above, noise generated in the driving waveform applied to the scan electrode Y by the same application time point of the scan reference waveform applied to the scan electrode Y is applied to the driving element of the plasma display panel, for example, the scan electrode Y. Electrical damage will occur to the scan driver integrated circuit (IC) for applying the scan pulse.

Next, referring to FIG. 25, a driving waveform of the present invention is shown in (a). In the plasma display panel driven by the driving waveform, the voltage of the scan reference waveform applied to the scan electrode Y gradually increases in the address period to reach the scan reference voltage Vsc.

That is, in (a), the rising waveform applied to the scan electrode Y in the address period, that is, the scan reference waveform, is adjusted to rise with a predetermined slope. In other words, after the falling waveform falls to the first voltage to the first voltage in the set-down period of the reset period before the address period, that is, after the set-down pulse of the falling ramp (Ramp-Down) falls to the end. A rising waveform that rises from the end of the set-down pulse, that is, from the first voltage to the second voltage, is applied, that is, a scan reference waveform is applied in which the voltage starts to rise gradually and reaches the scan reference voltage Vsc.

Here, it is preferable that the above-mentioned first voltage and third voltage are the same voltage. That is, the voltage at the end of the setdown pulse and the voltage (-Vy) of the scan pulse are the same.

Here, it is preferable that the slope of the rising waveform described above is smaller than the slope of the sustain pulse applied in the sustain period. That is, the rising slope of the rising waveform described above is smaller than the ER-Up Time of the sustain pulse.

In addition, it is preferable that the above-mentioned rising waveform is maintained at the second voltage for a predetermined period, that is, the scan reference waveform maintains the scan reference voltage Vsc for a predetermined time.

This rising waveform is preferably applied until the first scan pulse is applied among the scan pulses applied to the scan electrodes (Y). In other words, the voltage of the scan reference waveform is within the period from when the set-down pulse of the ramp-down falls to the end in the set-down period of the previous reset period and before the first scan pulse is supplied to the scan electrode. Rises from.

The application time of the rising waveform is preferably in the range of 0 ms (microseconds) and 20 ms (microseconds) or less. More preferably, the application time of such rising waveform is preferably in the range of 6 ms (microsecond) or more and 10 ms (microsecond) or less.

This reduces the amount of noise generated by the scan reference waveform applied to the scan electrodes in the address period.

Referring to (b), the noise of the waveform applied to the scan electrode Y in the address period is considerably reduced in comparison with FIG. 24 (b). The reason why the noise is reduced is to adjust the time when the rising waveform applied to the scan electrode Y and the voltage of the scan reference waveform gradually rise within the range of 0 ms (microsecond) and 20 ms (microsecond) or less. More preferably, the application time of the rising waveform is adjusted within the range of 6 microseconds or more and 10 microseconds or less so that the coupling through the capacitance of the panel at the time of application of each scan reference waveform is performed. By reducing Coupling, the rising noise generated in the waveform applied to the scan electrode is reduced when the voltage of the scan reference waveform rises. This prevents electrical damage of the plasma display panel drive element, for example, the scan driver IC of the scan driver.

On the other hand, in the above driving method, the voltage rise time of the scan reference waveform applied to all the scan electrodes Y, that is, the application time of the rise waveform is less than 0 ms (microseconds) and 20 ms (microseconds) or less, preferably 6 ms. The same adjustment was made within the range of (microseconds) to 10 microseconds (microseconds), but differently, the scan electrode Y was divided into a plurality of scan electrode groups, and the scan electrode groups thus divided were applied in the address period. The voltage rise time of the scan reference waveform, that is, the application time of the rise pulse, may be different from each other. This method is described below.

Here, the concept of the above-described scan electrode group will be described with reference to FIG. 26 in order to help understanding the method of changing the application time of the rising pulse for each scan electrode group as described above.

26 is a diagram for explaining the concept of a scan electrode group.

Referring to FIG. 26, the scan electrodes Y of the plasma display panel 2600 are, for example, Ya electrode groups Ya ₁ to Ya (n) / 4, and Yb electrode groups Yb ((n / 4) +1). Yb (2n) / 4), Yc electrode group (Yc ((2n / 4) +1) to Yc (3n) / 4) and Yd electrode group (Yd ((3n / 4) +1) to Yd (n) Separated by)).

Meanwhile, in FIG. 26, the number of scan electrodes included in each scan electrode group (Ya electrode group, Yb electrode group, Yc electrode group, and Yd electrode group) is set to be the same, but each scan electrode group (Ya electrode group, Yb) is set to be the same. It is also possible to set the number of scan electrodes included in the electrode group, the Yc electrode group, and the Yd electrode group differently from each other. For example, 100 scan electrodes may be included in the Ya electrode group, and 200 scan electrodes may be included in the electrode group of Yb.

The number of scan electrode groups can also be adjusted. Also, assuming that the number of scan electrode groups ranges from at least two to less than the total number of maximum scan electrodes, that is, the number of total scan electrodes is n, 2 ≦ N ≦ (n−1) N Is the number of scan electrode groups).

A third embodiment of a method of driving a plasma display device of the present invention will now be described based on the concept of an electrode group as described above with reference to FIG. 26.

Here, the application time of the rising waveform described above, that is, the time when the voltage of the scan reference waveform gradually rises is the first scan from the time after the set-down pulse of the ramp-down falls to the end in the set-down period of the previous reset period. It is regulated within a period before the pulse is applied.

Here, as described above, it is preferable to apply the rising waveform having the same application time to all the scan electrodes (Y) included in the scan electrode group when adjusting the application time of the rising waveform. For example, the application time of the rising waveform applied to all the scan electrodes included in the Ya electrode group in FIG. 26, that is, the scan electrodes Ya ₁ to the scan electrodes Ya (n) / 4, that is, the scan reference The time when the voltage of the waveform gradually rises is set to 5 ms (microseconds), and all the scan electrodes included in the Yb electrode group, that is, the scan electrodes Yb ((n / 4) +1) to the scan electrodes Yb (2n) The application time of the rising waveform applied to the scan electrode up to / 4 is set to 10 ms (microsecond). In this way, the application times of the rising waveforms applied to the scan electrodes belonging to one scan electrode group are all set to be the same.

In addition, the difference between the application times of two rising waveforms having different application times may be set the same. For example, the application time of the rising waveform applied to all the scan electrodes included in the Ya electrode group in FIG. 26 described above, that is, the scan electrodes from scan electrode Ya ₁ to scan electrode Ya (n) / 4 is 5 s ( Microseconds) and application of a rising waveform applied to all scan electrodes included in the Yb electrode group, that is, scan electrodes Yb ((n / 4) +1) to scan electrodes Yb (2n) / 4. The time is set to 10 microseconds (microseconds) and is applied to all scan electrodes included in the Yc electrode group, that is, all scan electrodes from scan electrode Yc ((2n / 4) +1) to scan electrode Yc (3n) / 4. The application time of the rising waveform to be applied is set to 15 ms (microseconds), and the scan electrodes Yd ((3n / 4) +1) to the scan electrodes Yd (n) included in the Yd electrode group The application time of the rising waveform applied to all the scan electrodes is set to 20 ms (microseconds). That is, the difference between the application time of the rising waveform applied to the Ya scan electrode group and the application time of the rising waveform applied to the Yb scan electrode group is 5 s (microseconds) seconds, and the rising waveform applied to the Yb scan electrode group is applied. The difference between the application time and the application time of the rising waveform applied to the Yc scan electrode group is 5 microseconds (microseconds), and the difference between the rising waveform applied to the Yc scan electrode group and the rising waveform applied to the Yd scan electrode group. 5 microseconds.

In addition, the difference between the application times of two rising waveforms having different application times may be set differently. For example, the application time of the rising waveform applied to all the scan electrodes included in the Ya electrode group in FIG. 26 described above, that is, the scan electrodes from scan electrode Ya ₁ to scan electrode Ya (n) / 4 is 5 s ( Microseconds) and application of a rising waveform applied to all scan electrodes included in the Yb electrode group, that is, scan electrodes Yb ((n / 4) +1) to scan electrodes Yb (2n) / 4. The time is set to 7 ms (microseconds), and all scan electrodes included in the Yc electrode group, that is, all scans from scan electrode Yc ((2n / 4) +1) / 4 to scan electrode Yc (3n) / 4 The application time of the rising waveform applied to the electrode is set to 15 ms (microseconds), and all the scan electrodes included in the Yd electrode group, that is, the scan electrodes Yd ((3n / 4) +1) to the scan electrodes Yd (n) The application time of the rising waveform applied to all the scan electrodes up to 20 microseconds is set. That is, the difference between the application time of the rising waveform applied to the Ya scan electrode group and the application time of the rising waveform applied to the Yb scan electrode group is 2 ms (microseconds), and the application of the rising waveform applied to the Yb scan electrode group is applied. The difference between the time and the application time of the rising waveform applied to the Yc scan electrode group is 8 ms (microseconds), and the application time of the rising waveform applied to the Yc scan electrode group and application of the rising waveform to the Yd scan electrode group are applied. The difference with time is 5 microseconds (microseconds).

As described above, a method of driving the plasma display panel by adjusting the application time of the rising waveform applied to each scan electrode group in the address period will be described with reference to FIGS. 27A to 27B.

27A to 27B are views for explaining a driving method of adjusting an application time of a rising waveform according to the scan electrode group of FIG. 26.

As shown in FIGS. 27A to 27B, the driving method of the plasma display apparatus of the present invention is divided into two or more scan electrode groups including at least one scan electrode, and applied to at least one scan electrode group. The application time of the rising waveform is different from the application time of the rising waveform applied to at least one other scan electrode group.

For example, as shown in FIG. 27A, all of the scan electrodes included in the Ya scan electrode group as shown in FIG. 26 are started to rise at the time point t _{0 in} the address period and then the scan reference voltage Vsc at the time point t ₁ . A scan reference waveform reaching to is applied, that is, a rising waveform with an application time of t ₁ -t ₀ is applied, and all scan electrodes included in the Yb scan electrode group start rising at the time t _{0 in} the address period and then t A scan reference waveform that reaches the scan reference voltage Vsc at the time of ₂ is applied, i.e., a rising waveform with an application time of t ₂ -t ₀ is applied, and all scan electrodes included in the Yc scan electrode group have an address period. A scan reference waveform that starts rising at the time t ₀ and reaches the scan reference voltage Vsc at the time t ₃ is applied, that is, a rising waveform with an application time of t ₃ -t ₀ is applied, and the Yd scan electrode group Before all scans contained in , The scan reference waveform that reaches the scan reference voltage (Vsc) at the time of start to rise at a time point of t ₀ to t ₄ is applied during the address period. That is, a rising waveform with an application time of t ₄ -t ₀ is applied. Accordingly, the time when the voltage of the scan reference waveform applied to each scan electrode group gradually rises, that is, the application time of the rising waveform is different from each other.

In FIG. 27A, a scan reference waveform having a different voltage rise time, that is, a rise waveform having a different application time, is applied to each scan electrode group. However, a predetermined number of electrode groups are selected from the scan electrode groups and thus selected scans are performed. It is also possible to apply scan reference waveforms having different voltage rise times only to the electrode group. For example, a scan reference waveform that starts rising at the time point t ₀ and reaches the scan reference voltage Vsc at the time point t ₁ is applied to the mode scan electrode included in the Ya scan electrode group, that is, the application time is applied. A rising waveform of t ₁ -t ₀ is applied, and all the scan electrodes included in the Yb, Yc, and Yd scan electrode groups start to rise at the time t _{0 in} the address period, respectively, and the scan reference voltage (Vsc) at the time t ₂ . Is applied, i.e., a rising waveform having an imprint time of t ₂ -t ₀ is applied.

As described above, when the scan electrode Y is divided into a plurality of electrode groups and a rising waveform, that is, a scan reference waveform in which the voltage gradually increases, the number of the scan electrode groups described above is two or more, and the scan electrodes It is preferable to drive by setting the total number or less.

Here, the scan electrode group may include one or more scan electrodes, and the scan electrode groups may all include the same number of scan electrodes or may include one or more different numbers of scan electrodes. For example, the aforementioned Ya scan electrode group may include 100 scan electrodes, and the Yb scan electrode group may include 200 scan electrodes.

In addition, it is preferable to apply a scan reference waveform having the same rise time of the voltage, that is, a rise waveform of the same application time, to all the scan electrodes included in the same scan electrode group. That is, the voltage rise time of the scan reference waveform applied to all the scan electrodes included in the aforementioned Ya scan electrode group, that is, the scan electrodes from Ya ₁ to the scan electrode Ya (n) / 4, that is, the rise time of the rising waveform is 10 s. The same can be set for both (microseconds).

Incidentally, in Fig. 27A, the difference between the application times of two rising waveforms having different application times is also the same. That is, when the difference between the application time of the rising waveform applied to the Ya scan electrode group and the application time of the rising waveform applied to the Yb scan electrode group is 5 microseconds (microseconds), the rising waveform applied to the Yb scan electrode group The difference between the application time and the application time of the rising waveform applied to the Yc scan electrode group and the difference between the application time of the rising waveform applied to the Yc scan electrode group and the application time of the rising waveform applied to the Yd scan electrode group are both It is set to 5 microseconds (microseconds) as described above.

Unlike this, the difference between the application times of two rising waveforms having different application times may be set to be different. Looking at such a driving waveform, it is shown in FIG. 27B.

Looking at Figure 27b, the difference between the application time of the two rising waveforms having different application time is different. That is, the difference between the application time of the rising waveform applied to the Ya scan electrode group and the application time of the rising waveform applied to the Yb scan electrode group, that is, the difference between t ₂ and t ₁ is 5 ms (microsecond). The difference between the application time of the rising waveform applied to the Yb scan electrode group and the application time of the rising waveform applied to the Yc scan electrode group, that is, the difference between t ₃ and t ₂ , is 7 μs (microseconds) and is applied to the Yc scan electrode group. The difference between the application time of the rising waveform to be applied and the application time of the rising waveform to be applied to the Yd scan electrode group, that is, the difference between t ₄ and t ₃ is set to 10 ms (microsecond).

As a result, as shown in FIG. 25, the amount of noise generated by the rising waveform applied to the scan electrode in the address period is reduced.

The reason why the noise is reduced is that the scan electrodes are divided into a plurality of electrode groups without applying the rising time of the rising waveforms applied to all the scan electrodes Y to be applied to at least one of the scan electrode groups in the address period. By adjusting the application time of the rising waveform differently from the rest of the scan electrode group to reduce the coupling through the capacitance of the panel at the time of applying the rising waveform, the time when the voltage of the scan reference waveform rises sharply, That is, when the rising waveform is applied, the rising noise generated in the waveform applied to the scan electrode Y is reduced. This prevents electrical damage of the plasma display panel drive element, for example, the scan driver IC of the scan driver.

Meanwhile, in the above description of FIGS. 27A to 27B, the application time of the rising waveform applied to the scan electrode in the address period is different for each scan electrode by dividing the scan electrode Y into a plurality of scan electrode groups. The application time of the rising waveform applied to each of the address periods may be different for each scan electrode. This method will be described below with reference to FIGS. 28A to 28B.

28A to 28B are diagrams for describing a driving method of controlling an application time of a rising waveform differently for each scan electrode.

As shown in FIGS. 28A to 28B, the application time of the rising pulse applied to the scan electrode Y in the address period is adjusted to be different for each scan electrode Y. FIG.

For example, as shown in FIG. 28A, a scan reference waveform is applied to the Y ₁ scan electrode at the time point t _{0 in} the address period and reaches the scan reference voltage Vsc at the time point t ₁ , that is, the application time. This rising waveform of t ₁ -t ₀ is applied, and a scan reference waveform is applied to the Y ₂ scan electrode at the time point t _{0 in} the address period and reaches the scan reference voltage Vsc at the time t ₂ . In other words, a rising waveform having an application time of t ₂ -t ₀ is applied, and the scan reference which starts rising at the time t _{0 in} the address period and reaches the scan reference voltage Vsc at the time t ₃ is applied to the Y ₃ scan electrode. A waveform is applied, that is, a rising waveform with an application time of t ₃ -t ₀ is applied, and the Y ₄ scan electrode starts to rise at the time point t _{0 in} the address period and is applied to the scan reference voltage Vsc at the time point t ₄ . To reach the scan reference waveform , That is the time t ₄ -t ₀ is the leading waveform and, Ym scan electrode, a scan reference waveform that reaches the scan reference voltage (Vsc) at the time of t and _m begins to rise at a time point of t ₀ in the address period This application, i.e., a rising waveform whose application time is t _m -t ₀ , is applied. Accordingly, the time when the voltage of the scan reference waveform applied to each scan electrode gradually rises, that is, the application time of the rising waveform is different from each other.

Here, in FIG. 28A, rising waveforms having different application times are applied to each scan electrode, but a predetermined number of electrodes are selected from these scan electrodes, and a rising waveform having different application times is applied only to the selected scan electrodes. It is possible. For example, a scan reference waveform that starts rising at the time point t ₀ and reaches the scan reference voltage Vsc at the time point t ₁ is applied to the Y ₁ scan electrode, that is, the application time is t ₁ -t ₀ . A scan reference waveform is applied to the rising waveform, and the Y ₂ , Y ₃ , Y ₄ , and Y _m scan electrodes start to rise at the time t _{0 in} the address period and reach the scan reference voltage Vsc at the time t ₂ , respectively. This application, i.e., a rising waveform whose application time is t ₂ -t ₀ , is applied.

Incidentally, in FIG. 28A, the difference between the application times of two rising waveforms having different application times is also the same. That is, when the difference between the application time of the rising waveform applied to the Y ₁ scan electrode and the application time of the rising waveform applied to the Y ₂ scan electrode is 5 m (microseconds), the rising waveform applied to the Y ₂ scan electrode application time and Y ₃ and the difference between the application time of a rising waveform applied to the scan electrodes, Y ₃ is a rising waveform applied to the scan electrode hour and Y ₄ is the difference between the time of a rising waveform applied to the scan electrode are both It can be set to 5 microseconds (microseconds) as described above.

Unlike this, the difference between the application times of two rising waveforms having different application time may be set to be different. Looking at such a driving waveform, it is as shown in FIG. 28B.

Referring to FIG. 28B, the difference between the application times of two rising waveforms having different application times is different. That is, the difference between the application time of the rising waveform applied to the Y ₁ scan electrode and the application time of the rising waveform applied to the Y ₂ scan electrode, that is, the difference between t ₀ and t ₁ is 5 ms (microsecond). The difference between the application time of the rising waveform applied to the Y ₂ scan electrode and the application time of the rising waveform applied to the Y ₃ scan electrode, that is, the difference between t ₀ and t ₂ , is 7 ㎲ (microseconds) and is applied to the Y ₃ scan electrode. The difference between the application time of the rising waveform applied and the application time of the rising waveform applied to the Y ₄ scan electrode, that is, the difference between t ₀ and t ₃ is set to 10 microseconds (microseconds).

As a result, as shown in FIG. 25, the amount of noise generated by the rising waveform applied to the scan electrode in the address period is reduced.

Fourth Embodiment

29 is a view for explaining a fourth embodiment of the plasma display device according to the present invention.

As shown in FIG. 29, the plasma display apparatus of the present invention includes a plasma display panel 2900, a data driver 2901, a scan driver 2902, a sustain driver 2907, and a driving pulse controller 2904.

Here, the above-described plasma display panel 2900 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and a plurality of electrodes, for example, the scan electrode (Y) and the sustain electrode (Z). Are formed in pairs, and the address electrodes X are formed to intersect the scan electrode Y and the sustain electrode Z.

In the data driver 2901, reverse gamma correction and half tone correction are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield by a subfield mapping circuit. Is supplied. The data driver 2901 applies a predetermined driving voltage to the address electrode X in at least one of a reset period, an address period, and a sustain period. For example, the data driver 2901 applies data supplied in the address period to the address electrode X under the control of the drive pulse controller 2904.

The scan driver 2902 applies a predetermined driving voltage to the scan electrode Y in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 2904. For example, a reset waveform including a reset pulse, for example, a rising ramp waveform Ramp-up and a falling ramp waveform Ramp-down, is applied to the scan electrode Y during the reset period. In addition, the scan driver 2902 sequentially applies the scan pulse Sp of the negative scan voltage (-Vy) to the scan electrode Y during the address period, and applies the sustain pulse SUS to the scan electrode Y during the sustain period. ) Is applied.

The sustain driver 2907 applies a predetermined driving voltage to the sustain electrode Z in at least one of a reset period, an address period, and a sustain period under the control of the drive pulse controller 2904. For example, the positive sustain bias waveform Vzb is supplied to the sustain electrode Z during the address period, and is alternately operated with the scan driver 2902 during the sustain period to supply the sustain pulse SUS to the sustain electrode Z. do.

The drive pulse control unit 2904 controls predetermined control signals CTRX and CTRY for controlling the operation timing and synchronization of the data driver 2901, the scan driver 2902, and the sustain driver 2907 in the reset period, the address period, and the sustain period. , CTRZ, and supply the control signal to the data driver 2901, the scan driver 2902 and the sustain driver 2907 respectively to supply the data driver 2901, scan driver 2902 and sustain driver 2907 To control.

In particular, the driving pulse controller 2904 increases the first voltage to the first voltage to the scan electrode Y in the one or more subfields of the plurality of subfields of the frame in the setup period of the reset period, and then to the second voltage to the second slope. To apply a rising setup waveform to the scan electrode Y and to apply a first bias waveform having a positive polarity to the address electrode X while the setup waveform is applied to the scan electrode Y, and to After the falling waveform falling to the third voltage is applied to the electrode Y, and the rising waveform rising to the predetermined slope from the third voltage to the fourth voltage is applied, the scan pulse falling from the fourth voltage to the fifth voltage Is applied, and the magnitude of the voltage applied to the sustain electrode Z in the period after the setup period and before the first scan pulse is supplied to the scan electrode Y is The voltage is lower than the voltage of the sustain bias waveform Vzb applied to the sustain electrode Z in the address period. That is, the driving pulse control unit 2904 supplies a predetermined control signal to the scan driver 2902, causing the scan driver 2902 to scan electrodes in the setup period of the reset period in one or more of the plurality of subfields of the frame. In (Y), a setup waveform that rises to the first voltage with the first slope and then rises to the second voltage with the second slope is applied. Also, in the set-down period after the above-described setup period, the third voltage is applied to the scan electrode Y. A falling waveform that falls down to is applied, a rising waveform that rises with a predetermined slope from the third voltage to the fourth voltage is applied, and then a scan pulse that falls from the fourth voltage to the fifth voltage is applied. The control unit 2904 supplies a predetermined control signal to the data driver 2901 to allow the data driver 2901 to apply an address while the setup waveform is applied to the scan electrode Y described above. A first bias waveform having a positive polarity is applied to the electrode X, and the driving pulse control unit 2904 supplies a predetermined control signal to the sustain driver 2907 to cause the sustain driver 2907 to perform the above-described setup period. In a period until the first scan pulse is supplied to the scan electrode Y, a voltage lower than the voltage Vzb of the sustain bias waveform applied to the sustain electrode Z in the address period is applied to the sustain electrode Z. It is.

The configuration and operation of the fourth embodiment of the plasma display device of the present invention will be more clearly understood through the description of the fourth embodiment of the method of driving the plasma display device.

30A to 30B are views for explaining a fourth embodiment of a method of driving a plasma display device of the present invention.

Here, in the description of the fourth embodiment of the method of driving the plasma display device of the present invention of FIGS. 30A to 30B, the same descriptions as those of the first, second and third embodiments described above will be omitted. .

30A to 30B, in the fourth embodiment of the method of driving the plasma display device, the first slope is applied to the scan electrode Y in the setup period of the reset period in one or more of the plurality of subfields of the frame. A setup waveform that gradually rises to the first voltage and then gradually rises to the second voltage with a second slope is applied, and thus, while the setup waveform is applied to the scan electrode (Y), the positive polarity is applied to the address electrode (X). One bias waveform is applied, and in the set-down period after the above-described setup period, a falling waveform falling to the third voltage is applied to the scan electrode Y, and the rising waveform rising to a predetermined slope from the third voltage to the fourth voltage. After this is applied, a scan pulse that falls from the fourth voltage to the fifth voltage is applied, and in the set-down period after the setup period, in the address period. A voltage lower than the voltage (Vzb) of the sustain waveform applied to the bias electrode stain (Z) is applied to the sustain electrode (Z).

First, referring to FIG. 30A, a scan electrode (1) is applied to each of a plurality of subfields of a frame, and a scan electrode (eg, The first bias waveform of the positive polarity applied to the address electrode X while the setup waveform is applied to Y) is wider than the other subfields. That is, the pulse width of the first bias waveform of the first subfield is wider than the pulse width of the first bias waveform of the other subfield.

Next, referring to FIG. 30B, unlike the above-described FIG. 30A, the first bias waveform is applied only to a predetermined number of subfields selected from a plurality of subfields included in a frame. More preferably, the first bias waveform is applied in the low gray level subfield of the plurality of subfields of the frame, and the low gray level subfield is the first sub in the order of the low gray level weight of the plurality of subfields of the frame. This is the case of subfields from the field to the third subfield.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described in detail above, the plasma display device and the driving method thereof according to the present invention actively participate in the setup discharge, thereby preventing erroneous discharge, thereby improving luminous efficiency and reducing power consumption. Has the effect of improving.

In addition, by controlling the time when the voltage of the scan reference waveform applied to the scan electrode gradually increases, that is, the application time of the rising waveform, in the address period, there is an effect of preventing electrical damage of the driving element of the plasma display panel.

In addition, there is an effect that high-speed addressing is made possible by stabilizing the address discharge by maintaining the voltage of the ground level GND at the sustain electrode Z in the set-down period of the reset period.

Claims (43)

A plasma display panel having a scan electrode and a sustain electrode formed thereon, the plasma display panel including an address electrode formed in a direction crossing the scan electrode and the sustain electrode; A driver for applying a driving voltage to the electrodes in a reset period, an address period after the reset period, or a sustain period after the address period; In one or more subfields of the plurality of subfields of the frame, in the setup period of the reset period, the setup waveform gradually rises to the first voltage at the first slope to the first voltage and then gradually rises to the second voltage at the second slope. And apply a first bias waveform having a positive polarity to the address electrode while the setup waveform is applied to the scan electrode, and before the reset period of the first subfield of the plurality of subfields of the frame. A driving pulse controller configured to apply a negative waveform including a falling ramp waveform of gradually decreasing voltage to the sustain electrode, and apply a positive waveform to the sustain electrode; Plasma display device comprising a. The method of claim 1, And a peak voltage of the first bias waveform is one or more and 1.5 times or less than a data voltage applied to the address electrode in the address period. The method of claim 1, And the first bias waveform is a rectangular waveform or a ramp waveform. The method of claim 1, The driving pulse controller And causing the first bias waveform to be applied before the setup waveform. The method of claim 1, The driving pulse controller And the first bias waveform is applied in synchronization with the setup waveform. The method of claim 1, The driving pulse controller And wherein the first bias waveform is applied in one or more subfields of the frame. The method of claim 6, The driving pulse controller And the pulse width of the first bias waveform is widest in a subfield having the lowest gray scale weight among a plurality of subfields of the frame. The method of claim 1, The driving pulse controller And the first bias waveform is applied at a low gray level subfield having a low gray scale weight among a plurality of subfields of the frame. The method of claim 8, And the low gray level subfield is one or more of the subfields from the first subfield to the third subfield in the order of low gray level weight among the plurality of subfields of the frame. The method of claim 9, The driving pulse controller And the pulse width of the first bias waveform is widest in the subfield having the lowest gray scale weight among the low gray subfields of the frame. The method of claim 1, And wherein the first slope is greater than the second slope. The method of claim 1, The magnitude of the first voltage is And a voltage equal to a voltage of a scan reference waveform applied to the scan electrode in the address period after the reset period. The method of claim 12, And the first voltage has a magnitude of 100V or more and 150V or less. The method of claim 1, And a magnitude of the second voltage is 230V or more and 350V or less. The method of claim 1, The driving pulse controller And the magnitude of the second voltage in any one of the plurality of subfields of the frame is different from other subfields. The method of claim 15, The driving pulse controller And the magnitude of the second voltage in a subfield having a lower gray weight is greater than another subfield among any two subfields having different gray weights. The method of claim 1, Driving pulse control unit And a sustain bias waveform having a voltage magnitude of 80 V or more and 120 V or less to the sustain electrode in the address period. The method of claim 1, The driving pulse controller In the sustain period, the first sustain pulse applied to the scan electrode and the first sustain pulse applied to the sustain electrode are not overlapped. And the last sustain pulse applied to the scan electrode and the last sustain pulse applied to the sustain electrode do not overlap in the sustain period. The method of claim 1, The driving pulse controller And a second bias waveform of positive polarity is applied to the address electrode while the first sustain pulse is applied to the scan electrode or the sustain electrode in the sustain period. The method of claim 19, The voltage of the second bias waveform is And a voltage of a first bias waveform or a voltage of a data pulse applied to the address electrode. The method of claim 1, And a distance between the scan electrode and the sustain electrode is greater than or equal to 90 µm (micrometer) and less than or equal to 200 µm (micrometer). The method of claim 21, The scan electrode and the sustain electrode each include a transparent electrode and a bus electrode, And a gap between the scan electrode and the sustain electrode is a gap between the transparent electrode of the scan electrode and the transparent electrode of the sustain electrode. delete The method of claim 1, And wherein the negative waveform has a lowest voltage equal to a voltage of a scan pulse applied to the scan electrode in the address period. The method of claim 1, And wherein the positive waveform is equal to the voltage of the sustain pulse applied in the sustain period. The method of claim 1, And the voltage difference between the first voltage and the second voltage is equal to the magnitude of the voltage of the sustain pulse applied to the scan electrode or the sustain electrode in the sustain period. A plasma display panel having a scan electrode and a sustain electrode formed thereon, the plasma display panel including an address electrode formed in a direction crossing the scan electrode and the sustain electrode; A driving unit for applying a driving voltage to the electrodes in at least one of a reset period, an address period, and a sustain period; In one or more subfields of the plurality of subfields of the frame, in the setup period of the reset period, the setup waveform gradually rises to the first voltage at the first slope to the first voltage and then gradually rises to the second voltage at the second slope. A period of time between the set-up period and before the first scan pulse is supplied to the scan electrode, the first bias waveform being applied to the address electrode while the setup waveform is applied to the scan electrode. A driving pulse controller configured to reduce a magnitude of a voltage applied to the sustain electrode within the address period in the address period; Plasma display device comprising a. The method of claim 27, The driving pulse controller Within the period after the setup period and before the first scan pulse is supplied to the scan electrode, the voltage applied to the sustain electrode is kept the same as the voltage applied to the sustain electrode in the setup period and then the set down period. And ramping the voltage up to a voltage greater than the voltage applied to the sustain electrode in the setup period at the end of the sustain bias waveform. The method of claim 27, The driving pulse controller In the set down period, the voltage applied to the sustain electrode is maintained at the ground level (GND) voltage, and at a part of the end of the set down period, the voltage is raised to a voltage that is greater than the ground level voltage and lower than the voltage of the sustain bias waveform. Plasma display device characterized in that. A plasma display panel having a scan electrode and a sustain electrode formed thereon, the plasma display panel including an address electrode formed in a direction crossing the scan electrode and the sustain electrode; A driving unit for applying a driving voltage to the electrodes in at least one of a reset period, an address period, and a sustain period; By controlling the driving unit, in one or more of the plurality of subfields of the frame, the scan electrode gradually rises to the first voltage with the first slope and then gradually to the second voltage with the second slope in the setup period of the reset period. To apply a rising setup waveform to the scan electrode, and apply a first bias waveform having a positive polarity to the address electrode while the setup waveform is applied to the scan electrode, and to the scan electrode in a set down period after the setup period. A driving waveform is applied such that a falling waveform falling to the voltage is applied, and a rising pulse rising from the third voltage to the fourth voltage with a predetermined slope is applied, and then a scan pulse falling from the fourth voltage to the fifth voltage is applied. A pulse controller; Plasma display device comprising a. The method of claim 30, And the predetermined slope of the rising waveform is smaller than the slope of the sustain pulse applied in the sustain period. The method of claim 30, And the rising waveform is maintained at the fourth voltage for a predetermined period. The method of claim 30, And the rising waveform is applied until the first scan pulse of the scan pulses applied to the scan electrodes is applied. The method of claim 33, wherein And the application time of the rising waveform is within a range of 0 ms (microseconds) and 20 ms (microseconds) or less. The method of claim 34, wherein And the application time of the rising waveform is within a range of 6 microseconds or more and 10 microseconds or less. The method of claim 30, And the third voltage and the fifth voltage are the same. The method of claim 30, The driving pulse controller And an application time of the rising waveform applied to at least one scan electrode of the scan electrodes is different from an application time of the rising waveform applied to at least one other scan electrode. The method of claim 30, The scan electrodes are divided into two or more scan electrode groups including at least one scan electrode, The driving pulse controller And an application time of the rising waveform applied to at least one scan electrode group is different from an application time of the rising waveform applied to at least one other scan electrode group. The method of claim 38, And said at least two scan electrode groups comprise the same number of scan electrodes. The method of claim 38, And at least one scan electrode group of the two or more scan electrode groups includes a different number of scan electrodes than the number of scan electrodes included in the other scan electrode groups. The method of claim 38, And an application time of the rising waveform is the same for all scan electrodes included in one scan electrode group. The method of claim 38, And a difference in application time of the rising waveform applied to two or more scan electrode groups including the at least one scan electrode is the same or different. A plasma display panel having a scan electrode and a sustain electrode formed thereon, the plasma display panel including an address electrode formed in a direction crossing the scan electrode and the sustain electrode; A driving unit for applying a driving voltage to the electrodes in at least one of a reset period, an address period, and a sustain period; By controlling the driving unit, in one or more of the plurality of subfields of the frame, the scan electrode gradually rises to the first voltage with the first slope and then gradually to the second voltage with the second slope in the setup period of the reset period. To apply a rising setup waveform to the scan electrode, and apply a first bias waveform having a positive polarity to the address electrode while the setup waveform is applied to the scan electrode, and to the scan electrode in a set down period after the setup period. A scan pulse that falls from the fourth voltage to the fifth voltage after a falling waveform gradually descending to the voltage is applied and an rising waveform gradually rising from the third voltage to the fourth voltage with a predetermined slope is applied; Is applied, and the first scan pulse to the scan electrode after the setup period In the period prior to being fed to the magnitude of the voltage applied to the sustain electrode driving pulse control section that to be lower than the bias voltage of the sustain waveform applied to the sustain electrode in the address period; Plasma display device comprising a.

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