KR100682181B1 - Method for forming isolation film of semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a device isolation film of a semiconductor device, in order to prevent the Hot Electron Induced Punch Through (HEIP) phenomenon occurring in the peripheral circuit region of the semiconductor substrate, the present invention is to form a device isolation film of the peripheral circuit region After forming the sidewall oxide film and the liner nitride film in the trench, the polysilicon layer is formed on the entire surface of the semiconductor substrate, and the liner nitride film on the trench is removed to alleviate the HEIP characteristics that may occur in the trench, and the polysilicon layer remains in the trench. The present invention relates to a method of forming a device isolation film of a semiconductor device capable of improving a gap fill characteristic of a trench by forming a first gap fill oxide film by oxidizing and volume expanding the first gap fill oxide film and then forming a second gap fill oxide film for trench filling.

Description

METHODS FOR FORMING ISOLATION FILM OF SEMICONDUCTOR DEVICE}

1A to 1D are cross-sectional views illustrating a method of forming a device isolation film of a semiconductor device according to the prior art.

2A through 2E are cross-sectional views illustrating a method of forming an isolation layer in a semiconductor device according to the present invention.

The present invention relates to a method of forming a device isolation film of a semiconductor device, in order to prevent the Hot Electron Induced Punch Through (HEIP) phenomenon occurring in the peripheral circuit region of the semiconductor substrate, the present invention is to form a device isolation film of the peripheral circuit region After forming the sidewall oxide film and the liner nitride film in the trench, the polysilicon layer is formed on the entire surface of the semiconductor substrate, and the liner nitride film on the trench is removed to alleviate the HEIP characteristics that may occur in the trench, and the polysilicon layer remains in the trench. The present invention relates to a method of forming a device isolation film of a semiconductor device capable of improving a gap fill characteristic of a trench by forming a first gap fill oxide film by oxidizing and volume expanding the first gap fill oxide film and then forming a second gap fill oxide film for trench filling.

In the method of forming a device isolation film of a semiconductor device according to the related art, a sidewall oxide film is formed to prevent crystal defects in a semiconductor substrate trench interface when forming a device isolation film in a peripheral circuit region. Next, an HDP oxide film for device isolation is formed. In this case, the device separation HDP oxide film expands in a subsequent thermal process to give a compression stress to the semiconductor substrate to generate junction leakage, and deteriorate electrical characteristics of the semiconductor device. There is this. Accordingly, a liner nitride film is formed between the sidewall oxide film and the HDP oxide film to solve the leakage current problem.

1A to 1D are cross-sectional views illustrating a method of forming an isolation layer in a semiconductor device according to the prior art.

Referring to FIG. 1A, the pad oxide layer 20 and the pad nitride layer 30 are sequentially formed on the peripheral circuit region of the semiconductor substrate 10. Next, the trench 40 is formed using a mask defining the device isolation region, and the sidewall oxide film 50 is formed on the sidewall of the trench 40.

Referring to FIG. 1B, a liner nitride layer 60 is formed on the entire surface of the semiconductor substrate 10 including the trench 40.

Referring to FIG. 1C, the liner oxide layer 80 is sequentially formed on the liner nitride layer 60.

Referring to FIG. 1D, an HDP oxide film 90 filling the trench 40 is formed. Next, a planarization etching process is performed to form an isolation layer of the semiconductor device.

As described above, the leakage current problem can be solved to some extent by adding a liner nitride film between the sidewall oxide film and the HDP oxide film. However, as the semiconductor device is highly integrated, hot electrons are easily formed between the sidewall oxide film and the liner nitride film. , Channel Shortening and Hot Carrier phenomenon deteriorate the leakage current characteristics of PMOS transistors, increase stand-by current, and Hot Electron Induced Punch Through (HEIP) Problems intensify.

In addition, as the width of the trench is gradually narrowed, the gapfill property is deteriorated, and when the HDP oxide is buried, the filling process is not normally performed and voids occur in the trench.

In order to solve the above problems, the present invention is to form a device isolation film in the peripheral circuit region, by forming a sidewall oxide film and a liner nitride film in the trench, and then forming a polysilicon layer on the entire surface of the semiconductor substrate and removing the liner nitride film on the trench The first gap fill oxide layer is formed by oxidizing and volume-expanding the polysilicon layer remaining in the trench, and forming a second gap fill oxide layer in the trench to form gap gap characteristics of the trench. It is an object of the present invention to provide a method for forming a device isolation film of a semiconductor device which can be improved.

Device isolation film forming method of a semiconductor device according to the present invention for achieving the above object,

Sequentially forming a pad oxide film and a pad nitride film on the semiconductor substrate;

Etching the pad nitride film, the pad oxide film, and the semiconductor substrate having a predetermined thickness to form a trench in an isolation region;

Forming a sidewall oxide film on the entire surface including the trench;

Forming a liner nitride film and a polysilicon layer on the sidewall oxide film at a predetermined thickness;

Etching the polysilicon layer and the liner nitride layer until the sidewall oxide layer inside the trench is partially exposed by an entire surface etching process;
Oxidizing the polysilicon layer in the trench to form a first gap fill oxide layer by an annealing process;

And forming a second gapfill oxide film filling the trench to complete the device isolation film.
Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

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Referring to FIG. 2A, a pad oxide layer 120 and a pad nitride layer 130 are sequentially formed on an entire surface of a semiconductor substrate 100 having a cell region (not shown) and a peripheral circuit region, and then a device isolation region of the peripheral circuit region. The trench 140 may be formed by etching the pad nitride layer 130, the pad oxide layer 120, and the semiconductor substrate 100 having a predetermined thickness using a photoresist pattern (not shown) defining an etch mask. Next, the photoresist pattern (not shown) is removed, and the sidewall oxide film 150 is formed on the entire surface of the semiconductor substrate 100 including the trench 140. At this time, the sidewall oxide film 150 is preferably formed to a thickness of 20 ~ 50Å.

Referring to FIG. 2B, a liner nitride layer 160 is formed on the sidewall oxide layer 150. Here, the liner nitride layer 160 may reduce the stress applied to the sidewalls of the trench 140 by expanding the oxide layer filling the trench 140 in a subsequent process, and reducing the leakage current generated by the stress.

Referring to FIG. 2C, a polysilicon layer 170 is formed on the liner nitride layer 160.
Here, the thickness of the polysilicon layer 170 is preferably formed to 20 ~ 50Å.

Referring to FIG. 2D, the polysilicon layer 170 and the liner nitride layer 160 are etched until the sidewall oxide layer inside the trench 140 is partially exposed by performing a front side etching process. Here, by removing the liner nitride layer 160 on the trench 140, HEIP characteristics that may occur on the trench 140 may be improved.

Referring to FIG. 2E, an annealing process is performed to oxidize and volume expand the polysilicon layer 170 remaining in the trench 140 to form a first gap fill oxide layer 180 in the trench 140. Next, after forming the second gap fill oxide layer 190 filling the trench 140, the semiconductor substrate 100 is exposed by the CMP process to complete the device isolation layer.

As described above, the present invention forms a polysilicon layer and removes the liner nitride layer on the trench to mitigate HEIP characteristics that may occur in the trench, and to oxidize and volume expand the polysilicon layer remaining in the trench to form a first layer. After forming the gapfill oxide layer, a second gapfill oxide layer for filling the trench may be formed to improve gap fill characteristics of the trench.

As described above, according to the present invention, in forming the device isolation film of the peripheral circuit region, after forming the sidewall oxide film and the liner nitride film in the trench, a polysilicon layer is formed on the entire surface of the semiconductor substrate and the trench is removed by removing the liner nitride film on the trench. The first gap fill oxide film is formed by oxidizing and volume-expanding the polysilicon layer remaining in the trench, and forming a second gap fill oxide film for trench filling, thereby improving the gap fill property of the trench. You can. Therefore, it is possible to stably form the device isolation film in the peripheral circuit area, and to reduce the time and cost and increase the production yield in the process of forming a highly integrated high speed semiconductor device.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (2)

Sequentially forming a pad oxide film and a pad nitride film on the semiconductor substrate; Etching the pad nitride film, the pad oxide film, and the semiconductor substrate having a predetermined thickness to form a trench in the device isolation region; Forming a sidewall oxide film on a front surface of the trench; Forming a liner nitride film and a polysilicon layer on a surface of the sidewall oxide film; Etching the polysilicon layer and the liner nitride layer until the sidewall oxide layer inside the trench is partially exposed by an entire surface etching process; Oxidizing the polysilicon layer in the trench to form a first gap fill oxide layer by an annealing process; And Forming a second gapfill oxide layer filling the trench to complete an isolation layer; Device isolation film forming method of a semiconductor device comprising a. The method of claim 1, The thickness of the polysilicon layer is a device isolation film forming method of a semiconductor device, characterized in that formed in 20 ~ 50Å.

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