KR100650719B1 - Phase-change memory device and method for manufacturing the same - Google Patents

Abstract

The present invention discloses a phase change memory device capable of reducing the amount of current by reducing the contact area between the lower electrode and the phase change film and a method of manufacturing the same. Disclosed is a semiconductor substrate having a lower pattern; An interlayer insulating film formed on the semiconductor substrate to cover the lower pattern; A contact plug formed in the interlayer insulating film; A lower electrode formed on the contact plug and an interlayer insulating layer adjacent thereto; A first oxide film formed on the interlayer insulating film including the lower electrode and having a contact hole exposing the lower electrode; A pair of upper electrodes formed to be spaced apart from each other on the first oxide film; A first phase conversion film formed in a spacer form on each of the sidewalls facing the upper electrodes; And a second phase conversion film formed in the form of a spacer on the side of the first phase conversion film and the contact hole.

Description

 Phase change memory device and its manufacturing method {PHASE-CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME}

1 is a diagram for explaining a conventional phase change memory cell.

2 is a cross-sectional view illustrating a phase change memory device according to an embodiment of the present invention.

3A to 3E are cross-sectional views of steps for explaining a method of manufacturing a phase change memory device according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

21 semiconductor substrate 22 interlayer insulating film

23 contact plug 24 lower electrode

25: first oxide film 26: conductive film

26a, 26b: upper electrode 27: first contact hole

28: first phase conversion film 29: the second contact hole

30: second phase conversion film 31: second oxide film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase change memory device and a method of manufacturing the same, and more particularly, to a phase change memory device capable of reducing the amount of current by reducing the contact area between the lower electrode and the phase change film and a method of manufacturing the same.

Generally, a memory device is a volatile random access memory (RAM) device that loses input information when the power is cut off, and a ROM that keeps the input data stored even when the power is cut off. ) Are largely divided into elements. The volatile RAM devices may include DRAM and SRAM, and the nonvolatile ROM devices may include flash memory devices such as EEPROM (Elecrtically Erasable and Programmable ROM). have.

However, although the DRAM is a very good memory device as is well known, high charge storage capability is required for periodic refresh operation, and for this purpose, it is difficult to achieve high integration since the electrode surface area must be increased. In addition, the flash memory device requires a higher operating voltage than a power supply voltage in connection with a structure in which two gates are stacked, and thus requires a separate boost circuit to form a voltage required for write and erase operations. Therefore, there is a difficulty in high integration.

Accordingly, many studies have been conducted to develop new memory devices having characteristics of non-volatile memory devices and simple structures. For example, a phase change RAM device is proposed. It became.

The phase change memory device utilizes a difference in resistance between crystalline and amorphous phases due to the phase change of the phase conversion film interposed between the electrodes from the crystal state to the amorphous state through the current flow between the lower electrode and the upper electrode. It is a storage element for determining the information stored in the.

In other words, the phase-conversion memory device uses a chalcogenide film as a phase-conversion film, which is a compound film composed of germanium (Ge), stevidium (Sb), and tellurium (Te). GST film), a phase change occurs between an amorphous state and a crystalline state by an applied current, that is, Joule heat, wherein the resistivity of the phase change film having an amorphous state is in a crystalline state. Since it is higher than the specific resistance of the phase change film having a value, the current flowing through the phase change film in the read mode is sensed to determine whether the information stored in the phase change memory cell is logic '1' or logic '0'.

1 is a diagram for explaining a conventional phase change memory cell.

As shown in FIG. 1, the conventional phase change memory device forms an interlayer insulating film 5 on a semiconductor substrate 1 including a lower electrode 3. Next, the interlayer insulating layer 5 is etched to form the contact plug 7 electrically connected to the source regions, and then the phase change layer 9 is formed on the substrate product including the contact plug 7. Subsequently, an upper electrode 11 is formed on the phase conversion film 9.

When a voltage is applied to program the phase change memory cell, heat is generated at the interface between the phase change film 9 and the contact plug 7 to change the portion 9a of the phase change film into an amorphous state. The heat of the edge C of the phase conversion film 9 and the contact plug 7 may diffuse into the surrounding interlayer insulating film 7 and may not be a temperature necessary for changing the state. As a result, when the phase change film is amorphous, an abnormal region in which the phase change film 9 of the edge is not amorphous may be generated.

In addition, since the contact area between the lower electrode and the phase conversion film is large during read and write operations of the phase change memory device, the amount of current required for phase change increases, thereby affecting the speed of the phase change memory device. Will give.

Accordingly, an object of the present invention is to provide a phase change memory device and a method of manufacturing the same, which reduce the amount of current by reducing the contact area between the lower electrode and the phase conversion film. .

The present invention for achieving the above object is a semiconductor substrate provided with a lower pattern; An interlayer insulating film formed on the semiconductor substrate to cover the lower pattern; A contact plug formed in the interlayer insulating film; A lower electrode formed on the contact plug and an interlayer insulating layer adjacent thereto; A first oxide film formed on the interlayer insulating film including the lower electrode and having a contact hole exposing the lower electrode; A pair of upper electrodes formed to be spaced apart from each other on the first oxide film; A first phase conversion film formed in a spacer form on each of the sidewalls facing the upper electrodes; And a second phase conversion film formed in the form of a spacer on the side of the first phase conversion film and the contact hole.

Here, the first and second phase conversion film is characterized in that the planar donut shape.

The lower electrode and the upper electrode may be made of a polysilicon film or a metal film.

And a second oxide film formed on the upper electrode and the second phase conversion film to fill a contact hole.

In addition, the present invention provides a semiconductor substrate having a lower pattern; Forming an interlayer insulating film on the semiconductor substrate so as to cover the lower pattern; Forming a contact plug in the interlayer insulating film; Forming a lower electrode on the contact plug and an interlayer insulating layer adjacent thereto; Forming a first oxide film on the interlayer insulating film including the lower electrode; Forming a conductive film on the first oxide film; Etching the conductive film to expose the first oxide film; Forming a first phase conversion film in a spacer form on sidewalls of the etched conductive film; Etching the first oxide layer to form a contact hole exposing a lower electrode; Forming a second phase conversion film in a spacer form on side surfaces of the first phase conversion film and the contact hole; Forming a second oxide film on a substrate resultant on which the second phase conversion film is formed; And etching the second oxide film and the conductive film to form a pair of upper electrodes formed of the conductive film and spaced apart from each other.

Here, the first oxide film is characterized in that after the formation of the surface planarization using a CMP process.

The first and second phase conversion films may be formed in a planar donut shape.

The lower electrode and the upper electrode may be formed of a polysilicon film or a metal film.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view illustrating a phase change memory device according to an embodiment of the present invention.

As shown in FIG. 2, in the phase change memory device of the present invention, an interlayer insulating film 22 is formed on a semiconductor substrate 21 including a lower pattern (not shown) to cover the lower pattern. A contact plug 23 is formed in 22. A lower electrode 24 is formed on the contact plug 23 and the interlayer insulating layer 22 adjacent thereto. A first oxide layer 25 is formed on the interlayer insulating layer 22 including the lower electrode 24 and the second contact hole 29 exposing the lower electrode 24. A pair of upper electrodes 26 are formed on the first oxide film 25 so as to be spaced apart from each other. A first phase conversion layer 28 is formed in each spacer sidewall of the upper electrodes 26 in the form of a spacer. A second phase conversion film 30 is formed in the form of a spacer on side surfaces of the first phase conversion film 28 and the second contact hole 29. A second oxide layer 31 is formed on the upper electrode 26 and the second phase conversion layer 30 to fill the second contact hole 29.

The first and second phase conversion films may be formed in a donut shape in plan view, and the lower electrode and the upper electrode may be made of a polysilicon film or a metal film.

When heat is generated at the contact surface of the second phase conversion layer 30 during the read and write operations of the phase change memory device, the state of the phase change layer is changed to an amorphous state or a crystalline state. In the phase change memory device of the present invention, a lower phase electrode is formed by forming a spacer-shaped double phase change layer on opposite sidewalls of the upper electrodes 26 and on the side surfaces of the first phase change layer 28 and the second contact hole 29. Since the contact area A between the 24 and the second phase conversion film 30 becomes small, the current required for phase change can be reduced, so that the speed of the phase change memory element can be improved.

3A to 3E are cross-sectional views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention.

As shown in FIG. 3A, the first interlayer insulating layer 22 is formed on the semiconductor substrate 21 having the lower pattern (not shown) to cover the lower pattern. Next, after forming the contact plug 23 in the first interlayer insulating layer 22, a lower electrode 24 is formed on the contact plug 23 and the interlayer insulating layer 22 adjacent thereto. Subsequently, a first oxide film 25 and a conductive film 26 are formed on the interlayer insulating film 22 including the lower electrode 24. After the formation of the first oxide film, the CMP process is performed to planarize the surface of the first oxide film.

As shown in FIG. 3B, the conductive layer 26 is etched to expose the first oxide layer 25 to form a first contact hole 27. Next, a first phase conversion layer 28 is formed on the sidewall of the etched conductive layer 26 in the form of a spacer.

As shown in FIG. 3C, the first oxide layer 25 is etched to form a second contact hole 29 exposing the lower electrode 24.

As shown in FIG. 3D, the second phase conversion layer 30 is formed on the side surfaces of the first phase conversion layer 28 and the second contact hole 29 in the form of a spacer.                     

As shown in FIG. 3E, the second oxide film 31 is formed on the substrate product on which the second phase conversion film 30 is formed. Subsequently, the second oxide layer 31 and the conductive layer 26 are etched to form a pair of upper electrodes 26a and 26b formed of the conductive layer and spaced apart from each other.

In the present invention, the first and second phase change films 28 and 30 are formed in a planar donut shape. In addition, the lower electrode 24 and the upper electrodes 26a and 26b are formed of a polysilicon film or a metal film.

In the above, the present invention has been described with reference to some examples, but the present invention is not limited thereto, and a person of ordinary skill in the art may make many modifications and variations without departing from the spirit of the present invention. I will understand.

As described above, the present invention reduces the contact area between the lower electrode and the phase change film by forming a spacer-type double phase change film on opposite sidewalls of the upper electrodes, and on the side surfaces of the first phase change film and the second contact hole. The current required for phase change can be reduced.

Therefore, the speed of the phase conversion memory element can be improved by reducing the amount of current required for phase conversion.

Claims (8)

A semiconductor substrate having a lower pattern; An interlayer insulating film formed on the semiconductor substrate to cover the lower pattern; A contact plug formed in the interlayer insulating film; A lower electrode formed on the contact plug and an interlayer insulating layer adjacent thereto; A first oxide film formed on the interlayer insulating film including the lower electrode and having a contact hole exposing the lower electrode; A pair of upper electrodes formed to be spaced apart from each other on the first oxide film; A first phase conversion film formed in a spacer form on each of the sidewalls facing the upper electrodes; And And a second phase conversion film formed in the form of a spacer on the side of the first phase conversion film and the contact hole. The phase change memory device as claimed in claim 1, wherein the first and second phase change films have a donut shape in plan view. The phase change memory device as claimed in claim 1, wherein the lower electrode and the upper electrode are made of a polysilicon film or a metal film. The phase change memory device as claimed in claim 1, further comprising a second oxide film formed on the upper electrode and the second phase conversion film to fill a contact hole. Providing a semiconductor substrate having a lower pattern; Forming an interlayer insulating film on the semiconductor substrate so as to cover the lower pattern; Forming a contact plug in the interlayer insulating film; Forming a lower electrode on the contact plug and an interlayer insulating layer adjacent thereto; Forming a first oxide film on the interlayer insulating film including the lower electrode; Forming a conductive film on the first oxide film; Etching the conductive film to expose the first oxide film; Forming a first phase conversion film in a spacer form on sidewalls of the etched conductive film; Etching the first oxide layer to form a contact hole exposing a lower electrode; Forming a second phase conversion film in a spacer form on side surfaces of the first phase conversion film and the contact hole; Forming a second oxide film on a substrate resultant on which the second phase conversion film is formed; And etching the second oxide film and the conductive film to form a pair of upper electrodes formed of the conductive film and spaced apart from each other. The method of manufacturing a phase change memory device according to claim 5, wherein after the formation of the first oxide film, surface planarization is performed using a CMP process. 6. The method of claim 5, wherein the first and second phase change films are formed in a planar donut shape. 6. The method of claim 5, wherein the lower electrode and the upper electrode are formed of a polysilicon film or a metal film.

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