KR100605599B1 - Semiconductor device and Method for fabricating the same - Google Patents

Abstract

SUMMARY OF THE INVENTION The present invention provides a semiconductor device having a fuse part and a fuse part with improved corrosion protection of a semiconductor memory device, and a method of manufacturing the same. According to an aspect of the present invention, there is provided a method for forming a first interlayer insulating film on a substrate. step; Forming a fuse layer on the first interlayer insulating film; Forming a second interlayer insulating film on the fuse layer; Forming a first contact plug at both ends of the fuse layer: forming a second contact plug penetrating the first interlayer insulating film, the fuse layer, and the second interlayer insulating film between the first contact plugs; And selectively etching the second interlayer insulating layer between the second contact plugs so that a portion of the upper second interlayer insulating layer of the fuse layer remains to form a fuse box. According to another aspect of the invention, the fuse; Contact plugs disposed at both ends of the fuse to connect metal wires and the fuse; And a corrosion preventing dummy contact plug provided between a repair etching region and the contact plug and made of a conductive material having oxidation resistance.

Semiconductors, Pads / Repairs, Fuse Boxes, Tungsten, Corrosion

Description

Semiconductor device and method for fabricating the same             

1 is a plan view showing a fuse unit of a semiconductor device according to the prior art;

FIG. 2A is a sectional view of the fuse portion shown in FIG. 1; FIG.

FIG. 2B is a view showing insulating the fuse by irradiating a laser to the fuse box of FIG. 2A; FIG.

Figure 2c is a diagram showing the corrosion problem of the fuse when insulated the fuse.

3 is a plan view showing a fuse unit according to a preferred embodiment of the present invention.

4A is a sectional view of the fuse shown in FIG.

Figure 4b is a view showing the fuse to insulate the fuse by laser irradiation to the fuse box of Figure 4a.

Figure 4c is a view showing that the corrosion problem of the fuse portion is solved.

* Explanation of symbols on the main parts of the drawing

30: substrate

31: first interlayer insulating film

32: contact blocking layer

33: second interlayer insulating film

34: first contact plug

35: second contact plug

36: third interlayer insulating film

37: passivation film

38: fuse layer

39: metal wiring

100: fuse box

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor memory technology, and more particularly, to a manufacturing process of a repair fuse in a semiconductor device manufacturing process.

If any one of a number of microcells is defective in memory device manufacturing, it can not function as a memory and is therefore treated as defective. However, even though only a few cells in the memory have failed, discarding the entire device as a defective product is an inefficient process in terms of yield.

Therefore, the current yield is improved by replacing the defective cells by using spare memory cells (hereinafter, referred to as redundancy cells) previously installed in the memory.

In the repair operation using redundancy cells, spare rows and spare columns are pre-installed in each cell array to repair defective memory cells in row / column units as spare memory cells. It proceeds in such a way that it is described in detail as follows.

In other words, when a defective memory cell is selected through a test after wafer processing is completed, a program is executed in the internal circuit to replace the corresponding address with the address signal of the spare cell. Therefore, when an address signal corresponding to a bad line is input in actual use, the selection is switched to a spare line instead. One of the programming methods is a method of burning a fuse with a laser beam, and the wiring broken by the laser irradiation is called a fuse line, and the broken portion and the area surrounding the fuse box are called a fuse box.

In the case of a failure of a semiconductor device, a fuse is used to repair a defective part. The fuse is not formed separately by an additional process, but forms a bit line or a word line. It forms using a conductive layer (for example, polysilicon). In general, a portion of the insulating film on the repair fuse box region is etched along with the pad etching of the semiconductor device, so it is called a pad / repair etching. Also, in recent years, as the degree of integration and speed of semiconductor memory devices have increased, fuse layers have used metal series.

1 is a plan view illustrating a fuse unit of a semiconductor device according to the related art, and FIG. 2A illustrates a cross-sectional view of the fuse unit illustrated in FIG. 1.

Hereinafter, a process of manufacturing a fuse unit of a semiconductor device according to the related art will be described with reference to FIG. 2A. 1 is a plan view of the fuse of FIG. 2A, and the same reference numerals are used to describe the fuse of FIG. 2A and thus description thereof will be omitted.

First, a first interlayer insulating film 11 is formed on the semiconductor substrate 10, and a contact blocking layer pattern 13 is formed on the first interlayer insulating film 11 to serve as a blocking function in a subsequent contact process, and a second interlayer insulating film is formed thereon. (12) is formed. In this case, the contact blocking layer pattern 13 is used as a stop film of the contact plug formed through the fuse layer in a later process, and is formed by patterning a conductive layer used as a bit line in the fuse part.

Subsequently, a fuse layer 14 is formed on the second interlayer insulating film 12, and a third interlayer insulating film 15 is formed on the fuse layer 14. In this case, the fuse layer 14 is not a new conductive layer, but a layer formed together when forming a conductive layer used in a semiconductor memory device, for example, a bit line or a word line.

Subsequently, the third interlayer insulating layer 15 is selectively etched to form contact holes, and the contact holes are filled with a conductive material to form the contact plugs 16. The contact hole formation selectively etches the third interlayer insulating film 15, and then etches the fuse layer 14 and the second interlayer insulating film 12 to stop the contact blocking layer pattern 13.

Subsequently, the metal wiring 17 is formed to be connected to the contact plug 16, and a passivation film 18 is formed on the metal wiring 17. Subsequently, the insulating film is etched to have a predetermined thickness on the fuse part to form a fuse box 50.

FIG. 2B is a view showing insulation of the fuse part by irradiating a laser to the fuse box 50, and FIG. 2C is a view showing insulation of the fuse part by laser irradiation.

In this case, the interlayer insulating films 12 and 15 exposed to the fuse box 50 are usually formed of silicon oxide-based insulating films. In particular, in order to alleviate large steps in the cell array region, BPSG ( Boron phosphorous silicate glass (PSG), phosphorous silicate glass (PSG), spin on glass (SOG), tetra ethyl ortho silicate (TEOS), and undoped silicateglass (USG) films are used. However, the film of BPSG, PSG, SOG, TEOS, etc. is weak to moisture, and when moisture penetrates through the film, not only the fuse layer 14 but also the internal metal wiring 17 or the contact plug 16 may corrode and the semiconductor. Fatal adverse effects on the reliability of the device.

Therefore, in order to suppress defects caused by oxidation of the fuse part, a fuse layer was added separately using a strong oxidation layer, or a fuse part repair process was added, and then a separate process was used to block the fuse part.

The problem that arises is that if an oxidizing layer is used separately, a cost increase factor occurs due to the use of an additional layer, and an oxidizing layer among the layers already in use can be used in the fuse unit to prevent corrosion, The manufacturing process of the strong layer does not correspond to the fuse portion forming process is difficult to proceed the process.

In addition, in the case of adding a process to allow the passivation film to block the fuse part, a cost increase factor may occur due to the process addition.

An object of the present invention is to provide a semiconductor device having a fuse part and a fuse part with improved corrosion protection while maintaining the process of the conventional fuse part, and a method of manufacturing the same.

In order to achieve the above object, according to an aspect of the present invention, forming a first interlayer insulating film on a substrate, forming a contact blocking layer pattern on the first interlayer insulating film, and the contact blocking layer Forming a second interlayer insulating film to cover the pattern, forming a first contact plug connected to the contact blocking layer pattern inside the second interlayer insulating film, and forming the second interlayer between the first contact plugs. Forming a second contact plug made of an oxidation-resistant conductive material to be connected to the contact blocking layer pattern in a direction parallel to the first contact plug in the insulating film, and to the first and second contacts on the second interlayer insulating film Forming a fuse layer connected to the plug, forming a third interlayer insulating film to cover the fuse layer, and Forming a third contact plug connected to an upper portion of the fuse layer so as to correspond to the first contact plug in the interlayer insulating film; and forming the third contact plug in the third interlayer insulating film between the third contact plugs. Forming a fourth contact plug corresponding to the upper portion of the fuse layer and forming a fourth contact plug made of an oxidation-resistant conductive material, and the third contact plug between the fourth contact plug so that a portion of the third interlayer insulating layer on the fuse layer remains. Provided is a method of manufacturing a semiconductor device comprising the step of selectively etching the interlayer insulating film to form a fuse box.

According to another aspect of the present invention, a first interlayer insulating film formed on a substrate, a first contact plug formed inside the first interlayer insulating film, and the first contact plug in parallel with the first contact plug may be disposed between the first contact plug. A second contact plug formed in the first interlayer insulating layer and formed to be connected to the first and second contact plugs on the first interlayer insulating layer, and to cover the fuse layer; The second interlayer insulating layer formed therein, a third contact plug connected to an upper portion of the fuse layer so as to correspond to the first contact plug in the second interlayer insulating layer, and the second interlayer insulating layer in the second interlayer insulating layer between the third contact plugs. A fourth contact plug corresponding to the second contact plug and connected to an upper portion of the fuse layer, the fourth contact plug made of an oxidation-resistant conductive material, and the fuse A semiconductor device includes a fuse box formed by selectively etching the second interlayer insulating layer between the fourth contact plugs so that a portion of the second interlayer insulating layer on the layer remains.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. do.

FIG. 3 is a plan view showing a fuse unit according to a preferred embodiment of the present invention, and FIG. 4A is a sectional view of the fuse unit shown in FIG.

Hereinafter, a process of manufacturing a fuse unit of a semiconductor device will be described with reference to FIG. 4A. 3 is a plan view of the fuse of FIG. 4A, and the same reference numerals are used to describe the fuse of FIG. 4A and thus description thereof will be omitted.

First, a first interlayer insulating film 31 is formed on the semiconductor substrate 30, and a contact blocking layer pattern 32 is formed on the first interlayer insulating film 31 to serve as a blocking function in a subsequent contact process. The insulating film 33 is formed. The contact blocking layer pattern is used as a stop film of a contact hole formed through a fuse layer in a subsequent process, and in this case, a conductive film used as a bit line is patterned on the fuse part.

Subsequently, a fuse layer 38 is formed on the second interlayer insulating film 33, and a third interlayer insulating film 36 is formed on the fuse layer 38. In this case, the fuse layer 38 does not form a new conductive layer, but a layer formed together when forming a conductive layer already used in a semiconductor memory device, for example, a bit line or a word line. to be.

Subsequently, the third interlayer insulating layer 36 is selectively etched to form a first contact hole for connecting the fuse layer and the metal and a second contact hole to prevent corrosion. The formation of the first and second contact holes selectively etches the third interlayer insulating layer 36, and then etches the fuse layer 38 and the second interlayer insulating layer 32 to stop the contact blocking layer pattern 13.

Subsequently, the first contact hole fills the conductive material to form the first contact plug 34, and the second contact hole 35 fills the second contact plug 35 by embedding a conductive material resistant to corrosion such as tungsten. Form.

Subsequently, the metal wire 39 is formed to be connected to the first contact plug 34, and the passivation film 37 is formed on the metal wire 39. Subsequently, the passivation film 37 and the third interlayer insulating film 36 are etched to form a fuse box 100 on the fuse part so that the third interlayer insulating film 36 remains at a predetermined thickness.

FIG. 4B is a view showing insulating the fuse by irradiating a laser to the fuse box of FIG. 4A. Figure 4c is a view showing that the corrosion problem of the fuse portion is solved.

Referring to Figure 4b, the laser is irradiated to insulate the fuse layer 38. Subsequently, referring to FIG. 4C, the fuse part is insulated by laser irradiation, which causes corrosion along the fuse line, and then stops corrosion in the second contact plug formed of tungsten.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

According to the present invention, the fuse part may have an excellent effect on preventing corrosion during fuse repair, thereby greatly improving the repair yield of the semiconductor device.

Claims (8)

Forming a first interlayer insulating film on the substrate; Forming a contact blocking layer pattern on the first interlayer insulating layer; Forming a second interlayer insulating film to cover the contact blocking layer pattern; Forming a fuse layer on the second interlayer insulating film; Forming a third interlayer insulating film to cover the fuse layer; Etching the third interlayer insulating layer, the fuse layer, and the second interlayer insulating layer to expose the contact blocking layer pattern to form first and second contact holes; Forming a first contact plug in which the first contact hole is embedded and connected to the fuse layer; Forming a second contact plug made of an oxidation-resistant conductive material such that the second contact hole formed between the first contact plugs is buried; And Forming a fuse box by selectively etching the third interlayer insulating layer between the second contact plugs so that the third interlayer insulating layer on the fuse layer remains a portion; Semiconductor device manufacturing method comprising a. The method of claim 1, The contact blocking layer pattern may include an etch stop layer having an etch selectivity different from that of the second and third interlayer insulating layers. The method of claim 2, And the second contact plug is formed of tungsten. A first interlayer insulating film formed on the substrate; A fuse layer formed on the first interlayer insulating layer; A second interlayer insulating film formed to cover the fuse layer; A first contact plug formed in the second interlayer insulating layer to be connected to the fuse layer; A second contact plug formed of an oxidation resistant conductive material so as to be connected to the fuse layer in the second interlayer insulating layer between the first contact plugs; And A fuse box formed by selectively etching the second interlayer insulating layer between the second contact plugs so that the second interlayer insulating layer on the fuse layer remains a portion; A semiconductor device comprising a. delete delete The method of claim 4, wherein The first and second contact plugs are disposed on the etch stop pattern. The method of claim 4, wherein And the second contact plug is formed of tungsten.

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