KR100605142B1 - 코히런시를 유지하기 위한 유연한 프로브/프로브 응답 라우팅 - Google Patents

코히런시를 유지하기 위한 유연한 프로브/프로브 응답 라우팅 Download PDF

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KR100605142B1
KR100605142B1 KR1020017007739A KR20017007739A KR100605142B1 KR 100605142 B1 KR100605142 B1 KR 100605142B1 KR 1020017007739 A KR1020017007739 A KR 1020017007739A KR 20017007739 A KR20017007739 A KR 20017007739A KR 100605142 B1 KR100605142 B1 KR 100605142B1
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node
probe
response
data
packet
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KR20010082373A (ko
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켈러제임스비.
구리크데일이.
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663Access to shared memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0817Cache consistency protocols using directory methods
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25Using a specific main memory architecture
    • G06F2212/254Distributed memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/62Details of cache specific to multiprocessor cache arrangements
    • G06F2212/621Coherency control relating to peripheral accessing, e.g. from DMA or I/O device

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
  • Noise Elimination (AREA)
KR1020017007739A 1998-12-21 1999-08-26 코히런시를 유지하기 위한 유연한 프로브/프로브 응답 라우팅 Expired - Fee Related KR100605142B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/217,367 1998-12-21
US09/217,367 US6631401B1 (en) 1998-12-21 1998-12-21 Flexible probe/probe response routing for maintaining coherency

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KR20010082373A KR20010082373A (ko) 2001-08-29
KR100605142B1 true KR100605142B1 (ko) 2006-07-28

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US (2) US6631401B1 (enExample)
EP (1) EP1141839B1 (enExample)
JP (1) JP4712974B2 (enExample)
KR (1) KR100605142B1 (enExample)
BR (1) BR9907499A (enExample)
DE (1) DE69904758T2 (enExample)
WO (1) WO2000038069A1 (enExample)

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* Cited by examiner, † Cited by third party
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KR101089810B1 (ko) * 2003-01-27 2011-12-12 어드밴스드 마이크로 디바이시즈, 인코포레이티드 캐시로 쓰기 데이터를 삽입하기 위한 방법 및 장치

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
KR101089810B1 (ko) * 2003-01-27 2011-12-12 어드밴스드 마이크로 디바이시즈, 인코포레이티드 캐시로 쓰기 데이터를 삽입하기 위한 방법 및 장치

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JP4712974B2 (ja) 2011-06-29
KR20010082373A (ko) 2001-08-29
US20040024836A1 (en) 2004-02-05
WO2000038069A1 (en) 2000-06-29
DE69904758D1 (de) 2003-02-06
US7296122B2 (en) 2007-11-13
EP1141839A1 (en) 2001-10-10
BR9907499A (pt) 2000-10-03
DE69904758T2 (de) 2003-10-16
EP1141839B1 (en) 2003-01-02
JP2002533812A (ja) 2002-10-08
US6631401B1 (en) 2003-10-07

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