KR100604774B1 - Organic light emitting display - Google Patents

Abstract

The present invention provides an organic light emitting display including a thin film transistor structure that supplies a different amount of current according to the light emitting capability of the organic light emitting element in the pixel displaying different colors, and can easily adjust the white balance of the organic light emitting element having different light emitting capability. Relates to a device. The organic light emitting diode display according to the present invention includes a plurality of data lines for transmitting a data signal, a plurality of scanning lines for transmitting a selection signal, and first, second and third light emitting elements for displaying different colors. And a pixel including first, second, and third thin film transistors respectively supplying a current corresponding to the data signal, wherein at least one channel region of each of the first to third thin film transistors has a width at both ends thereof. It is characterized in that the wide and narrow width of the center portion.

OLED, Display, White Balance, TFT, Channel

Description

Organic light emitting display             

1 is an enlarged view of a conventional organic light emitting diode display and a driving thin film transistor employed in a pixel circuit thereof.

2 is a block diagram illustrating an organic light emitting display device according to a first embodiment of the present invention.

3 is a diagram illustrating a layout that may be employed in an image display unit of an organic light emitting diode display according to a first exemplary embodiment of the present invention.

4 is a cross-sectional view taken along line IV-IV of the organic light emitting diode display of FIG. 3.

5A through 5C are plan views illustrating a driving thin film transistor of an organic light emitting diode display according to a first exemplary embodiment of the present invention.

6A and 6B are plan views illustrating modifications of a driving thin film transistor of an organic light emitting diode display according to a first exemplary embodiment of the present invention.

<Description of the symbols in the main part of the drawing>

200: organic light emitting display 210: scan driver

212: scan line 220: data driver

222: data line 230: image display unit

232: pixel 242: power supply line

The present invention relates to an organic light emitting diode display, and more particularly, to organic light emitting diodes having different light emitting capacities by supplying different currents to respective organic light emitting diodes according to light emitting capacities of organic light emitting diodes in pixels displaying different colors. The present invention relates to an organic light emitting display device having a thin film transistor structure capable of easily adjusting white balance of devices.

In general, an active matrix organic light emitting display device includes at least two thin film transistors (hereinafter, referred to as TFTs) for each pixel. These thin film transistors are used as a switching element for controlling the operation of each pixel and as a driving element for driving the organic light emitting element.

In general, a thin film transistor is a staggered type in which a gate electrode, a source, and a drain electrode are formed on both sides of a semiconductor layer with a semiconductor layer interposed therebetween according to a manufacturing order of a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode, and a gate electrode. ), The gate electrode, the source and the drain electrode are classified into a coplanar type or the like formed on one surface of the semiconductor layer. In addition, the thin film transistor may be classified into an upper gate structure or a lower gate structure according to the position of the gate electrode with respect to the source and drain electrodes on the substrate.

For example, a thin film transistor having a coplanar type or an upper gate structure includes a semiconductor layer having a drain region and a source region doped with impurities of a predetermined concentration on a substrate, and a channel region formed between the regions; The gate insulating film is formed, the gate electrode formed on the gate insulating film over the channel region, and the drain electrode and the source electrode connected to the drain region and the source region through contact holes with the interlayer insulating film interposed therebetween on the gate electrode.

On the other hand, the red, green, and blue organic light emitting diodes constituting the active matrix organic light emitting display device have different light emission capacities, that is, light efficiency with respect to current. Therefore, in the prior art, different voltages or currents are supplied to the respective organic light emitting device circuits to grasp the overall color coordinate and to increase color purity and color efficiency.

To this end, the prior art uses a driving circuit for supplying voltages of different magnitudes for each of the organic light emitting diodes displaying red, green, and blue. For example, in the prior art, methods using a driving circuit that applies different gamma voltages to organic light emitting elements having different light emitting capacities have been adopted.

However, in the conventional method of independently applying a gamma voltage, it is difficult to implement a driving range that expresses color coordinates of an organic light emitting display device well. Therefore, in the case of using the conventional method, the limitation of difficulty in adjusting the driving range is directly affected by the modules and circuits of the organic light emitting diode display, resulting in deterioration of product quality and image quality.

On the other hand, the prior art proposes a method of improving the image quality by differently forming the size of the driving thin film transistor according to the light emitting capability of the organic light emitting device. One example is the " color display device " disclosed in Korean Patent Publication No. 388174 (2003.6.19). This prior art will be described with reference to FIG.

1 is an enlarged view of a conventional color display device and a driving thin film transistor employed in a pixel circuit thereof.

As shown in FIG. 1, the conventional active matrix color display device 100 includes a plurality of scan lines 102 extending in a first direction and a plurality of data lines extending in a second direction crossing the first direction. 104, and a plurality of pixels 110 connected to the scan line 102 and the data line 104. The pixel 110 includes subpixels 110R, 110G, and 110B that respectively display red (R), green (G), and blue (B). The subpixels 110R, 110G, and 110B include organic light emitting diodes (hereinafter referred to as 'OLED'), driving thin film transistors M1; M2; M3, and switching thin film transistors M4; M5; M6. ), And a storage capacitor Cs1; Cs2; Cs3, respectively. In FIG. 1, the driving thin film transistors M1, M2, and M3 are formed of a thin film transistor having a dual gate structure.

In the above-described conventional color display device 100, the size of the driving thin film transistors M1, M2, and M3 is formed differently according to the light emitting capability of the red, green, and blue OLEDs in each of the subpixels 110R, 110G, and 110B. To adjust the white balance. In other words, in the conventional color display apparatus 100, when the light emitting ability of an OLED displaying one color is lower than that of the OLED displaying another color, for example, the color display device 100 is connected to the driving thin film transistor M3. When the OLED has the lowest luminous ability, its channel lengths L5 and L6 are shorter than the respective channel lengths L1 and L2 of the other driving thin film transistors M1 and M2, and the driving thin film transistors ( Increase the amount of current flowing through M3). By such a configuration, the conventional color display device 100 adjusts the white balance of a plurality of OLEDs having different light emission capacities within the pixel.

However, in the above-described conventional color display device, since the size of each driving thin film transistor of the subpixels displaying red, green, and blue is formed differently according to the light emitting capability of the red, green, and blue OLEDs, In addition to the relatively complicated manufacturing process, there is a problem in that the aperture ratio is relatively reduced in the sub-pixel having a larger size of the driving thin film transistor. In addition, in the above-described conventional color display device, when the back light emitting structure has a channel width of the driving thin film transistor mounted on the subpixel having the OLED having low light emitting ability, the light emitting capability can be made relatively large. There is a disadvantage that the luminance of the subpixel to be increased may be reduced, or the luminance of the corresponding subpixel may be reduced.

Accordingly, the present invention is derived to solve the above-mentioned problems, to improve the driving environment of the display device and to improve the image quality, and to provide an organic light emitting display device. According to the present invention, there is provided an organic light emitting diode display including a thin film transistor structure having a different current amount and substantially the same channel size or channel length.

In order to achieve the above object, according to an aspect of the present invention, a plurality of data lines for transmitting a data signal, a plurality of scan lines for transmitting a selection signal, and first, second and third for displaying different colors A light emitting device, comprising: a pixel including first, second, and third thin film transistors respectively supplying a current corresponding to the data signal according to the selection signal, wherein at least one of the first to third thin film transistors is provided. An organic light emitting display device having a width of a channel region formed in multiple stages is provided.

In a preferred embodiment, the width of the channel region is formed in multiple stages having different width lengths according to the difference in the light emitting capability of the first to third light emitting devices.

In addition, the width of the channel region is wide at both ends, and the width at the center is narrow.

In addition, the widths of the first to third channel regions of the first to third thin film transistors are substantially the same.

Further, among the first to third thin film transistors, the thin film transistor having the shortest width in the channel region is connected to the light emitting element having the highest light emitting ability among the first to third light emitting elements.

In addition, the light emitting element having the highest light emitting ability is a light emitting element displaying red color.

According to another aspect of the present invention, a plurality of data lines for transmitting a data signal, a plurality of scanning lines for transmitting a selection signal, and data according to a selection signal to the first, second, and third light emitting elements displaying different colors. An organic light emitting diode comprising a pixel including first, second, and third thin film transistors respectively supplying a current corresponding to a signal, wherein at least one channel region of the first to third thin film transistors is formed in a rectangular ring shape A display device is provided.

In a preferred embodiment, the thin film transistor having the longest length in the width direction of the inner region of the square ring among the first to third thin film transistors is connected to the light emitting element having the highest light emitting ability among the first to third light emitting elements.

In addition, the channel regions of the first to third thin film transistors have substantially the same length and the same width.

In addition, the organic light emitting diode display according to the present invention may further include a switching element for transmitting the data signal to the pixel in response to the selection signal.

In addition, the organic light emitting diode display according to the present invention further includes a capacitor that stores a voltage corresponding to the data signal transmitted through the switching element.

In addition, the first to third thin film transistors supply a current corresponding to the voltage stored in the capacitor to the light emitting device.

In addition, the thin film transistor includes at least one of a coplanar structure, a staggered structure, an upper gate structure, and a lower gate structure.

According to still another aspect of the present invention, a semiconductor layer is formed on an insulating substrate and includes a channel having a wide width at both ends and a narrow width at the center portion, and a source and a drain connected to both ends of the channel, respectively. A transistor having an insulating layer formed in contact with a gate and a gate facing the channel with the insulating layer interposed therebetween is provided.

According to still another aspect of the present invention, a semiconductor layer is formed on an insulating substrate, the semiconductor layer including a rectangular ring-shaped channel and a source and a drain connected to both ends of the channel, an insulating layer formed in contact with the channel, and A transistor having a gate facing a channel with an insulating layer therebetween is provided.

Hereinafter, with reference to the accompanying drawings, the present invention will be described in detail.

2 is a block diagram illustrating an organic light emitting display device according to a first embodiment of the present invention. 3 is a diagram illustrating a layout that may be employed in an image display unit of an organic light emitting diode display according to a first exemplary embodiment of the present invention. 4 is a cross-sectional view taken along line IV-IV of the organic light emitting diode display of FIG. 3.

Referring to FIG. 2, the organic light emitting diode display 200 includes a scan driver 210 which transmits a selection signal to the image display unit 230 through a plurality of scan lines S1, S2, and Sn 212, and a plurality of data. An image display unit having a data driver 220 for transmitting a data signal to the image display unit 230 through lines D1, D2, D3, and Dm 222, and a plurality of subpixels 232 for displaying an image ( 230). The subpixel 232 forms one pixel with a plurality of subpixels displaying red, green, and blue. The subpixel 232 may include a scan line 212 to which a selection signal such as a scan signal is applied, a data line 222 to which a data signal is applied, a first power voltage line 242 to supply a first power voltage VDD, And it is connected to the second power supply voltage line 244 for supplying a second power supply voltage (VSS). In addition, the subpixel 232 displays a color such as white, red, green, or blue according to the selection signal and the data signal.

In addition, the subpixel 232 includes at least two thin film transistors and at least one capacitor. Two thin film transistors include one switching transistor and a driving transistor. For example, the subpixel 232 can be designed like the layout shown in FIG. FIG. 3 is a layout diagram of pixels in a P area of the color display device of FIG. 2. 3 shows two pixels each including three subpixels. Hereinafter, one pixel will be described.

Referring to FIG. 3, the pixel 230 includes three parts each including two thin film transistors M1, M4; M2, M5; M3, and M6 and one storage capacitor Cs1; Cs2; Cs3. It consists of the pixels 232R, 232G, and 232B. Here, some of the thin film transistors M1, M2, and M3 are driving thin film transistors, and the remaining thin film transistors M4, M5, and M6 are switching thin film transistors. In the pixel 230, the switch thin film transistors M4, M5, and M6 sample data, the data is programmed in the storage capacitors Cs1, Cs2, and Cs3, and the driving thin film transistors M1, M2, and M3 are Operates as a current source. By this operation, the organic light emitting element emits light at a predetermined luminance. The data represents, for example, a predetermined level of gradation voltage or current for representing gray step by step.

Of course, each subpixel in the pixel 230 may be configured to additionally include one or more driving thin film transistors or one or more switching thin film transistors. The subpixel may further include one or more threshold voltage compensation capacitors or other storage capacitors for compensating the threshold voltage of the driving thin film transistor. In addition, the subpixel may include a plurality of OLEDs displaying different colors. Furthermore, the subpixel may be designed not only with the pixel circuit of the voltage programming structure described above, but also with the pixel circuit of another voltage programming structure or the pixel circuit of the current programming structure.

Each of the driving thin film transistors M1, M2, and M3 in the pixel 230 has a cross-sectional structure as shown in FIG. 4. In FIG. 4, the cross-sectional structure of the subpixel 232R including the upper gate type or coplanar type driving thin film transistor M1 is described, but the cross-sectional structure includes a portion including other driving thin film transistors M2 and M3. It can be applied substantially the same to the cross-sectional structure of the pixels 232G and 232B.

Referring to FIG. 4, the cross-sectional structure of the subpixel 232R first includes a buffer layer 401 formed of a nitride film or an oxide film on an insulating substrate 400 such as glass. The buffer layer 401 is formed to prevent impurities such as metal ions from diffusing into an active channel in the semiconductor layer. The buffer layer 401 may be formed by chemical vapor deposition (CVD), sputtering, or the like.

Next, an amorphous silicon layer is formed on the substrate 400 on which the buffer layer 401 is formed through CVD, sputtering, and the like, and is heated at a temperature of about 430 ° C. to contain hydrogen contained in the amorphous silicon layer. After performing a dehydrogenation process to remove the component, the dehydrogenated amorphous polysilicon layer is crystallized by a predetermined method to form the semiconductor layer 402. At this time, the lower electrode 402c of the storage capacitor Cs is also formed.

Meanwhile, the semiconductor layer 402 may be formed by depositing amorphous silicon and then depositing and patterning polycrystalline polysilicon directly on the buffer layer 401 in addition to the method of crystallizing polycrystalline polysilicon.

Crystallization after deposition of amorphous silicon includes solid phase crystallization (SPC), excimer laser crystallization (ELC / excimer laser anneal (ELA)), and sequential lateral solidification (SLS). Methods, metal induced crystallization (MIC), metal induced lateral crystallization (MILC), and the like.

In this case, in order to make the driving thin film transistor M1 have a transition characteristic different from that of the other driving thin film transistors M2 and M3, the light emitting capability of the OLED in the subpixel in which the driving thin film transistor M1 is formed and The semiconductor layer 402 is patterned in a predetermined shape in consideration of the light emitting capability of other OLEDs in other subpixels in which the other driving thin film transistors M2 and M3 are formed. In this case, the light emission capability indicates a luminance difference according to a current supplied from the organic light emitting element. In other words, a light emitting device having excellent luminous ability exhibits higher luminance than other light emitting devices when the same current is supplied. The shape of such a semiconductor layer 402 will be described later.

Subsequently, a gate insulating film 403 is formed on the entire surface of the substrate 400 on which the semiconductor layer 402 is formed. Then, a gate electrode material such as aluminum is deposited on the gate insulating film 403 and then patterned to form the gate electrode 407a. do. At this time, the upper electrode 407b of the storage capacitor Cs is also formed with the formation of the gate electrode 407a. Thereafter, the P + type impurities are ion implanted using the gate electrode 407a as a mask to form the source region 402b and the drain region 402a. Here, the region of the semiconductor layer 402 positioned below the gate electrode 407a becomes a channel region, and the regions doped with impurities by ion implantation on both sides of the channel region are the drain region 402a and the source region 402b. )

Next, an interlayer insulating film 404 is formed on the structure, and first and second contact holes 413 and 412 are formed in the interlayer insulating film 404 to expose the source region 402b and the drain region 402a, respectively. do. In this case, the third contact hole 414 exposing the upper electrode 407b is also formed. Thereafter, the metal layer 405 is entirely deposited and patterned to form a source electrode and a drain electrode. The drain electrode and the source electrode are connected to the drain region 402a and the source region 402b through the first contact hole 412 and the second contact hole 413, respectively. The upper electrode 407b of the storage capacitor Cs is connected to the metal layer 405 through the third contact hole 414.

Next, a passivation layer 406 is formed on the metal layer 405. The passivation layer 406 includes a fourth contact hole 415 exposing the drain electrode. Thereafter, the anode electrode 408 is deposited and patterned on a portion of the upper portion of the passivation layer 406. The anode electrode 408 is electrically connected to the drain electrode through the fourth contact hole 415.

Next, a planarization film 409 made of an insulator is formed and patterned on top of the structure. An opening for exposing the anode electrode 408 is formed in the planarization film 409. Thereafter, the organic light emitting material 410 is applied to the opening. The cathode electrode 411 is formed on the structure including the organic light emitting material 410.

By the above-described configuration, the source electrode connected to the source region 402b of the semiconductor layer 402, the drain electrode connected to the drain region 402a, and the gate electrode 407a formed on the semiconductor layer 402 are formed. The provided driving thin film transistor M1 is formed. The storage capacitor Cs is formed by the lower electrode 402c and the upper electrode 407b positioned above the lower electrode 402c. In addition, an organic light emitting device (OLED) is formed by the anode electrode 408, the organic light emitting material 410, and the cathode electrode 411.

Meanwhile, in the present embodiment, a method of manufacturing a pixel including a thin film transistor having a PMOS structure is mentioned. However, the present invention is not limited to such a configuration, and can be easily applied to a method for manufacturing a pixel including another thin film transistor structure such as an NMOS structure or a CMOS structure.

Next, a driving thin film transistor of an organic light emitting diode display according to a first exemplary embodiment of the present invention will be described with reference to FIGS. 5A, 5B, and 5C. 5A through 5C are plan views illustrating driving thin film transistors of the organic light emitting diode display according to the first exemplary embodiment. In FIGS. 5A to 5C, it is assumed that the driving thin film transistors M1, M2, and M3 are respectively formed in sub-pixels each having OLEDs having different light emitting capabilities. In addition, in the present embodiment, it is assumed that the change of the grain boundary formed in the active channel of the driving thin film transistor, the crystallinity of the polycrystalline line, and the like do not significantly differ from each other. Hereinafter, the driving thin film transistors M1, M2, and M3 are referred to as first, second, and third thin film transistors M1, M2, and M3, respectively.

5A to 5C, the first to third thin film transistors M1, M2, and M3 are formed to have the same size. In other words, the first to third thin film transistors M1, M2, and M3 have the same channel length La = Lb = Lc and the same channel width Wa = Wb = Wc. Here, Wa represents an average value for the sum of Wa1 and Wa2, and Wb represents an average value for the sum of Wb1 and Wb2. Channel lengths La, Lb, and Lc indicate effective channel lengths.

In detail, the first thin film transistor M1 includes the semiconductor layer 500, the gate electrode 508, the drain electrode 510, and the source electrode 512. The semiconductor layer 500 includes a channel region 502 formed under the gate electrode 508, a drain region 504 formed on both sides of the channel region 502, and a source region 506. The drain electrode 510 is electrically connected to the drain region 504 through at least one first contact hole 514, and the source electrode 512 is connected to the source region through the at least one second contact hole 516. 506 is electrically connected.

The width Wa of the channel region 502 of the first thin film transistor M1 is formed in multiple stages having different widths Wa1 and Wa2. More preferably, the width of both ends of the channel region 502 is wide, and the width of the center portion is narrow. Here, the width Wa is an average value of the sum of the long width Wa1 and the short width Wa2, and is substantially the same as the width Wc of the channel region 542 of the third thin film transistor M3 of FIG. 5C. Has a size.

Next, the second thin film transistor M2 includes a semiconductor layer 520, a gate electrode 528, a drain electrode 530, and a source electrode 532. The semiconductor layer 520 includes a channel region 522 formed under the gate electrode 528, a drain region 524 formed on both sides of the channel region 522, and a source region 526. The drain electrode 530 is electrically connected to the drain region 524 through at least one first contact hole 534, and the source electrode 532 is connected to the source region through at least one second contact hole 536. 526 is electrically connected.

The width Wb of the channel region 522 of the second thin film transistor M2 is formed in multiple stages having different widths Wb1 and Wb2. In this case, the width Wb of the channel region 522 represents an average value of the sum of the long width Wb1 and the short width Wb2, and the width Wc of the channel region 542 of the third thin film transistor M3 and the width Wb. Have substantially the same size. When the length of the long width Wb1 of the channel region 522 is longer than the length of the long width Wa1 of the channel region 502 of the first thin film transistor M1, the width of the short width Wb2 of the channel region 522 is determined. The length is shorter than the length of the short width Wa2 of the channel region 502 of the first thin film transistor M1. This is to form substantially the same width of the channel region of each thin film transistor.

Next, the third thin film transistor M3 includes the semiconductor layer 540, the gate electrode 548, the drain electrode 550, and the source electrode 552. The semiconductor layer 540 includes a channel region 542 formed under the gate electrode 548, a drain region 544 formed on both sides of the channel region 542, and a source region 546. The drain electrode 550 is electrically connected to the drain region 544 through the at least one first contact hole 554, and the source electrode 552 is connected to the source region through the at least one second contact hole 556. 546) electrically.

The channel region 542 of the third thin film transistor M3 is formed in a general straight line shape. However, in the present exemplary embodiment, the width Wc of the channel region 542 of the third thin film transistor M3 is used to improve the white balance and the image quality of the plurality of OLEDs of the subpixels having different light emitting ability or light efficiency. The width of the channel region becomes a reference width of the first and second thin film transistors M2 and M3 formed in multiple stages.

6A and 6B are plan views illustrating modified examples of a thin film transistor for driving an organic light emitting diode display according to a first exemplary embodiment of the present invention.

6A and 6B, the driving thin film transistors M1 ′ and M2 ′ include channel regions 602 and 622 formed in a rectangular ring shape, respectively. In addition, the lengths La and Lb of the channel regions and the widths Wa, Wb and Wc of the channel regions of the driving thin film transistors M1 'and M2' are substantially the same. Here, Wa represents an average value of the sum of the short width Wa1 of the rectangular ring-shaped channel region plus the short widths of the first and second thicknesses Wa2 and Wa3, and Wb represents the long width ( Wb1) and the average value of the sum of the width | variety which added the 1st and 2nd thickness Wb2, Wb3 are shown. And La and Lb represent effective channel lengths. In addition, the driving thin film transistors M1 'and M2' include a rectangular ring-shaped channel region having different thicknesses in the width direction according to the light efficiency of each OLED in the pixel.

In detail, referring to FIG. 6A, the thin film transistor M1 ′ includes a semiconductor layer 600, a gate electrode 608, a drain electrode 610, and a source electrode 612. The semiconductor layer 600 includes a channel region 602 formed under the gate electrode 608, a drain region 604 formed on both sides of the channel region 602, and a source region 606. The drain electrode 610 is electrically connected to the drain region 604 through at least one first contact hole 614, and the source electrode 612 is connected to the source region through at least one second contact hole 616. 606 is electrically connected.

The channel region 602 of the thin film transistor M1 ′ is formed of the remaining regions except for the non-channel region 616. The non-channel region 616 is patterned when forming the semiconductor layer. The non-channel region 616 is filled with an insulating layer formed on the semiconductor layer.

The channel region 602 of the thin film transistor M1 ′ has a rectangular ring shape and has a first width in the width direction at a portion where the long width Wa1 and the non-channel region 616 are not formed, and the first and second width regions are formed in a rectangular ring shape. It has the width | variety which added 2nd thickness Wa2 and Wa3.

Next, referring to FIG. 6B, the thin film transistor M2 ′ includes a semiconductor layer 620, a gate electrode 628, a source electrode 630, and a drain electrode 632. The semiconductor layer 620 includes a channel region 622 formed under the gate electrode 628, a drain region 624, and a source region 626 formed at both sides of the channel region 622. The drain electrode 630 is electrically connected to the drain region 624 through at least one first contact hole 634, and the source electrode 632 is connected to the source region through at least one second contact hole 636. And electrically connected to 626.

The channel region 622 of the thin film transistor M2 ′ is formed of the remaining regions except for the non-channel region 636. The non-channel region 636 is patterned when forming the semiconductor layer. This non-channel region 636 is filled with insulation.

The channel region 622 of the thin film transistor M2 ′ has a rectangular ring shape, and includes first and second widths Wb1 and non-channel regions 636 in the width direction at the portion where the non-channel region 636 is not formed. It has the width | variety which added 2nd thickness Wb2 and Wb3. Here, the long width Wb1 of the channel region 622 of the thin film transistor M2 'is formed to be smaller than the long width Wa1 of the channel region 602 of the thin film transistor M1', and the thin film transistor M2 'is formed. The short width Wb2 + Wb3 of the channel region 622 is formed to be larger than the short width Wa2 + Wa3 of the channel region 602 of the thin film transistor M1 ′. With this configuration, the two thin film transistors M1 'and M2' can be formed to have substantially the same average width as the channel length La = Lb. As such, the channel regions 602 and 622 of the above-described two thin film transistors M1 'and M2' are formed to have a short width of an appropriate size according to the light emitting capability of the OLED in the pixel on which the thin film transistors M1 'and M2' are mounted. do.

Meanwhile, in the above-described embodiment, the non-channel region is formed in one square shape, but in the present invention, the non-channel region may be formed in the shape of at least one circle or polygon. In the above-described embodiment, the thin film transistor having the coplanar structure or the upper gate structure has been described, but the present invention can be easily applied to the thin film transistor of other structure.

As described above, the present invention is made such that the structure of the driving thin film transistor has a shape of a channel region adjusted according to the light emitting capability of each OLED. This configuration can be confirmed from the transfer characteristics of the current flowing through the thin film transistor when the gate voltage of the thin film transistor is greater than the threshold voltage, a channel is formed between the source region and the drain region to induce a mobile carrier. . Transition characteristics of the thin film transistor may be simply expressed by Equation 1 below.

Where Id is the drain current, W is the width of the channel, L is the length of the channel, Vg is the gate voltage, Vth is the threshold voltage, and k is the constant for the capacitance and field effect mobility for the gate insulating film in the channel. .

As in Equation 1 above, it can be seen that the drain current of the thin film transistor is changed according to the length and width of the channel region. Accordingly, in the present invention, the length and width of the entire channel region of the thin film transistor are substantially the same, and the shape of the channel region is adjusted according to the light emitting capability of the OLED to adjust the white balance and improve the image quality of the OLED display. .

In the above-described embodiment, the channel regions of the driving thin film transistors in the image display unit of the active matrix organic light emitting display are substantially the same, and the channel regions of the at least one thin film transistor are multistage and have a rectangular ring shape. It is formed to adjust the non-uniform white balance according to the light emitting ability of the OLED. In view of the above, the present invention provides a width of a channel region of a driving thin film transistor in a pixel of an organic light emitting diode display in a symmetrical multistage shape in the width direction and asymmetrical multistage with a channel region in which one surface is formed in multistage. The channel shape may be formed.

As mentioned above, although preferred embodiment of this invention was described in detail, this invention is not limited to the said embodiment, A various deformation | transformation by a person of ordinary skill in the art within the scope of the technical idea of this invention is carried out. This is possible.

As described above, according to the present invention, a driving thin film transistor having substantially the same size and length and width of the channel region while supplying different amounts of current according to the light emitting capability of the organic light emitting diodes displaying red, green, and blue, respectively, is provided. By using the organic light emitting diode display, the white balance can be easily adjusted by compensating for the luminance difference caused by the difference in the light emission capability of the organic light emitting diodes without reducing the aperture ratio of the specific subpixel of the organic light emitting diode display.

In addition, according to the present invention, it is not necessary to adjust and supply the voltage magnitude or the amount of current of the driving power supply according to the light emitting ability of the organic light emitting elements displaying red, green, and blue colors, respectively, and thus, the circuit or wiring for controlling the driving power supply. Etc. may be omitted, and the driving circuit may be simplified. In addition, in mass production, disconnection or short circuit of the driving circuit can be prevented to increase the production yield and improve the stability and reliability of the product.

Claims (15)

A plurality of data lines for transmitting data signals; A plurality of scan lines for transmitting a selection signal; Pixels including first, second, and third thin film transistors respectively supplying currents corresponding to the data signals to the first, second, and third light emitting devices displaying different colors, according to the selection signal. Include, The width of at least one channel region of the first to third thin film transistors is formed in multiple stages. The method of claim 1, The width of the channel region is formed in multiple stages having different width lengths according to the difference in the light emitting capability of the first to third light emitting devices. The method of claim 1, The width of the channel region is smaller than the width of both ends of the channel area is formed in the organic light emitting display device. The method of claim 3, An organic light emitting display device in which the widths of the first to third channel regions of the first to third thin film transistors satisfy Equation 2 below:

(Wa, Wb, and Wc are the widths of the first to third channel regions, Wa1 and Wa2 are the long and short widths of the first channel region, and Wb1 and Wb2 are the long and short widths of the second channel region.) ). The method of claim 3, The thin film transistor having the shortest width of the channel region among the first to third thin film transistors is connected to the light emitting device having the highest light emitting ability among the first to third light emitting devices. The method of claim 5, The light emitting device having the highest light emitting ability is a light emitting device that displays red color. A plurality of data lines for transmitting data signals; A plurality of scan lines for transmitting a selection signal; And Pixels including first, second, and third thin film transistors respectively supplying currents corresponding to the data signals to the first, second, and third light emitting devices displaying different colors, according to the selection signal. Include, At least one channel region of the first to third thin film transistors is formed in a rectangular ring shape. The method of claim 7, wherein The thin film transistor having the longest length in the width direction of the inner region of the rectangular ring among the first to third thin film transistors is connected to the light emitting device having the highest light emitting ability among the first to third light emitting devices. The method of claim 8, And a channel region of the first to third thin film transistors having substantially the same length and the same width. The method according to any one of claims 1 to 9, And a switching element configured to transfer the data signal to the pixel in response to the selection signal. The method of claim 10, And a capacitor storing a voltage corresponding to the transferred data signal. The method of claim 11, The first to third thin film transistors supply a current corresponding to the voltage stored in the capacitor to the light emitting device. The method according to claim 1 or 7, The thin film transistor includes at least one of a coplanar structure, a staggered structure, an upper gate structure, and a lower gate structure. A semiconductor layer formed on the insulating substrate, the semiconductor layer including a channel having a narrower width in the middle than a width of both ends and a source and a drain respectively connected to both ends of the channel; An insulation layer formed in contact with the channel; And And a gate facing the channel with the insulating layer interposed therebetween. A semiconductor layer formed on the insulating substrate, the semiconductor layer including a channel having a rectangular ring shape and a source and a drain respectively connected to both ends of the channel; An insulation layer formed in contact with the channel; And And a gate facing the channel with the insulating layer interposed therebetween.

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