KR100599974B1 - Voltage reference generator - Google Patents

Abstract

The reference voltage generator of the semiconductor memory device according to the present invention may generate a reference voltage by averaging at least two bandgap reference voltage generating means having different temperature coefficients and reference voltages output from the plurality of bandgap reference voltage generating means. Including a means for outputting, it is possible to generate a reference voltage with improved temperature characteristics without being affected by the bipolar transistor.

Description

Voltage reference generator

1 is a circuit diagram showing a detailed circuit of a typical bandgap reference voltage generator.

FIG. 2 is a graph showing a relationship of temperature of a reference voltage output from the reference voltage generator shown in FIG. 1.

3 is a block diagram illustrating a concept of a reference voltage generator of a semiconductor memory device according to the present invention.

4 is a graph showing a relationship of temperature of a reference voltage showing an operation of the reference voltage generator shown in FIG. 3;

FIG. 5 is a circuit diagram illustrating a detailed circuit of an embodiment of the reference voltage generator shown in FIG. 3.

6 is a circuit diagram illustrating a detailed circuit of another embodiment of the reference voltage generator shown in FIG.

The present invention relates to a reference voltage generator circuit of a semiconductor memory device. More particularly, the output voltages of two reference voltage generator circuits are averaged using an average circuit to obtain a reference voltage having an improved temperature characteristic without being influenced by a bipolar transistor. A reference voltage generator circuit for generating a semiconductor memory device.

In general, a voltage reference generator is a circuit that supplies a constant voltage stably against temperature or external voltage fluctuations, and should have a temperature coefficient below a constant value.

The band-gap reference voltage generator designs a first circuit with a constant temperature coefficient and a second circuit with a temperature coefficient opposite to that of the first circuit, so that the output of the second circuit is independent of temperature. It is a reference voltage generator that can minimize temperature coefficients by multiplying the scaling factor and generating the reference voltage by adding the outputs of the two circuits.

1 is a circuit diagram illustrating a detailed circuit of a typical bandgap reference voltage generator.

The reference voltage generator includes a reference voltage generator including a PMOS transistor PM1 connected in series between a power supply voltage and a ground voltage, resistors R and R1, and a pnp bipolar transistor Q1 having a common connection between a base and a collector. (1) and generation of a reference voltage including a PMOS transistor PM2, resistors R, R2, and a pnp bipolar transistor Q2 in which a base and a collector are connected in common between a power supply voltage and a ground voltage. The unit 2 receives the reference voltage VREF output from the reference voltage generator 1 through the inverting input terminal, and receives the reference voltage A output from the reference voltage generator 2 through the non-inverting input terminal. A differential amplifier 3.

Here, the signal output from the differential amplifier 3 is commonly applied to the gates of the PMOS transistors PM1 and PM2 constituting the respective reference voltage generators 1 and 2.

The emitter size of the bipolar transistor Q2 constituting the reference voltage generator 2 is n times the emitter size of the bipolar transistor Q1 constituting the reference voltage generator 1.

Therefore, the output reference voltage VRER of the reference voltage generator may be defined as shown in [Equation 1].

[Equation 1]

Here, the current I can be obtained as shown in [Equation 2].

[Equation 2]

Therefore, the reference voltage VREF can be defined as shown in [Equation 3].

FIG. 2 is a graph illustrating a relationship of temperature of a reference voltage output from the reference voltage generator shown in FIG. 1.

As shown in the drawing, there is a problem in that a process or trimming is required several times in a component or an IC requiring a very good temperature characteristic because the reference voltage varies with temperature.

Parasitic bipolars are implemented in a standard CMOS process. When bipolars are implemented as parasitic bipolars, the bipolar characteristics are difficult to equalize because modeling is difficult and process control is difficult. Therefore, the reference voltage VREF has a DC offset, and it is very difficult to overcome this DC offset by a circuit or a process.

An object of the present invention for solving the above problems is to implement two bandgap reference voltage generators having different temperature characteristics and average their values to reduce the influence on the temperature characteristics.

The reference voltage generator of the semiconductor memory device of the present invention for achieving the above object comprises at least two bandgap reference voltage generating means having different temperature coefficients; And average means for outputting a reference voltage by averaging the reference voltages output from the plurality of bandgap reference voltage generating means, wherein one terminal is applied with reference voltages output from the respective reference voltage generating means. And the other terminal comprises a plurality of resistors connected in common.

The above and other objects and features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram illustrating a concept of a reference voltage generator of a semiconductor memory device according to the present invention.

The reference voltage generator averages the reference voltages VREF1 and VREF2 output from the two bandgap reference voltage generators 10 and 20 and the two bandgap reference voltage generators 10 and 20 having different temperature coefficients. An average unit 30 for outputting the VREF is included.

FIG. 4 is a graph showing the relationship of the temperature of the reference voltage showing the operation of the reference voltage generator shown in FIG.

If the temperature characteristics of the two bandgap reference voltage generators 10 and 20 are configured to be opposite to each other, the reference voltage VREF generated by the average circuit 30 cancels the temperature characteristics from each other so that the temperature coefficient is theoretically zero. will be. In other words, the reference voltage VREF becomes constant with respect to temperature.

FIG. 5 is a circuit diagram illustrating a detailed circuit of an embodiment of the reference voltage generator illustrated in FIG. 3.

The reference voltage generator generates two bandgap reference voltage generators 10 and 20 having opposite temperature characteristics, and an average value VREF of the reference voltages VREF1 and VREF2 output from the two bandgap reference voltage generators 10 and 20. And an average unit 30 for outputting.

Although the two bandgap reference voltage generators 10 and 20 are identically configured with the same device, they are designed to have opposite temperature coefficients by adjusting the emitter size of the bipolar transistors Q1 and Q2 and the sizes of the resistors R1 and R2.

That is, the bandgap reference voltage generator 10 is a pnp bipolar transistor in which a PMOS transistor PM1, a resistor R, a resistor R1, a base and a collector are connected in common between a power supply voltage and a ground voltage. A pnp bipolar transistor in which a reference voltage generator 11 including Q1 and a PMOS transistor PM2, a resistor R, a resistor R2, a base and a collector are connected in series between a power supply voltage and a ground voltage are commonly connected. The reference voltage generator 12 including Q2 and the reference voltage VREF output from the reference voltage generator 11 are applied to the inverting input terminal, and the reference voltage A output from the reference voltage generator 12 is It is applied to the non-inverting input terminal and includes a differential amplifier 13.

The bandgap reference voltage generator 20 has the same element as that of the bandgap reference voltage generator 10, and the reference voltage A output from the reference voltage generator 22 is applied to the inverting input terminal of the differential amplifier 23. The reference voltage VREF2 is applied to the non-inverting input terminal and output from the reference voltage generator 22 to configure a temperature coefficient opposite to that of the bandgap reference voltage generator 10.

The averaging section 30 is provided with a resistor RAVG1 for applying the reference voltage VREF1 output from the bandgap reference voltage generator 10 to one terminal and a reference voltage VREF2 for outputting the bandgap reference voltage generator 20 to one terminal. Resistor RAVG2 and capacitor CAVG connected to a common terminal of resistors RAVG1 and RAVG2.

Here, the signals output from the differential amplifiers 13 and 23 are commonly applied to the gates of the PMOS transistors PM1 and PM2 constituting the respective reference voltage generators 11, 12, 21 and 22.

The emitter size of the bipolar transistor Q2 constituting the reference voltage generators 12 and 22 is designed to be n times the emitter size of the bipolar transistor Q1 constituting the reference voltage generators 11 and 21.

The reference voltage generator according to the present invention uses two general bandgap reference voltage generators 10 and 20 to convert the reference voltages VREF1 and VREF2 output from each bandgap reference voltage generator 10 and 20 into a resistance average circuit 30. ) Can be summed and divided by 2 to obtain the desired reference voltage value VREF.

Here, the coefficients of the thermal voltage VT and the base-emitter voltage VBE of each of the two bandgap reference voltage generators 10 and 20 are different from each other so that the PMOS transistors PM1, PM2, Resistor R1, R2 and bipolar transistors Q1, Q2.

FIG. 6 is a circuit diagram illustrating a detailed circuit of another embodiment of the reference voltage generator shown in FIG. 3.

The reference voltage generator uses a current value of the bandgap reference voltage generator 10 and the bandgap reference voltage generator 10 in common, and adjusts a bipolar transistor and a resistance value to be different from the bandgap reference voltage generator 10. A reference voltage generator 20 designed to have a temperature characteristic, and an average unit 30 for outputting average values VREF of the reference voltages VREF1 and VREF3 output from the two bandgap reference voltage generators 10 and 20. do.

The bandgap reference voltage generator 10 is a pMOS bipolar transistor Q1 having a PMOS transistor PM1, a resistor R, a resistor R1, a base and a collector connected in common between a power supply voltage and a ground voltage. A pnp bipolar transistor in which a reference voltage generator 11 and a PMOS transistor PM2, a resistor R, a resistor R2, a base and a collector are connected in series between a power supply voltage and a ground voltage are included. The reference voltage generator 12 including Q2 and the reference voltage VREF output from the reference voltage generator 11 are applied to the inverting input terminal, and the reference voltage A output from the reference voltage generator 12 is non-inverted. It is applied to the input terminal and includes a differential amplifier (13).

The reference voltage generator 20 is connected in series between a power supply voltage and a ground voltage, and a PMOS transistor having a signal output from the differential amplifier 13 of the bandgap reference voltage generator 10 commonly applied to a gate; A resistor R, a resistor R3 having a regulated resistance value, and a pnp bipolar transistor Q3 having a base and a collector having a VBE regulated base-emitter voltage value connected in common.

Therefore, when the reference voltage VREF1 output from the bandgap reference voltage generator 10 and the reference voltage VREF2 output from the reference voltage generator 20 are divided by 2 in addition to each other by the resistance averaging circuit 30, a desired reference voltage value VREF is obtained. Become.

This configuration greatly simplifies the circuit and minimizes current consumption.

As described above, the reference voltage generator of the semiconductor memory device according to the present invention uses only two duplicated bandgap reference voltage generators and uses only the emitter size and resistance value of the bipolar transistor to determine the temperature characteristic of the reference voltage. Different treatments have the effect of improving the temperature characteristics.

In addition, since the two bandgap circuits are duplicated, the DC offset of each reference voltage will be similar, so averaging the values will make the DC offset very constant and its size very small.

In addition, since two replicated bandgap reference voltage generators use the same bipolar model and the size of the bipolar transistors is different, the average of the values is constant even if the characteristics of the parasitic bipolar transistors are unstable depending on the process. There is an effect that can generate a very stable reference voltage in the change of.

By overcoming the physical limitations of the temperature characteristic of the reference voltage that can be obtained with one bandgap reference voltage generator using several bandgap reference voltage generators, there is an effect that a reference voltage having a temperature characteristic with very high accuracy can be realized.

In addition, since the characteristics of the reference voltage are not affected by the process and the bipolar model, the yield can be improved.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (14)

At least two reference voltage generating means having different temperature coefficients; And An average means for outputting a final reference voltage by averaging voltages output from the plurality of reference voltage generating means, The average means is One terminal is applied with reference voltages output from the respective reference voltage generating means, and the other terminal includes a plurality of resistors connected in common. The method of claim 1, Each reference voltage generating means, A plurality of reference potential generating means for generating a reference potential by connecting a MOS transistor, at least two resistors and a diode-connected bipolar transistor in series; And And an OP amplifier which detects a difference between the reference potentials output from the respective reference potential generating means and controls each of the MOS transistors in common. The method of claim 2, And a temperature coefficient of the temperature voltage of the bipolar transistor of the respective reference potential generating means and a temperature coefficient of the base emitter voltage are different from each other. The method of claim 2, At least one reference potential generating means of the plurality of reference potential generating means adjusts an emitter size and a resistance value of the bipolar transistor to cancel a temperature coefficient of another reference potential generating means. The method of claim 1, And said averaging means generates a potential having an average value of input voltages using a resistance value. delete The method of claim 1, And said averaging means further comprises a capacitor connected to a common terminal of said plurality of resistors. First reference voltage generating means for generating a first reference voltage; Second reference voltage generating means for generating a second reference voltage by using a current value of the first reference voltage generating means in common and having a temperature characteristic different from that of the first reference voltage generating means; Averaging means for outputting an average value of the reference voltages output from said first reference voltage generating means and said second reference voltage generating means, The average means is One terminal is applied with the first reference voltage output from the first reference voltage generating means and the second reference voltage output from the second reference voltage generating means, respectively, and the other terminal is the first resistance means and the first connected common connection. A reference voltage generator comprising a resistance means. The method of claim 8, The first reference voltage generating means, A plurality of reference potential generating means configured by connecting a MOS transistor, at least two resistors and a diode-connected bipolar transistor in series; And And an OP amplifier which detects a difference between the reference potentials output from the respective reference potential generating means and controls each of the MOS transistors in common. The method of claim 9, The second reference voltage generating means A MOS transistor to which an output of the OP amplifier of the first reference voltage generating means is applied to a gate; At least two resistors; And A diode-connected bipolar transistor, And the MOS transistor, the resistors, and the bipolar transistor are connected in series. The method of claim 8, And said averaging means generates a potential having an average value of input voltages using a resistance value. delete The method of claim 8, And said averaging means further comprises a capacitor connected to a common terminal of said first resistance means and said second resistance means. The method of claim 10, And the second reference voltage generating means adjusts the emitter size and the resistance value of the bipolar transistor to cancel the temperature coefficient of the first reference voltage generating means.

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