KR100550994B1 - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel which prevents erroneous discharge between an address electrode and a discharge holding electrode and a discharge holding electrode of an adjacent discharge cell in a non-discharge area.

)는 1.18∼3.57 이다.A plasma display panel according to the present invention comprises: a first substrate and a second substrate disposed to face each other; Discharge sustaining electrodes extending on the first substrate; Address electrodes extending on the second substrate in a direction crossing the discharge sustain electrodes; A non-discharge region is formed in a space between the first substrate and the second substrate to form a plurality of discharge cells, with a space continuous in the direction intersecting the address electrode between the discharge cells adjacent in the extending direction of the address electrode; Partition walls disposed separately from each other; And a phosphor layer formed in each of the discharge cells, wherein the ratio of the distance L between the discharge sustaining electrode and the address electrode width Wa in the non-discharge area between the adjacent discharge cells (

) Is 1.18 to 3.57.

Plasma display, address electrode, non-discharge area, width

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

1 is a partially exploded perspective view schematically showing a plasma display panel according to the present invention.

2 is a partial plan view of FIG. 1.

FIG. 3 shows the occurrence of erroneous discharge in the non-discharge region according to the relationship between the distance L between the discharge sustain electrodes having different polarities of adjacent discharge cells and the width Wa of the address electrode in the non-discharge region of the plasma display panel according to the present invention. Table is shown.

4 is a driving waveform diagram of a plasma display panel according to the present invention.

5 is a wall charge distribution diagram based on the driving type of the plasma display panel according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP, hereinafter referred to as PDP) for improving brightness by placing a discharge sustaining electrode at the outermost side of a discharge space.

In general, PDP uses an image of red (R), green (G), and blue (B) visible light generated by vacuum ultraviolet (VUV) emitted from a plasma obtained through gas discharge to excite a phosphor. It is a display element to implement. The PDP can realize a 60-inch or larger screen with a thickness of only 10 cm or less, and since it is a self-luminous display device such as a CRT, it has no characteristic of distortion due to color reproduction and viewing angle, and also has a simple manufacturing method compared to LCD. It is gaining attention as a TV and industrial flat panel display that have strengths in terms of productivity and cost.

In a typical AC PDP, address electrodes are formed in one direction (Y-axis direction) on a rear substrate, and a dielectric layer is formed on the front surface of the rear substrate while covering the address electrodes. Stripe-shaped barrier ribs are formed on the dielectric layer between the address electrodes, and phosphor layers of red (R), green (G), and blue (B) colors are formed between the barrier ribs.

In addition, on one surface of the front substrate facing the rear substrate, the X and Y electrodes each include a pair of transparent electrodes arranged in a direction crossing the address electrodes and causing a surface discharge and a bus electrode applying a discharge voltage thereto. That is, discharge sustain electrodes are formed, and a dielectric layer and an MgO protective film are sequentially formed on the entire front substrate while covering the X and Y electrodes.

The point where the address electrodes on the rear substrate and the pair of X and Y electrodes on the front substrate cross each other constitutes a discharge cell.

In the PDP configured as described above, millions of unit discharge cells are arranged in a matrix form. In order to simultaneously drive the discharge cells of the AC PDP arranged in a matrix form, driving using the memory characteristic is performed.

In more detail, in order to generate a discharge between the X electrode and the Y electrode constituting a pair of discharge sustaining electrodes, a potential difference of more than a specific voltage is required, and the voltage at this boundary is called a discharge firing voltage (Vf). . At this time, when the address voltage is applied between the Y electrode and the address electrode, the discharge starts to form a plasma in the discharge cell, and the electrons and ions in the plasma move toward the electrode having the opposite polarity, so that a current flows.

On the other hand, a dielectric layer is applied to each electrode of the AC PDP so that most of the transferred space charges are stacked on the dielectric layer having the opposite polarity, so that the net space potential between the Y electrode and the address electrode is originally applied to the address voltage. It becomes smaller than Va, the discharge is weakened, and the address discharge is extinguished. At this time, a relatively small amount of electrons are accumulated on the X electrode side, and a relatively large amount of ions are accumulated on the Y electrode side. The charges accumulated on the dielectric layers covering the X electrode and the Y electrode are accumulated as wall charges (Qw). The space voltage formed between the X and Y electrodes by these wall charges is referred to as wall voltage (Vw).

Subsequently, when a constant voltage (Vs: discharge holding voltage) is applied between the X and Y electrodes, the sum of the magnitudes of the discharge holding voltage (Vs) and the wall voltage (Vw) (Vs + Vw) is the discharge starting voltage ( If it is higher than Vf), discharge occurs in the discharge cell, and the vacuum ultraviolet light (VUV) generated at this time excites the phosphor layer and emits visible light through the transparent front substrate so that the PDP realizes an image.

In order to improve the brightness of the PDP as described above, a PDP in which a discharge sustaining electrode is disposed at the outermost portion of a discharge space in a closed partition structure has been developed. However, the PDP has a discharge sustaining electrode and a discharge sustaining electrode when the width Wa of the address electrode and the distance L of the non-discharge area formed between adjacent discharge cells arranged in the extending direction of the address electrode do not have an optimal proportional relationship. There is a problem of erroneous discharge between the address electrodes and between adjacent discharge sustain electrodes.

The present invention has been made to solve the above problems, and an object thereof is to provide a plasma display panel which prevents erroneous discharge between an address electrode and a discharge holding electrode and a discharge holding electrode of an adjacent discharge cell in a non-discharge area. It is.

In order to achieve the above object, the plasma display panel according to the present invention,

A first substrate and a second substrate disposed to face each other;

Discharge sustaining electrodes extending on the first substrate;

Address electrodes extending on the second substrate in a direction crossing the discharge sustain electrodes;

A non-discharge region is formed in a space between the first substrate and the second substrate to form a plurality of discharge cells, with a space continuous in the direction intersecting the address electrode between the discharge cells adjacent in the extending direction of the address electrode; Partition walls disposed separately from each other; And

Phosphor layers formed in the discharge cells;

Including,

)는 1.08∼3.57 이다.The ratio of the distance L between the discharge sustaining electrode and the address electrode width Wa in the non-discharge area between the adjacent discharge cells (

) Is 1.08 to 3.57.

)는 1.18∼3.57인 경우는 다소의 오방전이 일어나는 범위를 포함하지만 무시할만하다.The ratio (

) Is 1.18 to 3.57, but includes negligible range of false discharges.

If the width Wa is preferably 70 to 110 占 퐉, a width of 70 to 120 占 퐉 includes a range in which some false discharge occurs, but is negligible.

The said distance L is 130-250 micrometers.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a partially exploded perspective view schematically showing a plasma display panel according to the present invention.

Referring to the PDP with reference to the drawings, the PDP according to the present embodiment is formed of a surface facing sealing structure of the first substrate (1, hereinafter referred to as the front substrate) and the second substrate (hereinafter referred to as 3, the back substrate). . In the space between the front substrate 1 and the rear substrate 3, a plurality of partition walls 5 are arranged to form a plurality of discharge cells 7R, 7G, 7B so as to cause plasma discharge. On the inner surface of the discharge cells 7R, 7G, 7B, phosphor layers 9R, 9G, 9B of red (R), green (G), and blue (B) colors are formed.

On the front substrate 1, discharge holding electrodes 11 and 13 formed along the x-axis direction in the drawing to correspond to the discharge cells 7R, 7G and 7B are discharge cells 7R along the y-axis direction. , 7G, 7B, which are arranged side by side while maintaining a distance corresponding to each other, and the address electrodes 15 extending along the direction (y-axis direction in the drawing) intersecting with the discharge sustain electrodes 11 and 13 are in the x direction. Along the discharge substrate 7R, 7G, 7B are arranged side by side on the rear substrate (3).

The discharge sustaining electrodes 11 and 13 are disposed to be parallel to each other so as to correspond to the respective discharge cells 7R, 7G, and 7B, and the second electrode 13 (hereinafter, referred to as X electrode) and the second electrode 13 (hereinafter, referred to as Y electrode). It is referred to as). The X electrode 11 and the Y electrode 13 are provided on the front substrate 1 to form a laminated structure by the dielectric layer 17 and the MgO protective film 19.

The X and Y electrodes 11 and 13 are composed of transparent electrodes 11a and 13a and bus electrodes 11b and 13b, respectively. In this case, the transparent electrodes 11a and 13a play a role of causing surface discharge in the discharge cells 7R, 7G, and 7B, and are formed of transparent ITO electrodes to secure aperture ratio and to secure visible light transmittance. 11b and 13b are preferably formed of a metal electrode such as Ag in order to compensate for the high resistance of the transparent electrodes 11a and 13a to secure current conduction. The pair of bus electrodes 11b and 13b corresponding to each of the discharge cells 7R, 7G, and 7B extend in a straight line along the x-axis direction and are formed to be parallel to each other while maintaining a distance in the y-axis direction. The transparent electrodes 11a and 13a may have a stripe shape extending along the x-axis direction like the bus electrodes 11b and 13b, but the discharge cells 7R are discharged from the bus electrodes 11b and 13b as in the present embodiment. , 7G, 7B) may be formed in a projecting structure toward the center.

The address electrodes 15 are provided on the rear substrate 3 in a direction intersecting the X and Y electrodes 11 and 13 (expanded in the y-axis direction to maintain a gap in the x-axis direction) to the dielectric layer 21. Covered

In addition, the partition walls 5 are provided in a space between the front substrate 1 having the X and Y electrodes 11 and 13 and the rear substrate 3 having the address electrode 15 as described above. The necessary discharge cells 7R, 7G, and 7B are separately formed and formed. The partitions 5 have a space between the discharge cells 7R, 7G, and 7B adjacent in the extension direction (y axis direction) of the address electrode 15, so that the partition walls 5 extend in the extension direction (y axis direction) of the address electrode 15; The non-discharge region a that extends in the crossing direction (X axis direction) is formed. That is, the present invention further includes a non-discharge region by the partition 5 and further includes a non-discharge region a by the empty space.

2 is a partial plan view of FIG. 1.

Referring to the drawings, the partition walls 5 will be described. The partition walls 5 are disposed between the discharge cells 7R, 7G, and 7B adjacent in the extending direction (y-axis direction in the drawing) of the address electrode 15. The non-discharge area a is formed outside the discharge cells 7R, 7G, and 7B, and the discharge cells 7R, 7G, and 7B, which are discharge areas, are formed therein. That is, these partition walls 5 form discharge cells 7R, 7G, and 7B of closed structure on the coordinate xy plane between the front substrate 1 and the back substrate 3, and the discharge cells 7R, 7G. , 7B) are attached to each other in the x-axis direction to form an isolation structure via the non-discharge region a in the y-axis direction.

The discharge cells 7R, 7G, and 7B contain a discharge gas therein, and when the address voltage or the discharge sustain voltage is applied, the discharge cells 7R, 7G, and 7B are spaces that cause gas discharge therein, and the non-discharge area a is located therein. It is an area or space where discharge or light emission is not intended to which a separate voltage is not applied.

The discharge cells 7R, 7G, and 7B and the partition walls 5 partitioning the non-discharge region a may be formed in various structures, but the present embodiment may include the first, second, and third partition wall members 5a and 5b. , 5c).

First, the first partition members 5a are formed to extend in the extending direction (y axis direction) of the address electrode 15 to be parallel to each other while maintaining a distance corresponding to the discharge cells 7R, 7G, and 7B in the x axis direction. And discharge cells 7R, 7G, and 7B adjacent to each other in the y-axis direction. The second partition members 5b are formed in a direction (x axis direction) that intersects the extension direction (y axis direction) of the first partition members 5a to the discharge cells 7R, 7G, and 7B in the y axis direction. They are formed in parallel with each other while maintaining corresponding intervals. These second partition members 5b are separately formed so that the discharge cells 7R, 7G, and 7B adjacent in the x-axis direction are separated at the corner portions. In addition, the third partition member 5c is provided at four corners of the discharge cells 7R, 7G, and 7B partitioned by the first partition member 5a and the second partition member 5b. The member 5a and the second partition member 5b are inclined with each other. Therefore, four corners of the discharge cells 7R, 7G, and 7B are inclinedly connected by the third partition member 5c. The partition walls 5 formed by providing the first and second partition members 5a and 5b and four third partition members 5c as described above, respectively, are compared with the y and axial directions when the x and y axis directions are compared. Discharge cells 7R, 7G, and 7B having an octagonal structure that are formed long and short in the x-axis direction. In other words, the discharge cells 7R, 7G, and 7B formed by the partition wall 5 have trapezoids at both ends positioned in the extending direction (y axis direction) of the address electrode 15. The trapezoidal discharge cells 7R, 7G, and 7B form phosphor layers 9R, 9G, and 9B on a wide surface at both ends thereof to improve luminous efficiency.

)는 비방전 영역(a)에서 오방전을 방지할 수 있도록 최적으로 크기와 관계를 유지한다.The distance L between the discharge sustain electrodes 11 and 13, i.e., the X electrode 11 and the Y electrode 13, of the adjacent discharge cells 7R, 7G, and 7B in the non-discharge region a of the PDP configured as described above. ) And the size of the width Wa of the address electrode 15 and the ratio between these (L, Wa) (

) Is optimally maintained in size and relationship so as to prevent erroneous discharge in the non-discharge area (a).

FIG. 3 shows the occurrence of erroneous discharge in the non-discharge region according to the relationship between the distance L between the discharge sustain electrodes having different polarities of adjacent discharge cells and the width Wa of the address electrode in the non-discharge region of the plasma display panel according to the present invention. Table is shown.

)를 설명하면, 비(

)는 상기 거리(L)와 어드레스전극(15) 폭(Wa)의 크기에 의하여 결정된다.Referring to this table, the distance L between the X electrode 11 and the Y electrode 13 of the adjacent discharge cells 7R, 7G, 7B, and the width of the address electrode 15 formed in the non-discharge region a ( Ratio of Wa

), The ratio (

) Is determined by the distance L and the size of the width Wa of the address electrode 15.

)는 1.18∼3.57인 것이 바람직하며, 1.08∼3.57까지 확장될 수도 있다. 이 비(

)를 형성하는 상기 어드레스전극(15)의 폭(Wa)은 70∼110㎛이고, 70∼120㎛까지 확장될 수도 있으며, 이 때, 거리(L)는 130∼250㎛인 것이 바람직하다.As shown in this table, the ratio (

) Is preferably 1.18 to 3.57, and may be extended to 1.08 to 3.57. This rain (

The width Wa of the address electrode 15 forming?) May be 70 to 110 µm, and may be extended to 70 to 120 µm. In this case, the distance L is preferably 130 to 250 µm.

)가 1.18∼3.57인 범위는 상기 거리(L)가 130∼250㎛이면서 어드레스전극(15)의 폭(Wa)이 70∼110㎛이다. 이 경우 PDP는 적절한 휘도를 유지하게 되고 비방전 영역(a)에서 오방전이 일어나지 않는다.That is, the ratio (

Is 1.18 to 3.57, and the distance L is 130 to 250 mu m, and the width Wa of the address electrode 15 is 70 to 110 mu m. In this case, the PDP maintains an appropriate luminance and no erroneous discharge occurs in the non-discharge region a.

)가 1.08∼3.57인 범위는 상기 거리(L)가 130∼250㎛로 동일하면서 어드레스전극(15)의 폭(Wa)이 70∼120㎛이다. 이 경우 PDP는 확장된 범위, 즉 어드레스전극(15)의 폭(Wa)이 120㎛인 경우에서 오방전을 일으키게 된다. 물론 이 오방전은 PDP의 품질은 다소 떨어뜨리지만 무시할 만하다.However, the ratio (

Is 1.08 to 3.57, and the distance L is equal to 130 to 250 mu m, while the width Wa of the address electrode 15 is 70 to 120 mu m. In this case, the PDP causes an erroneous discharge in an extended range, that is, when the width Wa of the address electrode 15 is 120 탆. This misfire, of course, has a slight deterioration in the quality of the PDP, but it is negligible.

In addition, when the width Wa of the address electrode 15 is 70 to 110 or 70 to 120 μm, and the distance L is 270 μm, the X and Y electrodes 11 and 13 in the non-discharge area a of the PDP. The distance (L) between the ()) is formed far, so that the erroneous discharge between the X and Y electrodes 11 and 13 does not occur, but it cannot be secured to bend the request.

On the other hand, in the case where the width Wa of the address electrode 15 is 60 µm or less, misdischarge is not generated within a range in which the distance L between the X and Y electrodes 11 and 13 is 110 to 270 µm. The width Wa of the address electrode 15 is set too narrow so that disconnection occurs in the electrode forming process.

)는 비방전 영역(a)에서 어드레스전극(15)과 Y 전극(13)간의 오방전을 방지하고, 또한, 이 비방전 영역(a)에서 대향하는 인접한 방전셀(7R, 7G, 7B)의 X, Y 전극(11, 13)간의 오방전을 방지하게 된다.The width Wa of the address electrode 15 formed as described above, the distance L between the X and Y electrodes 11 and 13, and the ratio thereof

) Prevents erroneous discharge between the address electrode 15 and the Y electrode 13 in the non-discharge region a, and X, in the adjacent discharge cells 7R, 7G, 7B facing each other in the non-discharge region a. This prevents erroneous discharge between the Y electrodes 11 and 13.

4 is a driving waveform diagram of the plasma display panel according to the present invention, and FIG. 5 is a wall charge distribution diagram based on the driving waveform of the plasma display panel according to the present invention.

With reference to these drawings, it will be explained that mis-discharge is prevented between the X and Y electrodes 11 and 13 and between the address electrode 15 and the Y electrode 13.

First, one frame is composed of a plurality of subfields, and each subfield is a drive applied to the X, Y electrodes 11 and 13 and the address electrode 13 as shown in FIG. It includes a reset section, a scan section, and a sustain section by the waveform.

In the reset section, wall charges are distributed to each of the address electrode 15, the Y electrode 13, and the X electrode 11 with appropriate polarity and quantity, so that the write operation in the scan section can be performed smoothly. Is the interval to adjust.

In the case where the reset period is performed immediately after the sustain discharge is finished in one subfield, the reset operation applies a ramp pulse rising slowly from the X electrode 11 to the constant voltage Ve. The pulse waveform applied to the Y electrode 13 is kept at 0 V together with all the address electrodes 15 and all the X electrodes 11 in the first half thereof, so that the discharge sustain voltage Vs is applied.

In the T1 section, a ramp voltage Yr that gradually rises from a voltage below the discharge start voltage to the X electrode 11 toward a voltage above the discharge start voltage is applied to the Y electrode 13.

In the second half of the reset period, a ramp voltage that is gently lowered from a voltage which is equal to or lower than the discharge start voltage Vf is applied to the X electrode 11 while maintaining the constant voltage Ve.

While this ramp voltage falls, the second weak reset discharge occurs from the X electrode 11 to the Y electrode 13 again in all the discharge cells 7R, 7G, and 7B. As a result, the negative wall voltage on the Y electrode 13 and the positive wall voltage on the X electrode 11 are weakened, and a small amount of negative walls are provided on the X and Y electrodes 11 and 13. The charge is accumulated. In addition, a weak discharge occurs between the address electrode 15 and the Y electrode 13, and the positive wall voltage of the address electrode 15 is adjusted to a value suitable for the write operation.

The above description will be made with reference to FIG. 5 after the reset.

5 shows the accumulation of wall charges in the X and Y electrodes 11 and 13 and the address electrode 15 before the scan after reset (a), and the X and Y electrodes 11 and 13 and the address electrode after addressing. The wall charge scale at (15) is shown (b).

Referring to FIG. 5A, as a negative voltage is applied to the X and Y electrodes 11 before scanning after reset, a small amount of negative wall charges are accumulated on the X electrode 11. A large amount of negative wall charge is accumulated on the Y electrode 13, and a positive wall charge is accumulated on the address electrode 15 as it is after the sustain discharge.

Referring to FIG. 5B, between the Y electrode 13 and the address electrode 15 by the scan voltage Vsc of the Y electrode 13 and the address voltage Va of the address electrode 15 in the above state. An address discharge occurs, whereby the selected discharge cells 7R, 7G, and 7B are divided into an address discharge cell 23a and an unselected address non-discharge cell 23b (a separate reference numeral is used for convenience).

In the address discharge cell 23a selected above, a small amount of negative wall charges are present in the address electrode 15 due to the address voltage Va, and the positive wall charges accumulated thereon are Y electrodes 13 ), A large amount of positive wall charges are accumulated on the Y electrode 13, and a large amount of negative wall charges are accumulated on the X electrode 11.

In addition, a large amount of positive wall charges are left in the address electrode 15 of the address non-discharge cell 23a. Thus, a small amount of negative wall charges are generated in the X electrode 11 and the Y electrode ( 13, there is a large amount of negative wall charge.

When the discharge holding voltage Vs is applied to the X and Y electrodes 11 and 13 of the address discharge cell 23a in the above state, between the X and Y electrodes 11 and 13 of the address discharge cell 23a. A maintenance discharge occurs during this time.

At this time, the positive wall charge and the negative wall charge are accumulated in the Y electrode 13 of the address discharge cell 23a and the X electrode 11 of the address non-discharge cell 23b adjacent thereto. As described above, spaced apart by the increased distance L is prevented from being discharged between them.

In addition, the address electrode 15 of the non-discharge region a between the discharge cells 23a and 23b has a narrow width Wa as described above, making it difficult to accumulate a small amount of negative wall charge. As a result, erroneous discharge is prevented between the Y electrode 13 of the address discharge cell 23a in which the positive wall charge is accumulated and the address electrode 15 in which the negative wall charge is accumulated.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the scope of the invention.

)를 1.18∼3.57 범위 이내로 설정함에 따라, 상기의 비방전 영역에서의 어드레스전극에 벽전하가 축척되는 것을 최소화하여 Y 전극과 어드레스전극 사이의 오방전을 방지하고, 인접한 방전셀의 X, Y 전극 사이의 거리를 멀게 하여 이들 사이의 오방전을 방지하는 효과가 있다.As described above, according to the plasma display panel according to the present invention, the ratio of the distance L between the X and Y electrodes and the address electrode width Wa in the non-discharge region between adjacent discharge cells (

) Within the range of 1.18 to 3.57 to minimize the accumulation of wall charges on the address electrodes in the non-discharge region, thereby preventing mis-discharge between the Y electrode and the address electrode and between the X and Y electrodes of the adjacent discharge cells. There is an effect of preventing the distance between them to prevent the discharging between them.

Claims (6)

A first substrate and a second substrate disposed to face each other; Discharge sustaining electrodes extending on the first substrate; Address electrodes extending on the second substrate in a direction crossing the discharge sustain electrodes; A non-discharge region is formed in a space between the first substrate and the second substrate to form a plurality of discharge cells, with a space continuous in the direction intersecting the address electrode between the discharge cells adjacent in the extending direction of the address electrode; Partition walls disposed separately from each other; And Phosphor layers formed in the discharge cells; Including, The ratio of the distance L between the discharge sustaining electrode and the address electrode width Wa in the non-discharge area between the adjacent discharge cells (

) Is 1.08 to 3.57 plasma display panel. The method according to claim 1, The ratio (

) Is 1.18 to 3.57 plasma display panel. The method according to claim 1, The width Wa is a plasma display panel of 70 ~ 110㎛. The method according to claim 1, The width Wa is 70 to 120㎛ plasma display panel. The method according to claim 1, The distance L is 130 to 250㎛ plasma display panel. The method according to claim 1, And the discharge cells are formed in a trapezoidal shape in which both ends thereof become narrower with respect to the address electrode extension direction.

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