KR100656709B1 - Plasma Display Panel - Google Patents

Abstract

The disclosure relates to a PDP that optimizes the electrode area within a cell in which a pixel is formed to facilitate discharge under a lower applied voltage.

The disclosed PDP has a predetermined electrode at a position where the cell is formed, respectively, at a position where the cell is formed, at one of a plurality of first and second electrodes covered with a dielectric, and at a third electrode that forms a cell orthogonal to any one of the electrodes. The diffusion discharge pattern has a width and an area, protrudes in the column direction and the row direction, and is formed to face each other and induces a discharge voltage drop during discharge, and is provided on the other electrode covered with a dielectric material. It characterized in that the one-way diffusion discharge pattern having a predetermined width and area toward the electrode on which the pattern is formed to protrude to cause a surface discharge with the diffusion discharge pattern of the neighboring electrode.

Accordingly, there is an advantage in that miswriting and misdischarge generated during address discharge and sustain discharge in the PDP are eliminated, and discharge can be generated at a lower voltage.

Description

Plasma Display Panel

1 is a partial perspective view showing a conventional plasma display panel;

FIG. 2 is a cross-sectional view taken along the line II-II of the unit cell in the plasma display panel of FIG.

FIG. 3 is a perspective view illustrating only the first and second row electrodes and the column electrodes of FIG. 1;

4 is a diagram illustrating an equivalent circuit for explaining a unit cell of FIG. 2;

5 to 8 are configuration diagrams illustrating an exemplary embodiment of a plasma display panel according to the present invention.

5 is a perspective view of a portion of the plasma display panel taken out;

6 is a cross-sectional view taken along the line III-III of the unit cell in the plasma display panel of FIG.

FIG. 7 is a cross-sectional view taken along line IV-IV for illustrating a unit cell in the plasma display panel of FIG. 5.

8 is an enlarged perspective view illustrating only the first and second row electrodes and the column electrodes of FIG. 5.

<Description of Symbols for Main Parts of Drawings>

50: first row electrode 51: second row electrode

52: column electrode 60: first diffusion discharge pattern

61: one-way diffusion discharge pattern 62: second diffusion discharge pattern

100: panel 102: front glass substrate

103 back glass substrate 106 dielectric layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, which is one of flat panel displays, and more particularly to a cell in which pixels are formed, in particular, in the multi-pixel and high-precision of a panel structure. The present invention relates to a plasma display panel that optimizes an electrode area at a position) and prevents discharging with adjacent electrodes while discharging at a lower applied voltage, and also enables a large screen.

For example, a direct current (DC) type and an alternating current (AC) type are known as plasma display panels (hereinafter, abbreviated as "PDP"). In addition, there are a so-called mono-color type which sees the emission color of the discharge gas and a color type which causes the phosphor layer to emit visible light by ultraviolet rays generated by discharge. Hereinafter, the color PDP will be mainly described since it is common to color and monocolor and is particularly prominent in the color type.

Generally, various methods are known for the construction of a PDP, but in order to achieve a thin shape, it is often adopted to form an airtight container that encloses opposing front glass substrates and rear glass substrates with seal glass to accommodate discharge gas. In general, low-cost soda-lime glass is used, such as the front and rear glass substrates.

In color PDPs with fine and many display cells, spacers are used to prevent error discharge or color penetration between adjacent cells, or to withstand pressure differences between panels and to define the distance between electrodes for discharge. Or a bulkhead is required between the front and back glass substrates. The space surrounded by the partition wall and the front and rear glass substrates constitutes one display cell. Phosphor is coated on the inner surface of the display cell, and the phosphor layer generates visible light of each color by ultraviolet rays generated by the discharge.

For many cells, it is convenient to divide the discharge electrodes into rows and columns, and to form them at the intersections of the line and row electrodes, respectively.

This row electrode and column electrode are the first or second electrode groups, and a plurality of cells are independently selected from the two electrode groups. Therefore, since a 1st and 2nd electrode group should just be a selectable structure, a kind does not matter.

In the PDP, a discharge is obtained by adjusting a voltage applied between a row electrode and a column electrode of a cell constituting a pixel, and the amount of discharged light is controlled by changing the length of discharge time in the cell.

As described above, the plasma display panel generates a surface discharge by controlling voltages applied to the row electrodes and the column electrodes to obtain an image.

1 is a partial perspective view showing one of such plasma display panels according to the related art, FIG. 2 is a cross-sectional view taken along line II-II for showing a unit cell in the plasma display panel of FIG. FIG. 1 is a perspective view illustrating only the first and second row electrodes and the column electrode of FIG. 1.

The plasma display panel 100 includes a front glass substrate 102 which is a display surface of an image, a rear glass substrate 103 disposed in parallel with a predetermined distance from the front glass substrate, and front and rear glass substrates 102, 103 is arranged between the barrier ribs 110 to keep the two glass substrates in parallel and to separate the cells to form a discharge space, and to orthogonally cross the barrier ribs 110 on the front glass substrate 102 with a constant line width as a whole. The first row electrode 104 as a line-shaped scan electrode and the second row electrode 105 as a common electrode formed in parallel with each other, and the first and second row electrodes 104 and 105 of the front glass substrate 102. A dielectric layer 106 formed below and limiting the discharge current at the time of discharge, MgO (magnesium oxide) 107 coated under the dielectric layer 106, and barrier ribs of the back glass substrate 103 with a predetermined overall line width. Are arranged in parallel between the (110) It is applied on the column electrode 108 as a line-shaped address electrode orthogonal to the first and second row electrodes 104 and 105 of the front glass substrate 102 and the column electrode 108 in the discharge space. It is composed of a phosphor layer 109 that is excited by ultraviolet rays generated by the discharge of each cell and generates red, blue, and green visible light. Here, the discharge cells at the intersections of the first and second row electrodes 104 and 105 facing each other and the column electrodes 108 orthogonal to each other become pixels, and the discharge cells are separated by the partition wall 110.

In the plasma display panel 100 as described above, the operation thereof is performed by applying voltage pulses alternately between the first row electrode 104 and the second row electrode 105 and inverting the polarity every half cycle. Causes each cell to emit light.

As the color display, the phosphor layer 109 formed in each cell is excited by the ultraviolet rays from the discharge and emits light. Since the first row electrode 104 and the second row electrode 105 for discharging for display are covered with the dielectric layer 106, once discharge occurs between the electrodes of each cell, electrons or ions generated in the discharge space are generated. (ion) moves in the direction of the applied voltage and accumulates on the dielectric layer 106.

Charges such as electrons and ions accumulated on the dielectric layer 106 are called wall charges. Since the electric field formed by this wall charge acts in the direction of weakening the applied electric field, the discharge disappears rapidly with the formation of the wall charge.

After the discharge is extinguished, the electric field forming the wall charge and the applied electric field are overlapped when the electric field of the previous discharge and the polarity are applied, so that discharge is possible at a lower applied voltage than the previous discharge. After that, it is possible to maintain the discharge by inverting this low voltage every half cycle. The voltage pulses applied to the first row electrode 104 and the second row electrode 105 every half cycle are called sustain pulses.

The sustain discharge lasts as long as the sustain pulse is applied until the wall charges disappear, and dissipation of the wall charges is called erasing.

The entire screen is configured to maintain an address voltage, a scan voltage for scanning, and a discharge for inputting a digital image signal to the first and second row electrodes 104 and 105 and the column electrode 108 of each cell. The sustain voltage and the erase voltage for stopping the discharge of the discharged cells are applied at every subfield in the frame to drive them in a matrix type.

The subfield includes a reset period, an address period, a sustain discharge period, and an erase period.

In particular, in the plasma display panel, when the reset period is performed, the scan voltage is sequentially applied to the independent first row electrodes 104 to perform scanning. On the other hand, an address voltage is applied to the column electrode 108 depending on the content of the image data. Arbitrary cells may be selected in a matrix based on the scan voltage applied to the first row electrode 104 and the address voltage applied to the column electrode 108.

Since the total voltage value of the scan voltage and the address voltage is set to be equal to or greater than the discharge start voltage between the first row electrode 104 and the column electrode 108 of the cell, the cell to which the scan voltage and the address voltage are simultaneously applied is the first row. An address discharge occurs between the electrode 104 and the column electrode 108. This address discharge voltage is mostly applied to the dielectric layers 106 and 111 formed on the column electrode 108 as the address electrode and the first row electrode 104 as the scan electrode. In this case, when the capacitors based on the thicknesses of the two dielectric layers 106 and 111 are referred to as Cd, and the capacitors in the gas gap (Gas Gap), that is, the capacitors in the discharge space, are referred to as Cg, the relationship between Cd and Cg becomes Cd''Cg. In other words, it means that the discharge space, ie the gas gap, is much wider than the thickness of the dielectric layer.

In addition, the capacitor Cd of the dielectric layer and the capacitor Cg of the discharge space may be represented as shown in FIG. 4 by an equivalent circuit.

In such an equivalent circuit, the charge amount Q formed when the voltage is applied across the capacitor is accumulated as the capacitor is larger when the applied voltage is the same.

In other words, the charge amount Q and the capacitor C are proportional to each other in the relation of charge amount Q = CV (V is an integer).

Therefore, when generating an address discharge in a cell where the column electrode 108 and the first row electrode 104 cross each other, the area A where the column electrode 108 and the first row electrode 104 face each other is formed. Accordingly, the capacitor Cd value changes, and the amount of charge Q accumulated according to the change of the Cd value also changes.

That is, it has a relationship of Cd = ε (A / d).

Is the dielectric constant of the dielectric layer, A is the area of the first row electrode 104 and the column electrode 108, and d is the thickness of the dielectric layer. As a result, at the time of address discharge, the discharge amount varies depending on the area A of the intersecting portion of the column electrode 108 and the first row electrode 104, that is, the discharge area, and the dielectric layer 106 depends on the discharge amount. Since the amount of wall charges accumulated in the C1 is changed, the area A of the first row electrode 104 and the column electrode 108 is formed at the portion where the cell is formed for sufficient discharge during address discharge. An effective address discharge can occur to accumulate a large amount of charge only when the scan voltage and the address voltage applied to the first row electrode 104 and the column electrode 108 are adjusted to be wider than those of the unheated portion.

After the scanning of the entire screen is finished, sustain pulses having different phases and synchronized voltage values are applied to the first and second row electrodes 104 and 105 to sustain and discharge only cells in which wall charges are accumulated by the address discharge. The screen is displayed by performing the discharge period.

The electrode structure of the plasma display panel according to the related art described above has the same area as the portion where the pixel is formed and the portion where it is not, that is, the area where the first and second row electrodes and the column electrode intersect and the non-intersecting area are the same. It can be seen that an image is displayed by discharging by applying an address voltage, a scan voltage, and a sustain voltage.

However, in the above-described electrode structure of the plasma display panel, when the column electrode and the first row electrode face each other to generate an address discharge, the area where the column electrode and the first row electrode face each other is small so that the capacitor Cd value is reduced. There is a small amount of charge accumulated as the Cd value decreases, and thus there is a possibility that miswriting occurs easily during address discharge.

In order to prevent the write-in, the address voltage and the scan voltage must be increased, which inherently has a problem against driving to low power consumption to be pursued by the PDP.                         

In addition, since the discharge interval is wide between the first electrode and the second electrode, not only must the sustain discharge voltage be increased for sufficient discharge, but also there is a problem in that mis-discharge with neighboring electrodes occurs.

Therefore, it is desirable to provide a PDP capable of addressing the above problems and driving at a more efficient address discharge and lower power consumption in terms of reliability.

Accordingly, an object of the present invention is to provide a plasma display panel capable of realizing a bright and clear screen of high quality while minimizing power consumption and minimizing power generation during an address discharge, which is an address in a cell in which pixels are formed. By optimizing the area of the electrode and the scan electrode it is characterized in that the discharge easily occurs even at a lower address voltage and scan voltage.

It is another object of the present invention to provide a plasma display panel which prevents mis-discharge with neighboring electrodes during sustain discharge, thereby coping with a large screen. It is characterized in that the sustain discharge occurs more easily by minimizing the interval of.

According to a plasma display panel according to an aspect of the present invention for achieving the above object, a plurality of line-shaped first and second electrodes covered with a dielectric, and a cell orthogonal to at least one of the electrodes In a panel provided with a plurality of line-shaped third electrodes forming a cell:

Any one of the line-shaped first electrode and the second electrode and the third electrode are formed to protrude at a predetermined interval and have a predetermined width and area, and are formed to face each other to induce a discharge voltage drop during discharge. It characterized in that it comprises a substantially square diffusion discharge pattern.

Preferably, the diffusion discharge patterns are formed only in a portion where the cells are formed.

Optionally, the diffusion discharge patterns formed on the one electrode and the diffusion discharge patterns formed on the third electrode have the same width and area.

Preferably, the electrode on which the diffusion discharge pattern is formed is at least a plurality of address electrodes and scan electrodes.

In addition, according to the plasma display panel of the present invention, a plurality of line-shaped first and second electrodes covered with a dielectric material and a line-shaped plurality of cells forming orthogonal to at least one of the electrodes are formed. In a panel with a third electrode of:

Any one of the line-shaped first and second electrodes and the third electrode have a predetermined width and area in the portion where the cell is formed and face each other to induce a discharge voltage drop during discharge. The other electrode is provided with a substantially square diffusion discharge pattern, and the other electrode covered with the dielectric has a predetermined width and area toward the electrode where the diffusion discharge pattern is formed to protrude from neighboring electrodes. It is characterized by comprising a one-way diffusion discharge pattern for causing a surface discharge.

Preferably, the diffusion discharge pattern formed on one of the electrodes and the one-way diffusion discharge pattern formed on the other electrode is different in area and the same width.

Optionally, the electrode on which the diffusion discharge pattern is formed is at least a plurality of address electrodes and a scan electrode, and the electrode on which the one-way diffusion discharge pattern is formed is a common electrode arranged in line with the scan electrode.

In this way, the area of any one of the first and second electrodes which are covered with the dielectric and arranged in parallel with each other and the third electrode which is orthogonal to the electrodes is optimized only at the portion where the cells are formed to generate the address discharge and the It can be seen that the sustain discharge is caused by minimizing the distance between the first electrode and the second electrode.

As a result, miswriting and false discharge occurring during address discharge or sustain discharge can be eliminated, and address discharge and sustain discharge can be generated at a lower voltage, which can cope with a large screen.

And, there may be a plurality of embodiments of the present invention, the following will be described in detail for the most preferred embodiment.

Through this preferred embodiment, the objects, other objects, features and advantages of the present invention will become more apparent from the following description with an embodiment according to the present invention with reference to the accompanying drawings for the purpose of illustration.

Hereinafter, exemplary embodiments of the plasma display panel according to the present invention will be described in detail with reference to the accompanying drawings.

In addition, in each figure used for description, the same component may be attached | subjected, and may show the same number, and the overlapping description may be abbreviate | omitted.

FIG. 5 is a perspective view illustrating a part of the plasma display panel according to the present invention, FIG. 6 is a cross-sectional view taken along line III-III for illustrating a unit cell in the plasma display panel of FIG. 5, and FIG. 7 is a plasma display of FIG. 5. It is sectional drawing IV-IV line which shows a unit cell in a panel.

The plasma display panel 100 according to the present embodiment includes a front glass substrate 102 that is a display surface of an image, a rear glass substrate 103 disposed in parallel with a predetermined distance from the front glass substrate, and two glass substrates. The partitions 110 are formed to be parallel to each other and the cell walls are separated from each other to form discharge spaces, and the front glass substrate 102 is disposed to be orthogonal to the partition walls 110. A substantially square first diffusion discharge pattern 60 having a width and an area of the first row electrode 50 as a line-shaped scan electrode which protrudes in a column direction to induce a discharge voltage drop, and a first row electrode A one-way diffused discharge pattern 61 is disposed on the front glass substrate 102 in parallel to 50 and has a predetermined width and an area only at a portion where the cell is formed to protrude toward the first diffused discharge pattern 60. Surface with the first diffused discharge pattern The dielectric layer 106 formed on the second row electrode 51 as the line-shaped common electrode causing the discharge and the first and second row electrodes 50 and 51 of the front glass substrate 102 to limit the discharge current during discharge. ), The MgO 107 coated under the dielectric layer 106, and the partitions 110 of the rear glass substrate 103 are arranged in parallel to each other, and the first diffusion discharge pattern 60 of the first row electrode 50 is formed. A substantially square second diffused discharge pattern 62 having a constant width and area in a portion orthogonal to the cross-sectional area is formed to protrude in a row direction to form a surface discharge with the first diffused discharge pattern and a column electrode as a line-shaped address electrode. And a dielectric layer 111 formed on the column electrode 52 to limit the discharge current at the time of discharge, and applied on the dielectric layer 111 inside the discharge space and excited by ultraviolet rays generated by the discharge of each cell. Phosphor layer 109 to generate red, green and blue visible light )

The plasma display panel of the present invention made as described above will be described in more detail with reference to FIGS. 5 to 8.

After the reset period as described above is performed in the plasma display panel of the present invention, as shown in FIG. 5 for address discharge, a scan voltage is sequentially applied to the independent first row electrodes 50 to perform scanning and column An address voltage is applied to the electrode 52 in response to the contents of the image data.

An arbitrary cell is selected in a matrix by the scan voltage applied to the first row electrode 50 and the address voltage applied to the column electrode 52.

That is, in the cell to which the scan voltage and the address voltage are simultaneously applied, address discharge occurs between the first diffusion discharge pattern 60 of the first row electrode 50 and the second diffusion discharge pattern 62 of the column electrode 52. This address discharge voltage is mostly applied to the dielectric layers 106 and 111 formed on the column electrode 52 as the address electrode and the first row electrode 50 as the scan electrode.

At this time, when generating an address discharge in the cell where the column electrode 52 and the first row electrode 50 cross each other, as shown in FIGS. 6 to 8, the second diffusion discharge formed on the column electrode 52 in the cell. The width of the first diffusion discharge pattern 60 formed in the pattern 62 and the first row electrode 50 is considerably greater than the pattern width of the first row electrode 50 and the column electrode 52 in the portion where no cell is formed. wide. In other words, the column electrode 52 as the address electrode maintains the same pattern width as before when the pixel is not formed, and gives the first diffusion by giving the unevenness to the left and right as shown in FIG. 8 where the pixel is formed. The width of the discharge pattern 60 is widened. Where the pixel is not formed again, the same pattern is maintained.

In the case of the first row electrode 50 serving as the scan electrode, the width of the first row electrode 50 is increased to the second row electrode 51, that is, up and down, where the counter electrode 52 is opposed to the discharge. As a result, the capacitor value of the dielectric layer 106 increases at the pixel position, and the amount of charge stored as the capacitor increases increases, so that the address discharge can be performed with a lower address voltage and a scan voltage during discharge.

As a result, during the address discharge, the area of the portion intersecting the column electrode 52 and the first row electrode 50 independent of the column electrode, that is, the first diffusion discharge pattern 60 and the second diffusion discharge pattern 62 that discharge, are discharged. The amount of discharge increases with the area of, and the amount of wall charges accumulated in the dielectric layer 106 is increased by the amount of discharge, so that it is possible to generate discharge at a lower voltage during address discharge.

After the scanning of the entire screen is completed, only cells in which charges are accumulated due to the address discharge are applied to the first and second row electrodes 50 and 51 by applying a sustain voltage having a different phase and a synchronized voltage value to sustain discharge. The sustain discharge is performed, and the width of the one-way diffusion discharge pattern 61 formed on the second row electrode 51, which is the common electrode, is increased only toward the first diffusion discharge pattern 60 of the first row electrode 50. By narrowing the width, it is possible to generate a discharge at a lower voltage during sustain discharge, and to prevent the occurrence of erroneous discharge with the neighboring first row electrode 50. Here, the area of the one-way diffusion discharge pattern 61 has a value 1/2 of the area of the first and second diffusion discharge patterns 60 and 62.

On the other hand, as a comparative example, unlike the prior art, that is, the surface discharge is caused by equalizing the widths of the portions where the first and second row electrodes and the column electrodes intersect, and the portions that do not intersect, the present invention provides a pixel. It can be seen that the area where the first and second row electrodes face opposite discharges are increased in the cells to be formed, and the surface discharge is reduced by narrowing the distance between the first and second row electrodes.

As a result, according to the present invention, discharge occurs easily even at lower scan voltages, address voltages, and sustain voltages during address discharge or sustain discharge, eliminating the occurrence of misfeeds and mis-discharges. You can get

According to this application example, a large screen PDP can be driven with lower power consumption.

In addition, although specific embodiments of the present invention have been described and illustrated above, it is obvious that the present invention may be variously modified and implemented by those skilled in the art.

Such modified embodiments should not be individually understood from the technical spirit or the prospect of the present invention, and such modified embodiments should fall within the appended claims of the present invention.

It is clear from the above description that, according to the plasma display panel according to the present invention, by increasing the area of the scan electrode and the address electrode at the position where the cell is formed, and narrowing the distance between the scan electrode and the common electrode, address discharge and sustain Miswriting and mis-discharge are not generated at the time of discharge, and address discharge and sustain discharge can be easily generated even at a lower voltage, thereby making it possible to cope with a large screen.

Claims (8)

A panel comprising a plurality of line-shaped first and second electrodes covered with a dielectric and a plurality of line-shaped third electrodes orthogonal to at least one of the electrodes to form a cell. : Any one of the line-shaped first and second electrodes and the third electrode are formed to protrude in the column direction and the row direction with predetermined widths and areas at predetermined intervals, and are formed to face each other and discharge each other. A plasma display panel comprising a diffusion discharge pattern for inducing a voltage drop during discharge. The method of claim 1, And the diffusion discharge patterns are formed only at a portion where the cells are formed. The method of claim 1, And the diffusion discharge patterns formed on the one electrode and the diffusion discharge patterns formed on the third electrode have the same width and area. The method according to any one of claims 1 to 3, And the electrodes on which the diffusion discharge pattern is formed are at least a plurality of address electrodes and scan electrodes. A panel comprising a plurality of line-shaped first and second electrodes covered with a dielectric and a plurality of line-shaped third electrodes orthogonal to at least one of the electrodes to form a cell. : Any one of the line-shaped first electrode and the second electrode and the third electrode are formed to protrude in the column direction and the row direction, respectively, having a predetermined width and area in the portion where the cell is formed, and face each other. And the other electrode having a diffusion discharge pattern which induces a discharge voltage drop during discharge, and the other electrode in which the diffusion discharge pattern is not formed has a predetermined width and area toward the electrode where the diffusion discharge pattern is formed. And a one-way diffusion discharge pattern protruding to cause surface discharge with the neighboring diffusion discharge pattern of the adjacent electrode. The method of claim 5, The diffusion discharge pattern formed on the one electrode and the one-way diffusion discharge pattern formed on the other electrode are different in area and have the same width. The method of claim 6, Assuming that the area of the one-way diffusion discharge pattern is A and the area of the diffusion discharge pattern is B, the relationship between the two areas is defined as A &lt; B. The method of claim 5, The electrode having the diffusion discharge pattern formed therein is at least a plurality of address electrodes and a scan electrode, and the electrode having the one-way diffusion discharge pattern formed thereon is a common electrode arranged in the same line with the scan electrode.

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