KR100527312B1 - Method for fabricating a thin film transistor including crystalline active layer - Google Patents

Abstract

The present invention relates to a method for removing a metal layer used for crystallization of silicon in the process of manufacturing a crystalline silicon thin film transistor using MILC. The present invention selectively removes only the metal layer used for inducing crystallization of silicon from the substrate without affecting other metal layers, such as the gate electrode of the thin film transistor, thereby improving the light transmittance of the substrate and improving the electrical properties of the thin film transistor. The present invention uses a method of simultaneously removing a crystallization inducing metal layer by etching a substrate using hydrogen fluoride, carbon fluoride, or the like used for oxide etching.

Description

Manufacturing method of thin film transistor including crystalline active layer {METHOD FOR FABRICATING A THIN FILM TRANSISTOR INCLUDING CRYSTALLINE ACTIVE LAYER}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor including a crystalline silicon active layer, and in particular, a metal layer inducing crystallization after crystallizing a silicon thin film by using metal induced lateral crystallization (MILC). It is about a method to remove more effectively. The present invention provides a method for rapidly removing a metal layer such as nickel used to induce crystallization of silicon with an oxide layer using a fluoride-based etchant.

As the current devices become larger and more integrated, transistor devices become thinner. Accordingly, amorphous silicon thin film transistors used in display devices such as LCDs are being replaced by polycrystalline silicon thin film transistors. Amorphous silicon thin film transistors can be easily made in transparent substrates such as glass and quartz at a process temperature of 350 ° C. or lower, but they are difficult to use in high-speed operation circuits due to their low electron mobility. On the other hand, since polycrystalline silicon has a higher electron mobility than amorphous silicon, a driving circuit can be formed on a substrate, which is advantageous as a transistor of a high resolution and large area device.

Polycrystalline silicon thin film transistors are fabricated using a method of depositing amorphous silicon on a transparent substrate such as glass and quartz, and crystallizing the amorphous silicon by heat treatment. After depositing amorphous silicon, crystallization into polycrystals includes solid phase crystallization (SPC), excimer lazer annealing (ELA), and metal induced lateral crystallization (MILC). There is this. Here, the SPC method is a relatively simple crystallization method for producing a polycrystalline silicon thin film by heat treatment for a long time in a furnace (furnace) of 600 ℃ or higher, but high crystallization temperature and long heat treatment time is essential. In addition, there are many defects inside the crystallized crystal grains, which makes it difficult to fabricate the device, and there is a disadvantage that the glass substrate cannot be used due to the high crystallization temperature which is higher than the deformation temperature of the glass substrate.

The ELA method is a method of crystallizing a thin film by instantaneously irradiating an excimer laser having a short wavelength of strong energy, which enables crystallization at low temperatures of 400 ° C. or less, and enables the production of crystal grains having large crystal grains and excellent characteristics. It is difficult to manufacture mass-produced devices and large-area devices because of the inhomogeneous processing and expensive auxiliary equipment.

Metal Induced Lateral Crystallization (MILC) is a method of crystallizing amorphous silicon by depositing a crystallization induction metal such as nickel on a part of amorphous silicon and then performing heat treatment. This method may be subjected to crystallization heat treatment using the RTA or ELA method, but the substrate may be heated to a temperature of about 400-600 ^° C. in the furnace to effectively induce crystallization of silicon. MILC has the advantage of high productivity because it can heat a large amount of substrate in the furnace, and high uniformity and yield of crystals compared to the laser heat treatment method.

However, because MILC uses a catalyst metal including nickel to induce crystallization of silicon, these metals or their compounds remain on the substrate and the thin film transistor. Conventionally, a thin film transistor panel is manufactured without removing the MILC induction metal. In this case, the operation characteristics of the transistor are deteriorated by the residual metal component. In particular, when the thin film transistor panel is used for a display such as an LCD or an OELD, the opening of the display pixel is removed. There is a problem that the light transmittance is deteriorated because the metal layer is covered on the substrate surface. On the other hand, conventionally, when removing the catalytic metal, a method of selectively removing the metal layer using an acidic etchant was used. However, the crystallization induction metal such as nickel has a problem of causing damage to the gate electrode in the etching process of removing the metal layer because the corrosion resistance is greater than the material used as the gate electrode of the thin film transistor.

Accordingly, an object of the present invention is to provide a method for effectively and quickly removing only a metal layer used for crystallization of silicon without affecting a metal layer such as a gate electrode in fabricating a crystalline silicon thin film transistor panel using MILC. It is done. It is also an object of the present invention to improve the light transmittance of a display by removing the crystallization inducing metal layer from the substrate area providing the pixel openings of the display. In order to achieve this object, the present invention uses a method of eroding a glass substrate surface using an oxide etchant comprising hydrogen fluoride or carbon fluoride and simultaneously removing the metal layer deposited thereon.

 Hereinafter, with reference to the accompanying drawings will be described the technical problem and the solution of the process of manufacturing a crystalline thin film transistor using MILC.

1 illustrates a state in which an amorphous silicon thin film 11 is formed on a substrate 10 of a thin film transistor driving display. Thin film transistor driven display devices such as LCDs and OELDs typically use transparent substrates made of alkali free glass, quartz or silicon oxide. Alternatively, a buffer layer (not shown) may be formed between the substrate and the amorphous silicon thin film to prevent contaminants from diffusing from the substrate into the amorphous silicon thin film. The buffer layer may be formed of silicon oxide (SiO ₂ ), silicon nitride (SiNx), silicon oxide nitride (SiOxNy), or a composite layer thereof, including plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), and atmospheric vapor deposition (APCVD). It is formed by deposition to a thickness of 300 to 10,000 Pa, preferably 500 to 3,000 Pa at a temperature of 600 ^° C. or less using a deposition method such as pressure chemical vapor deposition (ECR), ECR CVD (Electron Cyclotron Resonance CVD), or sputtering.

In the substrate 10, a plurality of amorphous silicon thin films 11 are formed in an island shape at a position corresponding to each pixel of the display. The amorphous silicon thin film 11 is formed by depositing amorphous silicon in a thickness of 100 to 3,000 Å, preferably 500 to 1,000 Å using PECVD, LPCVD or sputtering. The amorphous silicon thin film 11 is patterned by dry etching with a plasma of etching gas using a pattern made by photolithography.

FIG. 2 is a cross-sectional view illustrating a state in which the gate insulating layer 12 and the gate electrode 13 are sequentially stacked on the amorphous silicon thin film 11. The gate insulating layer 12 may be formed using a deposition method such as PECVD, LPCVD, APCVD, ECR CVD, and the like to form a silicon oxide, silicon nitride (SiNx), silicon oxynitride (SiOxNy) or a composite layer thereof in a range of 300 to 3,000 kPa, preferably It is formed by depositing to a thickness of 500 to 1,000Å. A conductive material such as a metal material or a doped polysilicon is formed on the gate insulating film using a method such as sputtering, heat evaporation, PECVD, LPCVD, APCVD, ECR CVD, sputtering, or the like, preferably 2,000 to 2,000 The gate electrode 13 is formed by depositing a gate metal layer with a thickness of 4,000 kHz and patterning it simultaneously with the gate insulating layer 12. The gate electrode 13 is patterned by wet or dry etching using a pattern made by photolithography.

FIG. 3 is a diagram illustrating a doping process for implanting impurities into the source 11S and the drain region 11D of the silicon thin film using the gate electrode 13 formed as shown in FIG. 2 as a mask. In case of manufacturing N-MOS TFT, dopant such as PH ₃ , P, As, etc. is converted into 1E11-1E22 / cm by energy of 10-200KeV (preferably 30-100KeV) using ion shower doping or ion implantation method. ³ (preferably 1E15-1E21 / cm ³ ) of doping, and when producing a P-MOS TFT, impurities such as B ₂ H ₆ , B, BH _3, etc., are charged at 1E11-1E22 with an energy of 20-70 KeV. doping with a dose of / cm ³ (preferably 1E14-1E21 / cm ³ ).

4 is a cross-sectional view of a metal layer 14 that induces MIC (Metal Induced Crystallization) or MILC of amorphous silicon after the silicon thin film is doped. Nickel (Ni), palladium (Pd), or cobalt (Co) is preferably used as the metal inducing MIC or MILC in amorphous silicon, but also Ti, Ag, Au, Al, Sn, Sb, Cu, Cr, Metals such as Mo, Tr, Ru, Rh, Cd, Pt can be used. MILC-derived metals such as nickel or palladium may be applied to amorphous silicon by sputtering, heat evaporation, PECVD or ion implantation, but sputtering is generally used. The thickness of the applied metal layer may be arbitrarily selected within the limits necessary to induce MIC or MILC of the amorphous conducting cone, and is formed to a thickness of about 1-10,000 mW, preferably 10-200 mW. In this process, since the channel region 11C is covered by the gate insulating film 12 and the gate electrode 13, the metal layer 14 is not applied to the channel region, and the metal layer is applied only to the source region 11S and the drain region 11D. do. Preferably, the gate insulating layer 12 is formed to have a wider width than the gate electrode 13. The metal layer 14 applied by using the gate insulating layer as a mask does not directly contact the channel region under the gate electrode, but is spaced apart from each other by a predetermined distance. Allow metal offset regions to be formed. The reason why the metal offset region is formed around the channel region is to prevent the crystallization inducing metal 14 from penetrating into and inside the channel region and deteriorating the operating characteristics of the thin film transistor such as off current. In addition, the gate insulating layer extending outside the sidewall of the gate electrode may be used as a mask to form a low concentration doped (LDD) region or an undoped region around the channel in the doping process.

FIG. 5 shows a process of applying a metal layer 14 on a substrate and then performing a heat treatment to crystallize the amorphous silicon to induce crystallization of the amorphous silicon and simultaneously activate impurities implanted in the source and drain regions of the silicon. This process uses a tungsten-halogen or xenon arc heating lamp to heat for a very short time using a rapid annealing (RTA) method or an excimer laser that heats for a short time within minutes at temperatures of 700 or 800 ^o C. Or the like may be used, preferably in a furnace at a temperature of 400-600 ^° C. for 0.1-50 hours, preferably 0.5-20 hours. The MIC source metal is directly applied in the source and drain regions of the active layer through heat treatment in the furnace, and crystallization is performed by MIC phenomenon, and the metal layer is applied in the source and drain regions and channel regions where the MILC source metal is not applied. Crystallized by MILC propagating from the part. Arrows of Figure 5 indicate the direction in which the MILC proceeds during the heat treatment process.

The metal layer applied to the gate insulating layer 12 and the gate electrode 13 is not affected by the heat treatment of FIG. 5, and the metal layer remains as it is. In addition, a part of the metal layer applied to the silicon thin film reacts with silicon to form silicide during the heat treatment, and part of the metal layer remains in a metal state. The metal layer is also deposited on the entire surface of the substrate other than the thin film transistor region. When a metal layer such as nickel is deposited on the substrate, even if the thickness of the metal layer is only a few tens of micrometers, the light transmittance of the substrate is greatly reduced, thereby causing a problem that the screen of a display device such as an LCD or an OELD becomes dark. In addition, if a metal component remains on the surface of the thin film transistor, there is a risk of causing current leakage between the source region, the drain region and the gate electrode of the active layer. Therefore, in order to improve the brightness of the display and prevent current leakage of the transistor in the thin film transistor panel used for the display, it is desirable to remove the metal layer after the crystallization heat treatment process of silicon.

6 shows a process of removing the metal layer by etching after the heat treatment. In the conventional process, an acidic etchant was used to remove the metal layer. Hereinafter, an example of the present invention will be described with reference to the case where nickel is used as the crystallization inducing metal. In the conventional process, in order to remove the metal layer deposited on the surface of the substrate and the thin film transistor, wet etching is usually performed using ferric chloride, 1HNO ₃ / 5HCl, 150CH ₃ COOH / 50HNO ₃ / 3HCl, or the like as an etching solution. .

However, these acid etchants are generally highly corrosive to metals, but nickel has very strong corrosion resistance to these acid etchant. On the other hand, metals such as Al, Mo, and MoW, which are used as gate electrodes, are less corrosion resistant than nickel, and corrosion is much faster than nickel by acidic etchant. Therefore, in order to completely remove the nickel layer deposited on the surface of the substrate by a conventional etching method, a long etching time is required, and in this process, corrosion of the gate electrode proceeds more than that of the nickel layer, resulting in a problem that the gate electrode 13 is damaged. do. In addition, if the etching time is shortened to prevent damage to the gate electrode, the nickel layer may not be removed or partially removed, thereby degrading image quality. Therefore, there is a need for an etching method that completely removes the nickel layer from the surface of the substrate but does not damage the gate electrode.

The present invention provides a method that can quickly remove the nickel layer without damaging the gate electrode to solve this technical problem. According to the present invention, a method of removing a metal layer from a substrate using an etching agent capable of etching an oxide including a glass substrate instead of a conventional etching agent is used. Etching methods used to etch substrates and oxide layers include wet etching using a dilute hydrofluoric acid (HF) solution, a buffered hydrofluoric acid solution consisting of a mixture of NH ₄ F and HF, and dry etching using carbon fluoride (CF ₄ ). There is a way. This etching method has conventionally been used in a cleaning process to remove impurities from a substrate. Such an etchant has a low corrosive effect on metals and silicon but has excellent corrosiveness on silicon oxide, silicon nitride (SiNx) and silicon oxynitride (SiOxNy).

When etching is performed using an etchant including hydrogen fluoride and carbon fluoride as shown in FIG. 6, the nickel layer deposited directly on the substrate surface is hardly affected by the gate electrode and the silicon thin film and the nickel layer deposited on the surface thereof. Etching of the substrate surface occurs and is removed together. The crystallization inducing metal on the surface of the substrate is usually formed to a thickness of several tens of microwatts so that the etchant can sufficiently pass through the metal layer to reach the surface of the substrate. Since a conventional glass substrate is composed of a silicon oxide component, the surface is rapidly etched by the etchant, and thus the metal layer deposited on the surface can be removed together. In addition, even when the buffer layer is formed of silicon oxide (SiO ₂ ), silicon nitride (SiNx), or silicon oxide nitride (SiOxNy) on the substrate as described above, the hydrogen fluoride or carbon fluoride-based etchant easily erodes the buffer layer. The metal layer formed on the buffer layer can be quickly removed. Thus, the present invention can be equally applied to the case of forming the buffer layer on the substrate and the case of not forming the buffer layer.

In the case of an active matrix LCD and an OELD including a thin film transistor, an opening is formed in a pixel transistor for each pixel region. If a metal layer such as nickel is deposited in the opening of the substrate to a thickness of tens to hundreds of microns, the light transmittance of the substrate is greatly reduced. Will be. Using the etching method of the present invention, the metal layer deposited on the substrate region forming the pixel openings may be quickly removed to increase the transmittance of the display device. On the other hand, the gate metal layer and the silicon thin film and the metal layer deposited thereon are not significantly affected by etching. Even if the metal layer remains in the gate metal layer and the silicon thin film, the operation of the thin film transistor is not affected. On the other hand, the gate electrode extends from the sidewall of the gate electrode to the outer side of the gate electrode, which is a LDD region in which a metal offset region is formed around the channel region as described above, and where no impurities are injected or a low concentration is injected. It is formed to form. Using the etching process of the present invention, erosion of the gate insulating layer extending outwardly and the metal layer deposited thereon occurs, and since the etching is performed after the metal deposition and the impurity implantation have already been completed, the extended portion of the gate insulating layer 22 is considerable. Erosion does not affect the operation of the thin film transistor. Rather, when the gate insulation layer is eroded, the metal layer deposited on the surface is also removed, thereby preventing current leakage between the source and drain regions and the gate electrode.

When the metal layer is removed, an insulating overcoat is formed on the substrate as shown in FIG. 7, and contact holes for electrical connection between the gate electrode, the source region, and the drain region are formed. Contact holes are usually formed by anisotropically etching the overcoat using a mask formed using photolithography techniques. The thin film transistor structure is completed by forming a contact electrode 16 providing electrical connection to the thin film transistor through the contact hole. The contact electrode is formed by depositing a conductive material such as metal or doped polysilicon to a thickness of 500-10,000 kPa, preferably 2,000-6,000 kPa, throughout the contact insulating layer using a method such as sputtering, heat evaporation, or CVD. The material is formed by patterning the material into a desired shape by dry or wet etching.

While the content of the present invention has been described by way of examples, the embodiments of the present invention are merely illustrative of the present invention and should not be construed as limiting the scope of the present invention. Those skilled in the art to which the present invention pertains may modify or alter the present invention in various forms within the principles and scope described in the claims herein. Therefore, the scope of the present invention should be construed to include the matter described in the appended claims and equivalent areas thereof.

The present invention applies the etching method used for the oxide etching to the crystalline silicon manufacturing process using MILC, it is possible to quickly and effectively remove only the crystallization-inducing metal layer deposited on the substrate without affecting other metal parts such as gate metal It works. Removing the metal layer from the substrate has the advantage of increasing the brightness and uniformity of the screen compared to the conventional process that does not remove the metal layer. In addition, according to the present invention there is an effect that can improve the insulation between the gate electrode and the source and drain regions of the thin film transistor.

1 is a cross-sectional view showing a state in which an amorphous silicon island is formed on a substrate.

2 is a view illustrating a state in which a gate insulating layer and a gate electrode are formed in an amorphous silicon island.

3 is a view showing a process of injecting impurities into a silicon thin film.

4 is a view showing a state in which a crystallization induction metal is deposited on a substrate and a thin film transistor.

5 is a view showing a state of performing a crystallization heat treatment.

6 is a view showing a process for removing a crystallization-induced metal layer in accordance with the present invention.

7 is a view showing a state in which an overcoat and a contact electrode are formed in a transistor.

Claims (7)

A method of manufacturing a thin film transistor having a silicon active layer formed on a transparent substrate and having a gate insulating layer and a gate electrode formed on the silicon active layer, The silicon active layer is crystallized by depositing a metal layer inducing silicon crystallization in amorphous silicon and performing a heat treatment, and the substrate surface using an etchant comprising hydrogen fluoride (HF) or carbon fluoride (CF ₄ ) A portion of the gate is selectively etched to remove the metal layer from a substrate surface, the gate insulating layer extends outward from a sidewall of the gate electrode, and a portion of the gate insulating layer is selectively etched during the etching of the substrate, thereby A thin film transistor manufacturing method, characterized in that the metal layer deposited on the insulating layer is also removed. The method of claim 1, wherein the substrate is made of glass or quartz. delete The method of claim 1, wherein the crystallization inducing metal comprises one of nickel (Ni), palladium (Pd), and cobalt (Co). delete delete The method of claim 1, wherein a buffer layer is formed of silicon oxide, silicon nitride, or silicon oxide nitride on the surface of the substrate prior to forming the silicon active layer, and the buffer layer is eroded during the etching process to remove the metal layer applied to the surface of the buffer layer. Method of manufacturing a thin film transistor, characterized in that.