KR100508929B1 - Plasma display panel and driving apparatus thereof - Google Patents

Abstract

The present invention relates to a plasma display panel and a driving apparatus thereof. A driving device of a plasma display panel according to the present invention includes a rising switching unit for increasing the voltage of the panel capacitor; A polling switching unit for reducing the voltage of the panel capacitor; A sustain discharge switching unit for applying a voltage for sustain discharge to the panel capacitor; A ground switching unit for applying a ground voltage to the panel capacitor; And first and second diode units connected in series to the rising switch unit and the polling switch unit, respectively, wherein the rising switch unit, the first diode, the polling switch unit, and the second diode are disposed on one heat sink. . In this way, the parasitic inductance component formed in the large current path can be removed by reducing the number of semiconductor elements included in the driving circuit by using a large capacity semiconductor element.

Description

Plasma display panel and its driving device {PLASMA DISPLAY PANEL AND DRIVING APPARATUS THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP), and more particularly to a plasma display panel and a driving circuit thereof.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel have been actively developed. Among these flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Therefore, the plasma display panel is in the spotlight as a display device to replace a conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display panel is classified into a direct current type and an alternating current type according to a shape of a driving voltage waveform applied and a structure of a discharge cell.

In the DC plasma display panel, the electrode is exposed without the discharge space insulated, so that the current flows in the discharge space while the voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made. On the other hand, in the AC plasma display panel, since the electrode covers the dielectric layer, the current is limited by the formation of a natural capacitance component, and the life is longer than that of the DC type because the electrode is protected from the impact of ions during discharge.

In such an AC plasma display panel, scan electrodes and sustain electrodes parallel to each other are formed on one surface thereof, and address electrodes are formed on the other surface in a direction orthogonal to these electrodes. The sustain electrode is formed corresponding to each scan electrode, and one end thereof is connected in common to each other.

In general, the driving method of the AC plasma display panel includes a reset period, an addressing period, a sustain period, and an erase period.

The reset period is a period of initializing the state of each cell in order to perform an addressing operation smoothly on the cell. The addressing period is an address voltage for a cell (addressed cell) turned on to select a cell that is turned on and a cell that is not turned on in a panel. It is a period of time to perform the operation of accumulating wall charge by applying a. The sustain period is a period in which discharge for actually displaying an image is performed on the addressed cell by applying a sustain discharge voltage pulse, and the erase period is a period in which the wall discharge of the cell is reduced to end the sustain discharge.

At this time, since the discharge space between the scan electrode and the sustain electrode, the surface where the address electrode is formed, and the surface where the scan and sustain electrode are formed acts as a capacitive load (hereinafter, referred to as a panel capacitor), capacitance is present in the panel. . Therefore, in order to apply the waveform and sustain discharge voltage pulse for addressing, reactive power is required in addition to the power for addressing and sustain discharge. Therefore, the driving circuit of the plasma display panel generally includes a power recovery circuit that recovers and reuses reactive power. As such a power recovery circuit, L.F. There is a circuit proposed by Weber (US Pat. Nos. 4,866,349 and 5,081,400).

In the case of using the power recovery circuit, a plurality of semiconductor elements are connected in parallel to withstand a large discharge current and a current of the power recovery circuit.

1A and 1B show a sustain discharge drive circuit including such a conventional power recovery circuit and a layout of each element.

However, as shown in FIGS. 1A and 1B, when a plurality of semiconductor devices are connected in parallel, parasitic inductance components are formed on a discharge current and a resonance current path. This parasitic inductance component causes distortion in the driving waveform, deteriorates the discharge characteristics of the PDP, and reduces the sustain discharge voltage margin. In addition, the problems caused by these parasitic inductances become more serious as the panel size increases.

In addition, if the number of semiconductor elements is large, as many heat sinks 1 to 6 are used, not only the arrangement of the elements is difficult but also the size of the board is increased.

In addition, due to the skin effect of the electrode pattern formed on the printed circuit board (PCB), a current imbalance problem occurs in which a current is concentrated in a device located at an outer side of the semiconductor device connected in parallel without a discharge current flowing evenly. Decreases the reliability.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display panel and a driving apparatus for reducing parasitic inductance components present on a large current path of a PDP driving circuit by constructing a PDP circuit using a large capacity semiconductor device.

In order to achieve the above technical problem, a driving apparatus of a plasma display panel for applying a driving waveform to a panel capacitor according to a feature of the present invention,

And a switching device connected to the other end of the inductor to reduce the voltage of the panel capacitor, and connected between the panel capacitor and a first power supply for supplying a voltage for sustain discharge. A sustain discharge switching unit applying the sustain discharge voltage, a ground switching unit connected between the panel capacitor and a second power supply for supplying a ground voltage to apply the ground voltage to the panel capacitor, and a large capacity diode device, A first diode unit connected in series with the rising switching unit and a large capacity diode element, and a second diode unit connected in series with the polling switching unit,

The rising switching unit, the first diode unit, the polling switching unit, and the second diode unit are disposed on one heat sink.

In this case, the rising switching unit, the falling switching unit, the sustain discharge switching unit, and the ground switching unit each include two or less switching elements, and the first and second diode units each include two or less diode elements.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

A plasma display panel, a driving device, and a driving method thereof according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, a schematic structure of a plasma display panel device according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4. 2 is an exploded perspective view of a plasma display panel device according to an embodiment of the present invention, Figure 3 is a schematic plan view of a plasma panel according to an embodiment of the present invention. 4 is a schematic plan view of a chassis base according to an embodiment of the present invention.

As shown in FIG. 2, the plasma display panel device includes a plasma panel 10, a chassis base 20, a front case 30, and a rear case 40. The chassis base 20 is disposed on the opposite side of the surface on which the image is displayed on the plasma panel 10 and is coupled to the plasma panel 10. The front and rear cases 30 and 40 are disposed at the front of the plasma panel 10 and the rear of the chassis base 20, respectively, and are combined with the plasma panel 10 and the chassis base 20 to form a plasma display panel device. do.

Referring to FIG. 3, the plasma panel 10 includes a plurality of address electrodes A1-Am arranged in the column direction, and a plurality of scan electrodes Y1-Yn and a plurality of sustain electrodes arranged zigzag in the row direction. (X1-Xn). The sustain electrodes X1-Xn are formed corresponding to the scan electrodes Y1-Yn, and generally have one end connected in common with each other. The plasma panel 10 includes a glass substrate on which sustain and scan electrodes X 1 to X n and Y 1 to Y n are arranged, and a glass substrate on which address electrodes A 1 to Am are arranged. The two glass substrates are disposed to face each other with the discharge space therebetween so that the scan electrodes Y1-Yn and the address electrodes A1-Am and the sustain electrodes X1-Xn and the address electrodes A1-Am are orthogonal to each other. . At this time, the discharge space at the intersection of the address electrodes A1-Am and the sustain and scan electrodes X1-Xn and Y1-Yn forms the discharge cells 11.

As shown in FIG. 4, boards 100-600 necessary for driving the plasma panel 10 are formed in the chassis base 20. The address buffer board 100 is formed on the upper and lower portions of the chassis base 20, respectively, and may be formed of a single board or a plurality of boards. In FIG. 4, a plasma display panel device for dual driving is described as an example. However, in the case of a single driving, the address buffer board 100 is disposed at one of the upper and lower portions of the chassis base 20. The address buffer board 100 receives an address driving control signal from the image processing and logic board 500 and applies a voltage to each address electrode A1-Am to select a discharge cell to be displayed.

The scan and sustain drive boards 200 and 300 are disposed on the left and right sides of the chassis base 20, respectively, and the scan board 200 is electrically connected to the scan electrodes Y1-Yn via the scan buffer board 400. It is connected. The scan buffer board 400 performs an operation necessary for scanning the scan electrodes Y1-Yn. The scan and sustain drive boards 200 and 300 receive a sustain discharge signal from the image processing and logic board 500 and alternately input sustain discharge pulses to the scan and sustain electrodes Y1-Yn and X1-Xn. Then, sustain discharge occurs in the discharge cell selected by the input sustain discharge pulse. In FIG. 4, the scan and sustain drive boards 200 and 300 are separated and described, but the two boards 200 and 300 may be formed as a single board, and the scan buffer board 400 may also be the drive board 200. It may be formed integrally with.

The image processing and logic board 500 receives an image signal from the outside, generates an address driving control signal and a sustain discharge signal, and applies them to the address driving board 100 and the scan and sustain driving boards 200 and 300, respectively. The power supply board 600 supplies power for driving the plasma display panel device. The image processing and logic board 500 and the power board 600 are disposed in the center of the chassis base.

Hereinafter, the structure and device arrangement of the sustain driving circuit included in the sustain driving board 300 will be described in detail with reference to FIGS. 5A and 5B.

5A and 5B show the configuration of the sustain discharge drive circuit and the arrangement of elements on the sustain drive board, respectively, according to the embodiment of the present invention.

As shown in FIG. 5A, the sustain discharge driving circuit according to the exemplary embodiment of the present invention replaces a plurality of semiconductor devices that are conventionally connected in parallel with one large capacity semiconductor device. As such a large-capacity semiconductor device, the FET can use products such as IXYS's IXTK62N25 and IXTH75N15, and the diode can use a product such as IXYS's DSEK60-02A. In this way, parasitic inductance components conventionally generated by connecting a plurality of semiconductor elements in parallel can be removed.

In addition, as the number of devices decreases, the arrangement of the devices may be simplified as shown in FIG. 5B, and the size of the board may be reduced, thereby reducing the length of the entire large current path.

In addition, since the FET and the diode can be arranged together in one heat sink, that is, the rising switch and the diode can be arranged in the heat sink 710 and the polling switch and the diode in the heat sink 720 can be arranged. The parasitic inductance component generated in can be removed.

Although the address buffer board has been described in the embodiments of the present invention, the present invention can be applied to an output pattern formed on the scan and sustain drive boards connected to the scan and sustain electrodes in addition to the address buffer board.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

For example, in the embodiment of the present invention, the sustain driving circuit has been described, but the present invention can also be applied to the address driving circuit.

As described above, according to the present invention, the parasitic inductance component formed in the large current path can be removed by reducing the number of semiconductor devices included in the driving circuit by using a large capacity semiconductor device.

In addition, device placement is simplified and board size is reduced, thereby reducing the length of the entire large current path.

In addition, FETs and diodes can be used together in one heat sink, eliminating parasitic inductance between the FETs and diodes.

1A and 1B show a sustain discharge drive circuit including such a conventional power recovery circuit and a layout of each element.

2 is an exploded perspective view of a plasma display panel device according to an embodiment of the present invention.

3 is a schematic plan view of a plasma panel according to an embodiment of the present invention.

4 is a schematic plan view of a chassis base according to an embodiment of the present invention.

5A and 5B show the configuration of the sustain discharge drive circuit and the arrangement of elements on the sustain drive board, respectively, according to the embodiment of the present invention.

Claims (4)

In a driving device of a plasma display panel for applying a driving waveform to a panel capacitor, A rising switching unit including a large switching element and connected to the other end of the inductor having one end connected to the panel capacitor to increase the voltage of the panel capacitor; A polling switching unit including a large switching element and connected to the other end of the inductor to reduce a voltage of the panel capacitor; A sustain discharge switching unit connected between the panel capacitor and a first power supply for supplying a voltage for sustain discharge to apply the sustain discharge voltage to the panel capacitor; A ground switching unit connected between the panel capacitor and a second power supply for supplying a ground voltage to apply the ground voltage to the panel capacitor; A first diode unit including a large capacity diode device, the first diode unit being connected in series to the rising switching unit; And It includes a large-capacity diode device, and includes a second diode unit connected in series with the polling switching unit, The rising switching unit, the first diode unit, the polling switching unit, and the second diode unit are each disposed on one heat sink. Driving device of the plasma display panel. The method of claim 1, The rising switching unit, the falling switching unit, the sustain discharge switching unit and the ground switching unit each include two or less switching elements, The first and second diode units each include two or less diode elements. Driving device of the plasma display panel. A plasma panel including a plurality of address electrodes, a plurality of scan and sustain electrodes arranged in pairs and parallel to each other, wherein a panel capacitor is formed between the address, scan and sustain electrodes, and a driving signal on the scan, sustain and address electrodes It includes a driving circuit for supplying, The drive circuit, A rising switching unit including a large switching element and connected to the other end of the inductor having one end connected to the panel capacitor to increase the voltage of the panel capacitor; A polling switching unit including a large switching element and connected to the other end of the inductor to reduce a voltage of the panel capacitor; A sustain discharge switching unit connected between the panel capacitor and a first power supply for supplying a voltage for sustain discharge to apply the sustain discharge voltage to the panel capacitor; A ground switching unit connected between the panel capacitor and a second power supply for supplying a ground voltage to apply the ground voltage to the panel capacitor; A first diode unit including a large capacity diode device, the first diode unit being connected in series to the rising switching unit; And It includes a large-capacity diode device, and includes a second diode unit connected in series with the polling switching unit, The rising switching unit, the first diode unit, the polling switching unit, and the second diode unit are each disposed on one heat sink. Plasma display panel. The method of claim 3, The rising switching unit, the falling switching unit, the sustain discharge switching unit and the ground switching unit each include two or less switching elements, The first and second diode units each include two or less diode elements. Plasma display panel.