KR100459738B1 - 향상된타이머성능을가진집적회로입력/출력프로세서 - Google Patents

향상된타이머성능을가진집적회로입력/출력프로세서 Download PDF

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Publication number
KR100459738B1
KR100459738B1 KR1019960053573A KR19960053573A KR100459738B1 KR 100459738 B1 KR100459738 B1 KR 100459738B1 KR 1019960053573 A KR1019960053573 A KR 1019960053573A KR 19960053573 A KR19960053573 A KR 19960053573A KR 100459738 B1 KR100459738 B1 KR 100459738B1
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KR
South Korea
Prior art keywords
channel
timebase
timer
bus
pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019960053573A
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English (en)
Korean (ko)
Other versions
KR970028966A (ko
Inventor
버나드 골러 버논
린 밀러 게리
리베라 데이빗
Original Assignee
모토로라 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication of KR970028966A publication Critical patent/KR970028966A/ko
Application granted granted Critical
Publication of KR100459738B1 publication Critical patent/KR100459738B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Electronic Switches (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
KR1019960053573A 1995-11-13 1996-11-13 향상된타이머성능을가진집적회로입력/출력프로세서 Expired - Fee Related KR100459738B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US555,456 1995-11-13
US08/555,456 US5634045A (en) 1995-11-13 1995-11-13 Integrated circuit input/output processor having improved timer capability

Publications (2)

Publication Number Publication Date
KR970028966A KR970028966A (ko) 1997-06-26
KR100459738B1 true KR100459738B1 (ko) 2005-04-19

Family

ID=24217325

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960053573A Expired - Fee Related KR100459738B1 (ko) 1995-11-13 1996-11-13 향상된타이머성능을가진집적회로입력/출력프로세서

Country Status (6)

Country Link
US (1) US5634045A (enExample)
EP (1) EP0773491A3 (enExample)
JP (1) JPH09146779A (enExample)
KR (1) KR100459738B1 (enExample)
CN (1) CN1159619A (enExample)
TW (1) TW309603B (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812833A (en) * 1995-11-13 1998-09-22 Motorola, Inc. Timer bus structure for an integrated circuit
US6233636B1 (en) 1998-12-03 2001-05-15 International Business Machines Corporation Method and system for allowing PCI bus transactions to be performed at higher operating frequencies
GB2369751A (en) * 2000-11-30 2002-06-05 Nokia Mobile Phones Ltd Communication of data
US7024579B2 (en) * 2002-08-27 2006-04-04 Stmicroelectronics S.R.L. Configurable timing system having a plurality of timing units interconnected via software programmable registers
JP4994254B2 (ja) * 2007-03-08 2012-08-08 ルネサスエレクトロニクス株式会社 データプロセッサ及び制御システム
KR102683747B1 (ko) * 2019-01-22 2024-07-11 에스케이하이닉스 주식회사 반도체 메모리 장치
US11366488B1 (en) 2021-05-20 2022-06-21 Nxp Usa, Inc. Timer for use in an asymmetric mutli-core system
CN115047852A (zh) * 2022-06-16 2022-09-13 神龙汽车有限公司 一种车辆软件刷写方法和系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0355363A2 (en) * 1988-08-19 1990-02-28 Motorola, Inc. Integrated circuit timer with multiple channels and dedicated service processor
US4952367A (en) * 1988-08-19 1990-08-28 Motorola, Inc. Timer channel for use in a multiple channel timer system
US5129078A (en) * 1988-08-19 1992-07-07 Groves Stanley E Dedicated service processor with inter-channel communication features
US5535376A (en) * 1993-05-18 1996-07-09 Motorola, Inc. Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06103507B2 (ja) * 1984-11-02 1994-12-14 株式会社日立製作所 パルス入出力プロセッサ及びそれを用いたマイクロコンピュータ
US5042005A (en) * 1988-08-19 1991-08-20 Motorola, Inc. Timer channel with match recognition features
US4942522A (en) * 1988-08-19 1990-07-17 Motorola, Inc. Timer channel with multiple timer reference features
US5117498A (en) * 1988-08-19 1992-05-26 Motorola, Inc. Processer with flexible return from subroutine

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0355363A2 (en) * 1988-08-19 1990-02-28 Motorola, Inc. Integrated circuit timer with multiple channels and dedicated service processor
US4952367A (en) * 1988-08-19 1990-08-28 Motorola, Inc. Timer channel for use in a multiple channel timer system
US5129078A (en) * 1988-08-19 1992-07-07 Groves Stanley E Dedicated service processor with inter-channel communication features
US5535376A (en) * 1993-05-18 1996-07-09 Motorola, Inc. Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor

Also Published As

Publication number Publication date
EP0773491A3 (en) 1998-11-04
EP0773491A2 (en) 1997-05-14
KR970028966A (ko) 1997-06-26
CN1159619A (zh) 1997-09-17
TW309603B (enExample) 1997-07-01
US5634045A (en) 1997-05-27
JPH09146779A (ja) 1997-06-06

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