KR100450087B1 - Method of manufacturing lead frame used for power transistor - Google Patents

Method of manufacturing lead frame used for power transistor Download PDF

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Publication number
KR100450087B1
KR100450087B1 KR1019970002952A KR19970002952A KR100450087B1 KR 100450087 B1 KR100450087 B1 KR 100450087B1 KR 1019970002952 A KR1019970002952 A KR 1019970002952A KR 19970002952 A KR19970002952 A KR 19970002952A KR 100450087 B1 KR100450087 B1 KR 100450087B1
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South Korea
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lead frame
lead
power transistor
metal material
manufacturing
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KR1019970002952A
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Korean (ko)
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KR19980067080A (en
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여민구
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삼성테크윈 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: A method for fabricating a lead frame of a power transistor is provided to reduce burrs generated from an end part of the lead frame in a stamping process of two parts having a height different. CONSTITUTION: A loading process is performed to load a metal material(22) having a first part(24) and a second part(25) corresponding to each thickness of a pad part and a lead part, an inclined part(26) formed between the first part and the second part. A stamping process is performed to form a desired pattern by using a die(31) installed on a bottom face of the metal material. In the stamping process, a contact part(37) of a punch(33) is in contact with the metal material.

Description

전력용 트랜지스터의 리드프레임 제작방법{Method of manufacturing lead frame used for power transistor}Method for manufacturing lead frame of power transistors {Method of manufacturing lead frame used for power transistor}

본 발명은 전력용 트랜지스터의 리드프레임의 제조방법에 관한 것으로서, 상세하게는 두께가 다른 이형소재의 타발시 버(burr) 발생이 저감되는 전력용 트랜지스터의 리드프레임의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a lead frame of a power transistor, and more particularly, to a method for manufacturing a lead frame of a power transistor in which burr generation of a release material having a different thickness is reduced.

통상적으로 반도체소자는 반도체 칩과, 리이드 프레임과, 와이어와, 반도체 칩을 둘러싸는 수지 고정체를 구비한다.Typically, a semiconductor device includes a semiconductor chip, a lead frame, a wire, and a resin fixture surrounding the semiconductor chip.

리이드 프레임(lead frame)은 반도체 칩을 독립된 하나의 부품으로서 지지해주는 동시에, 반도체 칩의 내부에 형성된 전자 회로의 기능을 외부 회로에 전기적으로 접속시키는 역할을 한다. 리이드 프레임은 반도체 칩이 그 위에 지지되는 패드(pad)와, 반도체 칩과 와이어 본딩되는 인너 리이드(inner lead)와, 상기 인너 리이드와 외부 회로 사이를 상호 연결시키는 아우터 리이드(outer lead)로 구분할 수 있다. 리이드 프레임의 제조방식은 크게 금형을 이용하여 프레스로 타발하는 스탬핑(stamping) 방식과 화학적 부식 방법을 이용한 에칭(etching) 방식이 있다.A lead frame serves to support the semiconductor chip as an independent component and to electrically connect the functions of the electronic circuit formed inside the semiconductor chip to the external circuit. The lead frame may be divided into a pad on which the semiconductor chip is supported, an inner lead wire-bonded with the semiconductor chip, and an outer lead interconnecting the inner lead and an external circuit. have. The manufacturing method of the lead frame is largely divided into a stamping method, which is punched by a press using a mold, and an etching method using a chemical corrosion method.

스탬핑 방식은 대량생산에 적합하고, 리드선의 개수가 작은 반도체소자용에 적합하여 트랜지스터용 리드프레임 제작에 주로 이용된다. 스탬핑 방식에 따른 리이드 프레임 제조방법은 소재를 다이위에 올려놓고, 스트리퍼(stripper)를 이용하여 소재를 고정시킨후, 프레스를 이용하여 소재를 타발함으로써 소정 패턴의 리이드 프레임을 형성하는 것이다.The stamping method is suitable for mass production, is suitable for semiconductor devices having a small number of lead wires, and is mainly used for manufacturing lead frames for transistors. According to the method of manufacturing a lead frame according to a stamping method, a lead frame of a predetermined pattern is formed by placing a material on a die, fixing the material using a stripper, and then punching the material using a press.

도 1a은 스탬핑 공정을 거친 전력용 트랜지스터의 리드프레임의 평면도이고, 도 1b는 도1의 전력용 트랜지스터의 리드프레임의 측면도이다.1A is a plan view of a lead frame of a power transistor that has undergone a stamping process, and FIG. 1B is a side view of the lead frame of the power transistor of FIG.

이를 참조하면, 리드프레임(10)은 반도체 칩이 올려지는 패드부(11)와 반도체 칩과 와이어 본딩되는 3개의 인너 리드(12) 및 아우터 리드(13)로 된 리드부(14)를 갖는다.Referring to this, the lead frame 10 has a pad portion 11 on which a semiconductor chip is placed, and a lead portion 14 including three inner leads 12 and an outer lead 13 wire-bonded with the semiconductor chip.

이와 같은 전력용 트랜지스터의 리드프레임(10)은 전력에 비례해 반도체 칩에서 발생되는 열을 효과적으로 방출하기 위하여 설정된 열용량과 관련하여 직사각형 형상의 패드부(11)의 두께(t1)가 결정된다. 이와 같은 이유 때문에 패드부(11)와 리드부(14)의 두께(t2)에 차이가 있다.In the lead frame 10 of the power transistor, the thickness t1 of the pad portion 11 having a rectangular shape is determined in relation to a heat capacity set in order to effectively release heat generated from a semiconductor chip in proportion to power. For this reason, the thickness t2 of the pad portion 11 and the lead portion 14 is different.

도 2는 종래의 전력용 트랜지스터의 리드프레임의 스탬핑 제조공정을 설명하기 위한 도면이다.2 is a view for explaining the stamping manufacturing process of the lead frame of the conventional power transistor.

이를 참조하여 스탬핑 제조공정을 설명하면, 프레스의 다이(21) 위에 로딩된 금속소재(22)를 펀치(23)가 승하강 하면서 타발하여 펀치(23)의 형상에 대응되는 소정 형상의 리드프레임을 제조한다.Referring to the stamping manufacturing process with reference to this, the punching material is punched down by lifting the metal material 22 loaded on the die 21 of the press to form a lead frame having a predetermined shape corresponding to the shape of the punch 23. Manufacture.

이와 같은 제조공정에서, 두께가 다른 이형 금속소재(22)에 대해서 도 1a의 A부분 즉 패드부와 인너리드에 대응되는 단층부분인 계단부(26)를 가로질러 타발될 부분이 한 번의 펀칭작업에 의해 이루어질 때 펀치(23)의 접촉부(27)가 평면형상으로 되어 있기 때문에 하강시 패드부에 대응되는 제1부분(24)과 먼저 접촉한다. 따라서, 리드부에 대응되는 제2부분(25)의 상면에 해당하는 깊이 까지 제1부분(24)의 타발될 부분을 밀어내는 과정에서 팽창되는 소재의 일정량이 제2부분(25)으로 이동되어 타발 완료 후에 제2부분(25)의 박리된 단부에 버가 많이 발생되는 문제점이 있다. 이와 같이 발생된 버는 또한 쉽게 이탈되기 때문에 연속적으로 피딩되는 타발된 금속소재에 이탈된 버의 가루가 묻어나와 제품을 오염시키는 문제점이 있다.In this manufacturing process, the punching operation is performed once for the release metal material 22 having a different thickness, that is, the portion to be punched across the step portion 26, which is a portion A of FIG. Since the contact portion 27 of the punch 23 is in a planar shape when it is made by, the first portion 24 corresponding to the pad portion is first contacted when descending. Therefore, a predetermined amount of expanded material is moved to the second portion 25 in the process of pushing the portion to be punched out of the first portion 24 to a depth corresponding to the upper surface of the second portion 25 corresponding to the lead portion. There is a problem that a lot of burrs are generated at the peeled end of the second portion 25 after completion of the punching. Since the burrs thus generated are also easily separated, there is a problem in that the powder of the burrs separated from the continuously punched metal material is fed and contaminates the product.

본 발명은 상기와 같은 문제점을 개선하기 위하여 창안된 것으로서, 두께가 다른 이형소재의 단층부분을 가로지르는 소정부분을 타발시 버 발생을 저감시키는 전력용 트랜지스터의 리드프레임 제조방법을 제공하는데 그 목적이 있다.The present invention has been made to improve the above problems, and provides a method for manufacturing a lead frame of a power transistor for reducing the occurrence of burrs at a predetermined portion across a single layer portion of a different material having a different thickness. have.

도 1a은 스탬핑 공정을 거친 전력용 트랜지스터의 리드프레임의 평면도이고,1A is a plan view of a lead frame of a power transistor that has undergone a stamping process,

도 1b는 도1의 전력용 트랜지스터의 리드프레임의 측면도이고,FIG. 1B is a side view of the lead frame of the power transistor of FIG. 1,

도 2는 종래의 전력용 트랜지스터의 리드프레임의 스탬핑공정을 설명하기 위한 도면이고,2 is a view for explaining the stamping process of the lead frame of the conventional power transistor,

도 3은 본 발명에 따른 전력용 트랜지스터의 리드프레임의 스탬핑공정을 설명하기 위한 도면이다.3 is a view illustrating a stamping process of a lead frame of a power transistor according to the present invention.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

10: 리드프레임 11: 패드부10: lead frame 11: pad portion

12: 인너리드(inner lead) 13: 아우터리드(outer lead)12: inner lead 13: outer lead

14: 리드부 21, 31: 다이(die)14: lead portions 21, 31: die

22: 금속소재 23, 33: 펀치22: metal material 23, 33: punch

24: 제1부분 25: 제2부분24: first part 25: second part

26: 계단부 27, 37: 접촉부26: step portion 27, 37: contact portion

상기의 목적을 달성하기 위하여 본 발명에 따른 전력용 트랜지스터의 리드프레임 제조방법은 칩이 탑재되는 패드부 및 상기 칩과 전기적으로 연결되는 것으로서 상기 패드부와 두께가 다른 리드부를 갖는 전력용 트랜지스터의 리드프레임 제조방법에 있어서, 상기 패드부와 상기 리드부 각각의 두께에 대응되는 제1부분과 제2부분이 그 경계선상에서 단층이 진 계단부를 갖는 금속소재를 로딩하는 로딩단계; 및 수직 승하강되면서 상기 금속소재와 접촉하는 펀치의 접촉부가 상기 계단부의 굴곡형상과 대응하는 형상으로 되어 상기 금속소재 하부에 마련된 다이를 통해 소망하는 패턴을 타발하는 스탬핑 단계;를 포함하는 것을 그 특징으로 한다.In order to achieve the above object, a method of manufacturing a lead frame of a power transistor according to the present invention includes a pad portion on which a chip is mounted and a lead of a power transistor having a lead portion having a thickness different from that of the pad portion as being electrically connected to the chip. A frame manufacturing method comprising: a loading step of loading a metal material having a stepped portion having a single layer on a boundary between a first portion and a second portion corresponding to a thickness of each of the pad portion and the lead portion; And a stamping step of punching a desired pattern through a die provided in the lower portion of the metal material as the contact portion of the punch vertically descending and the contact portion of the punch contacting the metal material has a shape corresponding to the curved shape of the step portion. It is done.

이하 첨부된 도면을 참조하여 본 발명의 바람직한 실시예에 따른 전력용 트랜지스터의 리드프레임 제조방법을 상세하게 설명한다.Hereinafter, a method of manufacturing a lead frame of a power transistor according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

도 3은 본 발명에 따른 전력용 트랜지스터의 리드프레임의 스탬핑공정을 설명하기 위한 도면이다.3 is a view illustrating a stamping process of a lead frame of a power transistor according to the present invention.

이를 참조하여 리드프레임 제조방법을 설명한다.A method of manufacturing a lead frame will be described with reference to this.

앞서 도시된 도면과 동일기능을 하는 요소에 대해서는 동일참조부호로 대신한다.Elements having the same function as the above-described drawings are replaced by the same reference numerals.

통상적으로 전력용 트랜지스터의 패드부의 두께는 1.3mm, 리드의 두께는 0.5mm로 적용된다. 따라서, 패드부와 리드부에 각각 해당하는 제1부분(24)과 제2부분(22)이 상호 다른 두께를 갖고, 상기 제1부분(24)과 제2부분(25)의 경계선상이 높이차이에 의한 계단부(26)를 갖는 금속소재(22) 예컨대 구리합금 또는 니켈합금소재로부터 소정의 형상을 갖는 리드프레임을 타발에 의해 제조하기 위해 스탬핑공정단계로 로딩한다.Typically, the thickness of the pad portion of the power transistor is 1.3mm, the thickness of the lead is applied to 0.5mm. Accordingly, the first portion 24 and the second portion 22 corresponding to the pad portion and the lead portion, respectively, have different thicknesses, and the height difference between the boundary portions of the first portion 24 and the second portion 25 is different. A lead frame having a predetermined shape from a metal material 22, for example, a copper alloy or a nickel alloy material having a stepped portion 26, is loaded into a stamping process step to manufacture by punching.

프레스의 다이(31)위치로 로딩된 금속소재(22)는 프레스의 펀치(33)가 승하강 하면서 소정형상으로 타발하는 스탬핑단계를 거쳐 리드프레임을 제작하는데 이때, 도시된 바와 같이 프레스에 마련된 펀치(33)의 저면인 접촉부(37)가 로딩된 금속소재(22)의 계단부(26)와 대응되는 형상으로 되어있기 때문에 수직하강시 금속소재(22)의 계단부(26) 및 제2부분(25)의 상면 일부와 제1부분(24)의 상면 일부가 동시에 펀치(33)와 접촉되고, 접촉된 부분이 동시에 다이(31) 방향으로 밀려난다.The metal material 22 loaded to the position of the die 31 of the press is manufactured through a stamping step in which the punch 33 of the press is punched down and punched into a predetermined shape to produce a lead frame. Since the contact portion 37, which is the bottom of the 33, has a shape corresponding to that of the stepped portion 26 of the loaded metal material 22, the stepped portion 26 and the second portion of the metal material 22 during the vertical lowering. A portion of the upper surface of 25 and a portion of the upper surface of the first portion 24 are simultaneously in contact with the punch 33, and the contacted portion is pushed toward the die 31 at the same time.

따라서, 펀치(33)에 의한 타발시 제1부분(24)의 타발영역이 제2부분(25)으로 이입되는 것이 저감되어 타발완료되어 제2부분(25)으로부터 형성된 리드부의 단부에 버 발생이 저감된다.Accordingly, it is a punching area of the punching during the first part 24 by the punch 33 is reduced to be transfected with a second portion (25) completing the punching diver occurs in the lead portion end portion formed from a second portion 25 Is reduced.

이와 같은 스탬핑공정은 도 1a에 도시된 패턴형상과 대응되는 하나의 펀치(33)에 의해 수행되지 않고, 타발시 소재변형을 최대한 저감시키도록 타발될 다수의 부분에 대해 일정영역만을 담당하는 다수의 펀치(33)가 순차적으로 로딩라인상에 마련되어 프로그램화 된 순서에 따라 순차적으로 타발해 나간다. 도시된 예는도 1a의 A부분에 해당하는 부분을 타발하는 과정을 도시한 것이다.Such a stamping process is not performed by one punch 33 corresponding to the pattern shape shown in FIG. 1A, and a plurality of parts that cover only a predetermined area for a plurality of parts to be punched so as to minimize material deformation when punched. The punch 33 is sequentially provided on the loading line and punched out sequentially in the programmed order. The illustrated example illustrates a process of punching a portion corresponding to portion A of FIG. 1A.

상기 실시예에 의해 설명된 것은 전력용 트랜지스터의 리드프레임 제조방법에만 국한되지 않고, 상호 높이가 다른 부분을 가로질러 소정영역을 동시에 타발하는 스탬핑과정를 포함하는 타 부품의 제조시에도 적용될 수 있다는 것을 당 분야에서는 쉽게 알수 있다.What is described by the above embodiment is not limited to the method of manufacturing the lead frame of the power transistor, it can be applied also in the manufacture of other components including a stamping process of simultaneously punching a predetermined area across portions having different heights. It is easy to see in the field.

지금까지 설명된 바와 같이 본 발명에 따른 전력용 트랜지스터의 리드프레제조방법이 제공됨으로써, 높이차이가 다른 부분을 가로질러 타발하는 스탬핑공정에서 타발에 의해 소망하는 형상으로 제조되는 리드프레임의 단부에 버 발생이 저감된다.As described above, by providing a method of manufacturing a lead press of a power transistor according to the present invention, a burr is formed at an end portion of a lead frame manufactured to a desired shape by punching in a stamping process of punching across a different height difference. Occurrence is reduced.

Claims (1)

칩이 탑재되는 패드부 및 상기 칩과 전기적으로 연결되는 것으로서 상기 패드부와 두께가 다른 리드부를 갖는 전력용 트랜지스터의 리드프레임 제조방법에 있어서,In the method of manufacturing a lead frame of a power transistor having a pad portion on which a chip is mounted and a lead portion electrically connected to the chip, the lead portion having a thickness different from that of the pad portion, 상기 패드부와 상기 리드부 각각의 두께에 대응되는 제1부분과 제2부분이 그 경계선상에서 단층이 진 계단부를 갖는 금속소재를 로딩하는 로딩단계; 및Loading a metal material having a first step and a second part corresponding to a thickness of each of the pad part and the lead part having a stepped part having a single layer on a boundary line thereof; And 수직 승하강되면서 상기 금속소재와 접촉하는 펀치의 접촉부가 상기 계단부의 굴곡형상과 대응하는 형상으로 되어 상기 금속소재 하부에 마련된 다이를 통해 소망하는 패턴을 타발하는 스탬핑 단계;를 포함하는 것을 특징으로 하는 전력용 트랜지스터의 리드프레임 제조방법.And a stamping step of punching a desired pattern through a die provided in the lower portion of the metal material as the contact portion of the punch contacting the metal material while being vertically raised and lowered corresponds to the curved shape of the step portion. Leadframe manufacturing method of power transistor.
KR1019970002952A 1997-01-31 1997-01-31 Method of manufacturing lead frame used for power transistor KR100450087B1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910009944U (en) * 1989-11-24 1991-06-29 현대전자산업 주식회사 Punch for cutting the dam bar of the lead frame
KR950007356U (en) * 1993-08-26 1995-03-21 Punch Guide of Mold for Lead Frame Forming
JPH088380A (en) * 1994-06-21 1996-01-12 Mitsui High Tec Inc Lead punching mold and lead punching method
KR960009286U (en) * 1994-08-17 1996-03-16 Preheating device of battery for electric vehicle
JPH08306837A (en) * 1995-04-28 1996-11-22 Hitachi Cable Ltd Lead frame for transistor, press metal mold and depress working method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910009944U (en) * 1989-11-24 1991-06-29 현대전자산업 주식회사 Punch for cutting the dam bar of the lead frame
KR950007356U (en) * 1993-08-26 1995-03-21 Punch Guide of Mold for Lead Frame Forming
JPH088380A (en) * 1994-06-21 1996-01-12 Mitsui High Tec Inc Lead punching mold and lead punching method
KR960009286U (en) * 1994-08-17 1996-03-16 Preheating device of battery for electric vehicle
JPH08306837A (en) * 1995-04-28 1996-11-22 Hitachi Cable Ltd Lead frame for transistor, press metal mold and depress working method

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