KR100432665B1 - A driving method of plasma display panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel that can realize stabilization of a reset operation.

The driving method of the present invention is driven by dividing one frame into a plurality of subfields including a first subfield. The first subfield may include an initialization step of initializing a state of a discharge cell; A recording step of applying wall pulses to the address electrode and the scan electrode to select a cell which is turned on and a cell which is not turned on and accumulate wall charges in the cell which is turned on; A sustain step of discharging the selected cells by alternately applying sustain discharge pulses to the scan electrodes and sustain electrodes; And an erase step of applying the erase pulse to the sustain electrode to reduce the wall charge of the discharge cell to terminate the sustain discharge. In this case, the sustain discharge pulse applied to the sustain step includes a first sustain discharge pulse having a normal width and a second sustain discharge pulse applied before the erase period and having a width longer than the first sustain discharge pulse.

Description

Driving Method of Plasma Display Panel {A DRIVING METHOD OF PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel (PDP), and more particularly, to a method of driving a plasma display panel capable of stabilizing a reset operation.

Recently, flat display devices such as liquid crystal displays (LCDs), field emission displays (FEDs), and PDPs have been actively developed. Among these flat panel display devices, PDPs have advantages of higher luminance and luminous efficiency and wider viewing angles than other flat panel display devices. Therefore, the PDP is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

1 is a partial perspective view of an AC plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first glass substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second glass substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first glass substrate 1 and the second glass substrate 6 have a discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. They are arranged to face each other. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

2 shows an electrode arrangement diagram of the plasma display panel.

As shown in Fig. 2, the PDP electrode has a matrix structure of m x n. Specifically, the address electrodes A1 to Am are arranged in the column direction, and the scan electrodes SCN1 to n rows in the row direction. SCNn and sustain electrodes SUS1 to SUSn are arranged in a zigzag. The discharge cell 12 shown in FIG. 2 corresponds to the discharge cell 12 shown in FIG.

In general, the driving method of the PDP is composed of a reset (initialization) period, a write (addressing) period, a sustain period, and an erase period.

The reset period is a period of initializing the state of each cell in order to perform an addressing operation smoothly on the cell, and the write period selects a wall cell on the panel (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on. This is the period during which the stacking operation is performed. The sustain period is a period in which discharge for actually displaying an image is performed on the addressed cell, and the erase period is a period in which the wall discharge of the cell is reduced to end the sustain discharge.

3 shows a drive waveform timing diagram of a panel driving method according to the prior art. As shown in Fig. 3, according to the driving method of the PDP, one frame includes a plurality of subfields, and each subfield includes an initialization period, a recording period, a sustain period, and an erase period. Hereinafter, an operation in one subfield will be described with reference to FIG. 3.

First, the initialization period will be described. In the first half of the initialization period, all the address electrodes A1 to Am and all the sustain electrodes SUS1 to SUSn are kept at 0V. The ramp voltage gradually rising from the voltage Vp (V) below the discharge start voltage to the sustain electrodes SUS1 to SUSn is applied to all the scan electrodes SCN1 to SCNn toward the voltage Vr (V) over the discharge start voltage. While this ramp voltage is rising, the first weak reset discharge occurs from the scan electrodes to the address electrodes and sustain electrodes in all the discharge cells. As a result, negative wall charges are accumulated on the surface of the protective film on the scan electrode. At the same time, positive wall charges are accumulated on the surface of the insulator on the address electrode and the surface of the protective film on the sustain electrode.

Subsequently, in the second half of the initialization period, all the sustain electrodes are held at the constant voltage Vh (V). All the scanning electrodes are supplied with a ramp voltage which falls gently toward 0 (V) over the discharge start voltage from the voltage Vq (V) which is less than or equal to the discharge start voltage. While this ramp voltage is falling, again, every second weak reset discharge occurs from the sustain electrode to the scan electrode. As a result, the negative wall voltage of the protective film surface on the scan electrode and the positive wall voltage of the protective film surface on the sustain electrode are weakened. Further, a weak discharge occurs between the address electrode and the scan electrode, and the positive wall voltage on the surface of the insulator layer on the address electrode is adjusted to a value suitable for the write operation. In this way, the reset operation of the initialization period is completed.

In the next writing period, all scan electrodes are held at Vs (V) first. The positive write pulse voltage + Vw (V) is applied to the predetermined address electrode Aj (an integer of j = 1 to m) corresponding to the discharge cell to be displayed on the first row of the address electrodes, and the scan electrode SCN1 of the first row is provided. Scan pulse voltages of 0 (V) are applied simultaneously. At this time, the voltage between the surface of the insulator layer at the intersection of the predetermined address electrode Aj and the scan electrode SCN1 and the surface of the protective film on the scan electrode SCN1 is a positive wall of the surface of the insulator layer on the address electrode at the write pulse voltage + Vw (V). The voltage is added up. Therefore, at the intersection thereof, a write discharge occurs between the predetermined address electrode Aj and the scan electrode SCN1 and between the sustain electrode SUS1 and the scan electrode SCN1. Therefore, a positive wall voltage is accumulated on the surface of the protective film on the scanning electrode SCN1 at this intersection, a negative wall voltage is accumulated on the surface of the protective film on the sustain electrode SUS1, and a negative wall voltage is accumulated on the surface of the insulator layer on the address electrode Dj. do. This writing process is performed for every row.

When the recording period ends, the retention period continues. In the sustain period, all address electrodes and sustain electrodes are set to 0 (V), and a positive sustain pulse + Vm (V) is applied to all scan electrodes. At this time, the voltage between the surface of the protective film on the scan electrode SCNi (an integer of i = 1 to n) and the surface of the protective film on the sustain electrode in the discharge cell which caused the recording discharge is accumulated in the sustain pulse voltage (Vm) and in the recording period. The positive wall voltage accumulated on the surface of the protective film on the scanning electrode SCNi and the negative wall voltage accumulated on the surface of the protective film on the sustain electrode SUSi are added, and the discharge start voltage is exceeded. For this reason, sustain discharge occurs between the scan electrode and sustain electrode in the discharge cell which caused the write discharge. A negative wall voltage is accumulated on the surface of the protective film on the scan electrode in the discharge cell which caused this sustain discharge, and a positive wall voltage is accumulated on the surface of the protective film on the sustain electrode. Thereafter, the sustain pulse voltage applied to the scan electrode returns to 0 (V). Subsequently, a positive sustain pulse voltage + Vm (V) is applied to all sustain electrodes, and sustain discharge occurs between the scan electrode and the sustain electrode in the discharge cell which has undergone the write discharge as described above. Thereafter, sustain discharge is performed by alternately inputting a positive sustain pulse voltage to all scan electrodes and all sustain electrodes in the same manner. Visible light from the phosphor excited by this sustain discharge is used for display.

When the sustain period ends, a ramp voltage that rises slowly from 0 (V) to + Ve (V) is applied to all sustain electrodes in the erase period. At this time, in the discharge cell that caused the sustain discharge, the voltage between the protective film surface on the scan electrode and the protective film surface on the sustain electrode is the negative wall voltage of the protective film surface on the scan electrode appearing at the end of the sustain period and the protective film surface on the sustain electrode. This lamp voltage is added to the positive wall voltage. For this reason, a weak erase discharge occurs between the sustain electrode and the scan electrode in the discharge cell causing the sustain discharge, and the negative wall voltage of the protective film surface on the scan electrode and the positive wall voltage of the protective film surface on the sustain electrode are weakened. The discharge is stopped. In this way, the erase operation is completed.

The time taken for one frame of the panel is 16.67 msec. When one frame starts, it is started from the initialization period of the first subfield to the erasing period of the last subfield, and then the initialization period of the first subfield of the next frame is performed. do. However, after the erasing operation of the last subfield is completed, there is a rest period until the reset operation of the first subfield of the next frame starts. If this pause period becomes longer, it affects the reset discharge operation in the initialization period of the first subfield of the next frame. Therefore, it is advantageous to have a short rest period in order to secure the stability of the reset operation.

According to the conventional plasma display panel driving method shown in Fig. 3, since there is a rest period before the initialization period of the next subfield performed after the erasing operation in the previous subfield, Since no discharge occurs, the priming effect is much weakened. Therefore, in the initialization period of the next subfield, the reset discharge is not performed properly because the reset operation must be performed in a state in which the priming effect required for the reset discharge is weakened in the discharge space.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display panel driving method capable of realizing stabilization of a reset operation by eliminating instability of a reset operation generated when a pause period exists in a panel display driving process.

1 is a partial perspective view of an AC plasma display panel.

FIG. 2 shows an electrode arrangement diagram of the panel shown in FIG.

3 is a view showing a driving method of a conventional plasma display panel.

4 is a diagram illustrating a method of driving a plasma display panel according to a first embodiment of the present invention.

5 is a view showing a method of driving a plasma display panel according to a second embodiment of the present invention.

The driving method of the plasma display panel according to the characteristics of the present invention for achieving the above object is

A driving method of a plasma display panel including a plurality of address electrodes and a plurality of discharge cells formed at intersections of a plurality of scan electrodes and a sustain electrode arranged in pairs in a zigzag fashion. Drives divided into fields, each of the plurality of subfields includes an initialization period, a recording period, a sustain period, and an erase period.

At this time, the last subfield of the plurality of subfields,

An initialization step of initializing a state of the discharge cell; A write step of applying a write pulse to the address electrode and the scan electrode to accumulate wall charges in a cell that is turned on and a cell that is not turned on; A sustain step of discharging a selected cell by alternately applying sustain discharge pulses to the scan electrode and the sustain electrode; And an erase step of applying sustain pulses to the sustain electrodes to reduce wall charges of the discharge cells to terminate sustain discharges.

The sustain discharge pulse applied to the sustain step includes a first sustain discharge pulse having a normal width and a second sustain discharge pulse applied before the erase period and having a width longer than the first sustain discharge pulse.

In addition, the driving method according to the present invention

After the second sustain discharge pulse is applied, a third sustain discharge pulse greater than the width of the first sustain discharge pulse and smaller than the width of the second sustain discharge pulse may be applied.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

4 is a timing diagram illustrating a method of driving a plasma display panel according to a first embodiment of the present invention.

As shown in Fig. 4, one frame is composed of a plurality of subfields, and each subfield is divided into an initialization period, a recording period, a sustain period, and an erase period. In FIG. 4, only the last subfield of the n−1 th frame and the first frame of the n th frame are illustrated, and only the driving waveform of the scan electrode and the driving waveform of the sustain electrode are illustrated.

Since the descriptions of the initialization period and the recording period in FIG. 4 are almost similar to the previous description with reference to FIG. 3, only the sustain period and the erase period will be described below.

As shown in Fig. 4, according to the first embodiment of the present invention, in the sustain period, all the address electrodes (not shown) and the sustain electrodes are set to 0 (V), and then a positive sustain pulse + Vm ( V) is applied. At this time, the voltage between the surface of the protective film on the scan electrode SCNi and the surface of the protective film on the sustain electrode in the discharge cell that caused the recording discharge is applied to the sustain pulse voltage (Vm) and the surface of the protective film on the scan electrode SCNi accumulated in the recording period. The accumulated positive wall voltage and the negative wall voltage accumulated on the surface of the protective film on the sustain electrode SUSi are added to exceed the discharge start voltage. For this reason, sustain discharge occurs between the scan electrode and sustain electrode in the discharge cell which caused the write discharge. After that, 0 (V) is applied to the scan electrodes, and a positive sustain pulse voltage + Vm (V) is applied to all sustain electrodes. As a result, sustain discharges are generated between the scan electrodes and the sustain electrodes in the discharge cells which caused the write discharge. Happens.

After that, sustain discharge is performed by alternately inputting a positive sustain pulse voltage to all scan electrodes and all sustain electrodes in the same manner.

At this time, in the sustain period of the driving method according to the first embodiment of the present invention, as shown in FIG. 4, one of the sustain pulses applied to the sustain electrode of the last subfield is kept longer than the normal pulse, thereby completing the sustain period. Make the viewpoint almost the same as the previous subfield.

In Fig. 4, in the erasing period, a ramp voltage gradually rising from 0 (V) to + Ve (V) is applied to all the sustain electrodes, so that the sustain electrode is weak between the sustain electrode and the scan electrode in the discharge cell causing the sustain discharge. Cause an elimination discharge.

According to the first embodiment of the present invention, since one of the sustain pulses applied to the sustain electrode of the last subfield is kept long, the end point of the sustain electrode can be later than the conventional driving shown in FIG. After the erase period, the idle period between the initialization periods of the first subfield of the next frame can be removed or the width of the idle period can be minimized.

As described above, according to the first embodiment of the present invention, since the idle period can be eliminated or minimized between the erase period of the last subfield and the initialization period of the first next subfield of the next frame, the priming charge required for the initialization period is reduced. There is a sufficient effect that a stable reset operation can be performed.

Meanwhile, in the first embodiment of the present invention shown in FIG. 4, one of the pulses applied to the sustain electrode is kept longer than the normal pulse. In addition, the same effect may be achieved by maintaining two or more pulses longer than the normal pulse. Can be achieved. In addition, the same effect can be achieved even if one or more of the pulses applied to the scan electrodes in addition to the sustain electrodes are kept longer than the normal pulses.

5 is a timing diagram illustrating a method of driving a plasma display panel according to a second embodiment of the present invention.

The driving waveform according to the second embodiment of the present invention shown in Fig. 5 is almost the same as the driving waveform shown in Fig. 4, except that the scanning electrode is applied after the long sustain pulse applied to the sustain electrode of the last subfield. The only difference is that the interval of the pulse is larger than the interval of the normal scan pulse.

According to the driving method according to the first embodiment of the present invention shown in Fig. 4, while one of the sustain pulses is kept long to maintain wall charges, particles which assist in subsequent discharges such as space charge amount, priming charge, etc. in the discharge cell Are almost likely to disappear. Therefore, according to the second embodiment of the present invention, there is an effect that more stable discharge can be maintained by making the width of the next scan pulse of the sustain pulse kept longer than the normal pulse width.

Meanwhile, although the second embodiment of the present invention shown in FIG. 5 shows that one of the pulses applied to the sustain electrode is kept longer than the normal pulse, two or more pulses may be kept longer than the normal pulse. In addition, one or more pulses applied to the scan electrode may be kept longer than the normal pulse.

Hereinafter, embodiments of the present invention have been described, but the present invention is not limited only to the above-described embodiments, and of course, various other modifications and changes are possible.

For example, according to an exemplary embodiment of the present invention, a lamp pulse is applied to the sustain electrode as an erase pulse. For example, a narrow pulse as the erase pulse, a pulse lower than the sustain discharge voltage and wider than the width of the sustain discharge pulse. Or pulses of logarithmic waveforms may be used.

In addition, in the embodiment of the present invention, the pulse of the organic period is described using the last subfield as an example, but the above-described embodiment may be applied to other subfields as well.

Although an embodiment of the present invention has been described with reference to an AC plasma display panel, the present invention may be similarly applied to a DC panel.

As described above, according to the driving method of the plasma display panel according to the present invention, it is possible to realize the stabilization of the reset operation by eliminating the instability of the reset operation generated when there is an idle period in the panel display driving process.

Claims (6)

A driving method of a plasma display panel comprising a plurality of address electrodes and a plurality of discharge cells formed at intersections of a plurality of scan electrodes and a sustain electrode arranged in pairs in a zigzag fashion. One frame is divided into a plurality of subfields, and each of the plurality of subfields includes an initialization period, a recording period, a sustain period, and an erase period. The last subfield of the plurality of subfields, An initialization step of initializing a state of the discharge cell; A write step of applying a write pulse to the address electrode and the scan electrode to accumulate wall charges in a cell that is turned on and a cell that is not turned on; A sustain step of discharging a selected cell by alternately applying sustain discharge pulses to the scan electrode and the sustain electrode; And Applying an erase pulse to the sustain electrode to reduce the wall charge of the discharge cell to terminate the sustain discharge; The sustain discharge pulse applied to the sustain step includes a first sustain discharge pulse having a normal width and a second sustain discharge pulse applied before the erase period and having a width longer than the first sustain discharge pulse. A method of driving a plasma display panel. delete delete The method of claim 3, And the second sustain discharge pulse is applied at the end of the sustain period. The method of claim 3, And after the second sustain discharge pulse is applied, a third sustain discharge pulse greater than the width of the first sustain discharge pulse and smaller than the width of the second sustain discharge pulse is applied. The method of claim 5, And the second sustain discharge pulse is applied to the sustain electrode, and the third sustain discharge pulse is applied to the scan electrode.