KR100426491B1 - Method for forming storage node of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a storage node of a semiconductor device is provided to improve voltage tolerance of a capacitor and yield of a semiconductor device by eliminating a core oxide layer after a partial thickness of a polysilicon layer is firstly etched and by secondly etching the residual thickness of the polysilicon layer. CONSTITUTION: After an insulation layer(13) is formed on a silicon substrate(11) having a junction part(12), the insulation layer is patterned to expose the junction part so that a contact hole is formed. After the first polysilicon layer(14) is formed on the insulation layer to fill the contact hole, an oxide layer(15) is formed on the first polysilicon layer. After the oxide layer and the first polysilicon layer are sequentially formed on the resultant structure, the second polysilicon layer(16) is formed on the resultant structure. After the first blanket etch process is performed on the second polysilicon layer until the oxide layer is exposed, the exposed oxide layer is removed. The second blanket etch process is performed on the second polysilicon layer to form the second polysilicon spacer(16A).

Description

Method for forming charge storage electrode of semiconductor device

The present invention relates to a method of forming a charge storage electrode of a semiconductor device, and more particularly, to a method of forming a charge storage electrode of a semiconductor device having a cylinder structure.

In general, as memory devices, such as DRAM, are highly integrated, an area occupied by memory cells in a chip is rapidly reduced. However, a certain amount of capacitance per unit cell must be secured for the operation of the device. Therefore, a high level of process technology is developed to minimize the area occupied by the capacitor while maintaining the capacitance required for the cell operation. Reliability is a big problem.

In order to solve this problem, the charge storage electrode of the capacitor has to be formed in a three-dimensional three-dimensional structure such as a cylinder or fin type to increase the effective surface area or to develop a dielectric with improved dielectric properties. Development of dielectrics having characteristics is difficult to apply to the manufacturing of the device yet. A method of forming a charge storage electrode of a conventional semiconductor device having a cylinder structure will now be described with reference to FIGS. 1A to 1C.

1A to 1C are cross-sectional views of a device for describing a method of forming a charge storage electrode of a conventional semiconductor device.

1A illustrates that after forming the insulating film 3 on the silicon substrate 1 on which the junction part 2 is formed, the insulating film 3 is patterned to expose the junction part 2 to form a contact hole, and the contact hole is buried. It is sectional drawing of the state which formed the 1st polysilicon layer 4 on the said insulating film 3 as much as possible.

FIG. 1B shows that after forming the PSG film 5 on the first polysilicon layer 4, the PSG film 5 and the first polysilicon layer 4 are patterned and the second polysilicon layer is formed on the entire upper surface. It is sectional drawing of the state which formed (6).

FIG. 1C illustrates a second polysilicon spacer 6A on sidewalls of the PSG film 5 (FIG. 1B) and the first polysilicon layer 4 patterned by etching the second polysilicon layer (6 in FIG. 1B). Is a cross-sectional view of the PSG layer (5 in FIG. 1B) after the formation of the first polysilicon layer, and the second polysilicon layer 4 is overetched in order to prevent generation of debris during the entire etching of the first polysilicon layer 4. A sharp point (part A) is formed at the upper end of the 2 polysilicon spacer 6A. This is because the second polysilicon layer (6 of FIG. 1B) in which the sidewall of the PSG film (5 of FIG. 1B) and the second polysilicon layer (6 of FIG. 1B) of the junction portion is exposed to the outer portion during the front etching process. It is a phenomenon caused by etching later than), which induces the concentration of electrical stress during operation of the capacitor, thereby deteriorating the breakdown voltage characteristics of the capacitor.

Accordingly, the present invention provides a method for forming a charge storage electrode of a semiconductor device which can solve the above-mentioned disadvantages by first removing a core oxide layer after etching a part of the polysilicon layer and then etching the polysilicon layer having the remaining thickness. The purpose is to provide.

According to an aspect of the present invention, a contact hole is formed by forming an insulating film on a silicon substrate on which a junction is formed, and then patterning the insulating film to expose the junction, and the contact hole is embedded from the step. Forming an oxide film on the first polysilicon layer after forming a first polysilicon layer on the insulating film, and sequentially patterning the oxide film and the first polysilicon layer from the step, and then forming a second polysilicon on the entire upper surface thereof. Forming a silicon layer, first etching the second polysilicon layer from the step to the time when the oxide film is exposed, and then removing the exposed oxide film; and from the step, the second polysilicon layer Forming a second polysilicon spacer by secondary etching the front surface; It is made of PSG, the oxide film is characterized in that removed by wet etching.

1A to 1C are cross-sectional views of a device for explaining a method of forming a charge storage electrode of a conventional semiconductor device.

2A to 2D are cross-sectional views of devices for describing a method of forming a charge storage electrode of a semiconductor device according to the present invention.

Explanation of symbols on the main parts of the drawings

1 and 11: silicon substrates 2 and 12 junctions

3 and 13: insulating film 4 and 14: first polysilicon layer

5: PSG film 6 and 16: second polysilicon layer

6A and 16A: Second Polysilicon Spacer

15: oxide film

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A through 2D are cross-sectional views of devices for explaining a method of forming a charge storage electrode of a semiconductor device according to the present invention.

2A illustrates that after forming the insulating film 13 on the silicon substrate 11 having the junction part 12 formed thereon, the insulating layer 13 is patterned to form a contact hole so that the junction part 12 is formed, and the contact hole is buried. It is sectional drawing of the state which formed the 1st polysilicon layer 14 on the said insulating film 13 as much as possible.

FIG. 2B shows that after forming the oxide film 15 on the first polysilicon layer 14, the oxide film 15 and the first polysilicon layer 14 are patterned and the second polysilicon layer 16 is formed on the entire upper surface. ), The oxide film 15 is formed by depositing PSG.

FIG. 2C is a cross-sectional view of the second polysilicon layer 16 having a primary front-etched state until the oxide layer 15 is exposed, wherein the second polysilicon layer 16 is on the insulating layer 13. Part of it remains.

FIG. 2D is a cross-sectional view of a second polysilicon spacer 16A formed by removing the exposed oxide layer 15 of FIG. 2C after the second polysilicon layer 16 of FIG. The oxide film (15 of FIG. 2C) is removed by wet etching using an oxide film etching solution such as HF.

As described above, according to the present invention, the core oxide is removed after first etching a part of the thickness of the polysilicon layer in order to prevent the formation of a dot on the top of the polysilicon spacer used as the sidewall of the cylinder. Then, the polysilicon layer having the remaining thickness is secondary etched. Therefore, the formation of peaks is prevented, so that the breakdown voltage characteristics of the capacitor are improved, and as the peaks are not formed, the thickness of the dielectric film can be reduced, thereby increasing the capacitance. Therefore, there is an effect that the electrical characteristics and the yield of the device can be improved.

Claims (4)

In the method of forming a charge storage electrode of a semiconductor device, Forming a contact hole by forming an insulating film on the silicon substrate on which the junction is formed, and then patterning the insulating layer to expose the junction; Forming an oxide film on the first polysilicon layer after forming a first polysilicon layer on the insulating film to fill the contact hole from the step; Sequentially patterning the oxide film and the first polysilicon layer from the step, and then forming a second polysilicon layer on the entire upper surface; Removing the exposed oxide film after primary etching the second polysilicon layer from the step to the time when the oxide film is exposed; Forming a second polysilicon spacer by secondary etching the second polysilicon layer from the step; The method of claim 1, The oxide film is a charge storage electrode forming method of a semiconductor device, characterized in that consisting of PSG. The method according to claim 1 or 2, And the oxide film is removed by wet etching. The method of claim 3, wherein The etching solution used in the wet etching process is a method for forming a charge storage electrode of a semiconductor device, characterized in that the HF.