KR100407773B1 - GaN LIGHT EMITTING DEVICE AND THE PACKAGE THEREOF - Google Patents

Abstract

A GaN device and a package thereof are disclosed. The present invention is applied to a GaN device composed of a substrate 1a, an N-GaN layer 1b, an active layer 1c, and a P-GaN layer 1d to emit light of any one of blue, green, blue violet and white light. The GaN device of the present invention includes an ohmic contact layer with the P-GaN layer 1d, and has a predetermined width at one end on the opposite side of the upper surface of the P-GaN layer 1d or diagonally on the upper surface of the P-GaN layer 1d. A first electrode 1e having a rectangular or circular flat plate coated with the same; Primary etching of the P-GaN layer 1d to a predetermined depth at opposite ends of the P-GaN layer 1d opposite to the first electrode 1e or diagonally opposite to the P-GaN layer 1d is performed. In addition, as the secondary etching proceeds to the P-GaN layer 1d and the active layer 1c, the etching is performed so that the cross-sectional shape of the P-GaN layer 1d and the active layer 1c has a “b” shaped cross section. An insulating layer 1g coated on the etched region to have the same surface as the upper surface of the P-GaN layer 1d; And an N-GaN layer 1b exposed by applying a predetermined width to an upper surface of the insulating layer 1g spaced apart from the P-GaN layer 1d, by etching the N-GaN layer 1b to a predetermined depth. And an ohmic contact layer with the N-GaN layer 1b, and the second electrode 1f having a square or circular flat plate having the same surface as the upper surface of the first electrode 1e. It is done.

Description

Solar light emitting element and its package {GaN LIGHT EMITTING DEVICE AND THE PACKAGE THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly, to a GaN device having a novel electrode structure for a blue, green, blue and white light emitting device (LED) or a laser diode in this wavelength range and a package thereof.

Conventional diode chips emitting blue (430-475 nm), green (500-530 nm), blue-violet or white light grow a GaN epitaxial layer sequentially on each sapphire substrate for each layer, and the anode (top) After forming both an anode electrode and a cathode electrode, the package was produced by ball bonding or wire bonding to these electrodes.

1 and 2 show an embodiment of a light emitting device equipped with the above-described conventional electrode structure, respectively, and FIG. 2 is a cross-sectional view of the light emitting device cut along the line Bb-bB of FIG. 1. The N-GaN layer 2b, the active layer 2c and the P-GaN (2d) layer are sequentially placed on the sapphire substrate 2a, and the anode electrode 2e and the cathode electrode 2f face each other diagonally. It is made in the form of seeing. In order to simplify the description, functional layers such as a buffer layer and a clad layer, which are additionally inserted above and below the active layer, in addition to the basic layer for emitting light, are omitted from the drawings.

3 is a perspective view illustrating a state in which the light emitting device chip of the conventional electrode structure described above is attached to a lead frame, and FIG. 4 is a cross-sectional view of FIG. 3. In the light emitting element chip 4b, the sapphire substrate is bonded to the chip pad 4e with an adhesive or the like. In addition, the anode electrode and the cathode electrode on the upper surface of the chip are connected to the anode pad 4a and the cathode pad 4c, which are electrode pads, by a conductive wire made of gold, copper, or aluminum, respectively. Wire bonding, or ball bonding, is a technique in which a wire clamp forms a ball at the end of a wire, as it is well known to those skilled in the art, to bond the ball onto the chip electrode and to bond the other end of the wire to the chip pad as the clamp rises and moves. . Hereinafter, ball bonding and wire bonding are used synonymously.

The problem lies in this ball bonding process. That is, the ball bonding process is usually performed at 240 ° C. or higher in the case of a light emitting device, and at this temperature, there is a high risk of cracks and defects at the chip. In addition, PCBs and plastic injection moldings around the device generate thermal deformation at this temperature, which causes device designers to design in consideration of this thermal deformation. In addition, as shown in the above structure, ball bonding must be performed on each of the anode and the cathode, so that the defect rate is further increased due to the execution of two processes. In addition, the wire bonding requires at least a certain distance or height for forming a wire loop or the like, and therefore, in the case of a small surface mount element used for a backlight, the size reduction is limited.

Therefore, the present invention is configured to sequentially stack a substrate, an N-GaN layer, an active layer, and a P-GaN layer to a GaN device emitting light of any one of blue, green, blue violet, and white light, and the upper surface of the P-GaN layer. Alternatively, the anode and cathode electrodes having a predetermined width are formed at one end on a diagonal line on the upper surface of the P-GaN layer, and an insulating layer for insulating the cathode electrode, the active layer, and the P-GaN layer is formed on the cathode electrode region. The present invention provides a GaN device and a package thereof, which are formed in a layer to minimize an insulating layer and increase luminous efficiency.

Another object of the present invention is to provide a package equipped with a chip having the new electrode structure as described above and a panel structure for a backlight.

1 is a perspective view of a conventional light emitting diode chip.

FIG. 2 is a cross-sectional view taken along line Bb-bB of the diode chip of FIG. 1. FIG.

3 is a package mounted with the chip of FIG.

4 is a cross-sectional view of the package of FIG. 3.

5 is a perspective view of a light emitting diode chip of the present invention;

FIG. 6 is a cross-sectional view taken along line Aa-aA of the diode chip of FIG. 5; FIG.

7 is a package mounted with the chip of FIG.

8 is a cross-sectional view of the package of FIG.

Description of the main parts of the drawing

1a: sapphire substrate 1b: N-GaN layer

1c: active layer 1d: P-GaN layer

1e: anode electrode 1f: cathode electrode

1g: insulation layer

The GaN device of the present invention for achieving the above object includes an ohmic contact layer with the P-GaN layer in a state of being sequentially stacked with a substrate, an N-GaN layer, an active layer and a P-GaN layer. A first electrode of a square or circular flat plate having a predetermined width applied to one end of a P-GaN layer upper side or a diagonal of an upper surface of the P-GaN layer, and the P-GaN layer side or a P-GaN layer opposite to the first electrode; At the other end facing diagonally, the P-GaN layer and the active layer have a first depth etch to a certain depth, and the second etch to the P-GaN layer and the active layer proceeds to form a cross-sectional shape of the P-GaN layer and the active layer. Etching is performed to have a cross section, and the insulating layer is coated on the etched region to have the same surface as the upper surface of the P-GaN layer, and is coated on the upper surface of the insulating layer spaced apart from the P-GaN layer. N-GaN layer exposed by etching the N-GaN layer to a certain depth And an ohmic contact layer with the N-GaN layer, the second electrode having a square or circular flat plate having the same surface as the first electrode. The GaN device of the present invention can also be used as a backlight panel such as an LCD.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 5 is a perspective view of a light emitting device employing the electrode structure of the present invention, and FIG. 6 is a cross-sectional view taken along line Aa-aA of FIG. 5. The N-GaN layer 1b, the active layer 1c, and the P-GaN (1d) layer are sequentially placed on the sapphire substrate 1a in the same manner as in the conventional chip structure. However, unlike the prior art, the anode 1e and the cathode 1f electrodes face each other in parallel with each other on the same upper side, and both electrodes have the same height. In particular, the cathode electrode is insulated from the active layer 1c and the P-GaN layer by the insulating layer 1g and protrudes thereon in contact with the N-GaN layer. This chip structure of the present invention is intended to enable the flip chip bonding method, which is a low temperature process. The illustrated structure is one embodiment, and the electrodes do not necessarily have to be in a side facing structure. For example, the electrodes may be configured in the form of facing diagonally, and the electrodes may be circular, not rectangular. Since any arrangement and any type of electrode structure is possible, as long as the current can be properly injected and the same height exists on the same surface to enable flip chip bonding, the insulating layer is not necessarily present at the same height as P-GaN. Only the height of the final electrode combined with the Au layer deposited thereon need to be the same as the height of the anode electrode.

Briefly describing the process of manufacturing the chip of the illustrated structure, first, an N-GaN, an active layer, and a P-GaN layer are grown on a sapphire substrate by a well-known method. In general, many sapphire substrates are used in GaN devices to grow epitaxial layers while maintaining matching, but not limited thereto, and SiC or GaN bulk substrates may be used. The growth method mainly uses MOCVD. In addition, as described above, various functional layers such as a cladding layer and a buffer layer may be added if necessary.

The etching process then etches the site where the cathode electrode is to be placed and deposits the insulator as shown. SiO2 is generally used as the insulator. This insulating layer serves to prevent the cathode electrode from being electrically shorted with the active layer or the P-GaN layer, so that the injected current is intactly diffused into the N-GaN layer. Thereafter, etching is performed as shown to the depth of the N-GaN layer to deposit the cathode, and then the cathode is deposited. The cathode electrode is first deposited in contact with N-GaN for ohmic contact by depositing a Ti-Au layer (about 70 ms), and then depositing a thin layer of Cr (about 40 ms) to improve contactability. And finally, a thick Au layer which is supplied with current is deposited. Such electrode material and thickness may be in ohmic contact, and may be in any form as long as the material is low in resistance. Then, any residue of Au that protrudes above the P-GaN height is removed to be as flat as the P-GaN layer height.

In depositing the anode electrode, the anode electrode is usually deposited in the order of Ni-Au / Cr / Au layer. The Ni—Au layer of the anode electrode is for enhancing ohmic contact with the underlying P—GaN, and the functions of the remaining layers are the same as those of the cathode electrode. The deposited anode electrode must protrude above the substrate for flip bonding, as is the cathode electrode. Therefore, when the Au layer of the anode electrode is deposited, the Au layer is secondarily deposited on the entire surface of the substrate, and only the Au of the protruding portions of the anode electrode and the cathode electrode is left as shown, and the two electrodes are not shorted. When Au is etched, Au of the cathode electrode is also made at the same time, and the height of the two electrodes can be made substantially the same. However, an additional process such as etching or chemical mechanical polishing (CMP) may be added so that the heights of both electrodes are exactly the same. The reason that the heights should be the same is that in later flip bonding, if the protruding heights are different, the chip is inclined to either side and the contact area between the electrodes and the electrode pads is reduced.

The above-described electrode layer materials and thicknesses are just one example, and the present invention is not limited thereto. In addition, if a suitable ohmic contact electrode is developed, both electrodes can be grown in the same process without the need for the Au deposition process as described above, and then the intermediate portion can be etched and the height of the surface can be adjusted.

The final electrode structure of the chip made through the above process is shown in FIGS. 5 and 6. Since the chip has cathode and anode electrodes at the same height on the same plane, the chip can be flipped with the electrode face protruding downward and bonded to the chip pad, lead frame or PCB. This is called flip chip bonding. . Since this bonding is performed at low temperature with a conductive adhesive, there is no need for a high temperature process and is a relatively simple process. Therefore, while solving the problems of the above-described ball bonding process, at the same time advantageous in terms of production cost and yield. 7 and 8 show the flip chip bonding of the light emitting device of the present invention. The electrodes of the light emitting element chip 3b are attached to a coining adhesive material 3e with the sapphire substrate turned upside down. Bonding using a coining adhesive material refers to bonding a chip with a coin-like adhesive material, such as SnPb, on an electrode pad. Alternatively, the doping of the conductive adhesive material on the lead frame terminal may be followed by bonding the chip by pressing it. Thus, the advantages of the chip structure and the process of the present invention, which can use a flip chip bonding process, which is a low temperature process, have been described.

For reference, when the current is injected into the chip to emit light from the active layer, the generated light is emitted upward through the sapphire layer, which is a substrate. Since the sapphire is almost a transparent material, the decrease in the brightness of the light is not a big concern.

A feature of the device is that both electrodes protrude at the same height on one side. In other words, instead of wire bonding, which is a high temperature process, flip chip bonding is possible to solve the problem of the prior art.

As a result, the present invention eliminates the defective rate due to wire bonding, improves productivity, and reduces manufacturing costs without using expensive Au wire.

In addition, SMD (Surface Mount Device) type, such as backlight used in LCD panel or portable communication device, has a loop height (0.2 mm or more) or distance (0.5 mm or more) due to process characteristics when conventional wire bonding is used. However, there was a problem in reducing the size of the device, but the flip chip bonding of the present invention can solve the problem simply because there is no problem as described above.

In addition, the size of the reflector included in the package of the light emitting device can also be reduced, so that the light emission efficiency can be further improved.

Claims (9)

In a GaN device composed of a substrate 1a, an N-GaN layer 1b, an active layer 1c, and a P-GaN layer 1d, which emits light of any one of blue, green, blue violet, and white light, A rectangular or circular flat plate including an ohmic contact layer with the P-GaN layer 1d and coated with a predetermined width on one side of the upper surface of the P-GaN layer 1d or diagonally on the upper surface of the P-GaN layer 1d. A first electrode 1e on the phase; Primary etching of the P-GaN layer 1d to a predetermined depth at opposite ends of the P-GaN layer 1d opposite to the first electrode 1e or diagonally opposite to the P-GaN layer 1d is performed. In addition, as the secondary etching proceeds to the P-GaN layer 1d and the active layer 1c, the etching is performed so that the cross-sectional shape of the P-GaN layer 1d and the active layer 1c has a “b” shaped cross section. An insulating layer 1g coated on the etched region to have the same surface as the upper surface of the P-GaN layer 1d; And Including a N-GaN layer (1b) exposed by applying a predetermined width to the upper surface of the insulating layer (1g) spaced apart from the P-GaN layer (1d) by etching the N-GaN layer (1b) to a predetermined depth A second electrode 1f having a rectangular or circular flat plate having an ohmic contact layer with the N-GaN layer 1b and having the same surface as the upper surface of the first electrode 1e. GaN device comprising a. delete delete delete delete delete delete A substrate 1a; An N-GaN layer 1b on the substrate 1a; An active layer 1c on the N-GaN layer 1b; A P-GaN layer 1d on the active layer 1c; A rectangular or circular flat plate including an ohmic contact layer with the P-GaN layer 1d and coated with a predetermined width on one side of the upper surface of the P-GaN layer 1d or diagonally on the upper surface of the P-GaN layer 1d. A first electrode 1e on the phase; Primary etching of the P-GaN layer 1d to a predetermined depth at opposite ends of the P-GaN layer 1d opposite to the first electrode 1e or diagonally opposite to the P-GaN layer 1d is performed. In addition, as the secondary etching to the P-GaN layer 1d and the active layer 1c proceeds, etching is performed so that the cross-sectional shape is “b” shaped, and the P-GaN layer is formed in the etched region. (1d) 1g of insulating layers apply | coated so that it may have the same surface as the upper surface; And Including a N-GaN layer (1b) exposed by applying a predetermined width to the upper surface of the insulating layer (1g) spaced apart from the P-GaN layer (1d) by etching the N-GaN layer (1b) to a predetermined depth A second electrode 1f having a rectangular or circular flat plate having an ohmic contact layer with the N-GaN layer 1b and having the same surface as the upper surface of the first electrode 1e. The GaN optical device package of claim 1, wherein the first electrode (1e) and the second electrode (1f) of the GaN device are bonded to an electrode pad by flip chip bonding. A substrate 1a; An N-GaN layer 1b on the substrate 1a; An active layer 1c on the N-GaN layer 1b; A P-GaN layer 1d on the active layer 1c; A rectangular or circular flat plate including an ohmic contact layer with the P-GaN layer 1d and coated with a predetermined width on one side of the upper surface of the P-GaN layer 1d or diagonally on the upper surface of the P-GaN layer 1d. A first electrode 1e on the phase; Primary etching of the P-GaN layer 1d to a predetermined depth at opposite ends of the P-GaN layer 1d opposite to the first electrode 1e or diagonally opposite to the P-GaN layer 1d is performed. In addition, as the secondary etching to the P-GaN layer 1d and the active layer 1c proceeds, etching is performed so that the cross-sectional shape is “b” shaped, and the P-GaN layer is formed in the etched region. (1d) 1g of insulating layers apply | coated so that it may have the same surface as the upper surface; And Including a N-GaN layer (1b) exposed by applying a predetermined width to the upper surface of the insulating layer (1g) spaced apart from the P-GaN layer (1d) by etching the N-GaN layer (1b) to a predetermined depth A second electrode 1f having a rectangular or circular flat plate having an ohmic contact layer with the N-GaN layer 1b and having the same surface as the upper surface of the first electrode 1e. And a GaN optical device package having a GaN optical device package bonded to an electrode pad by flip chip bonding the first electrode (1e) and the second electrode (1f) of a GaN device.