KR100404848B1 - Plasma display panel and method for driving the same - Google Patents

Abstract

The present invention relates to a plasma display panel and a driving method thereof capable of improving discharge efficiency.

The plasma display panel of the present invention includes a transparent electrode pair formed on the upper substrate with a relatively wide width, a bus electrode pair formed on a relatively narrow width with the transparent electrode pair interposed therebetween, a transparent electrode pair and the bus electrode. A dielectric layer for separating the pair, an upper partition formed on the upper substrate, an auxiliary electrode pair formed in contact with the bus electrode pair in the upper partition to increase the discharge distance, and a transparent electrode pair and a bus electrode pair Switching means for switching to the.

Description

Plasma display panel and its driving method {PLASMA DISPLAY PANEL AND METHOD FOR DRIVING THE SAME}

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel and a driving method thereof capable of improving discharge efficiency.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel (hereinafter referred to as "PDP") have been actively developed. . The PDP emits a phosphor by 147 nm ultraviolet rays generated when the He + Xe or Ne + Xe inert mixed gas is discharged, thereby displaying an image including characters or graphics. Such a PDP is not only thin and large in size, but also simple in structure, and has a high luminance and high luminous efficiency as compared to other flat display devices. Due to these advantages, research on PDP is being actively conducted.

Referring to FIG. 1, a discharge cell of a conventional PDP is formed on a pair of sustain electrodes formed on an upper substrate 10, that is, a scan / sustain electrode 12Y and a common sustain electrode 12Z, and a lower substrate 18. The address electrode 12X is provided. The sustain electrode pairs 12Y and 12Z are formed of a transparent electrode 12a and a bus electrode 12b. The upper dielectric layer 14 and the passivation layer 16 are formed on the upper substrate 10 on which the sustain electrode pairs 12Y and 12Z are formed. The upper dielectric layer 14 accumulates wall charges generated during plasma discharge. The passivation layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 for wall charge accumulation is formed on the lower substrate 18 on which the address electrode 12X is formed. The partition wall 24 is formed on the lower dielectric layer 22, and the phosphor 20 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The partition wall 24 prevents ultraviolet rays and visible rays generated by the discharge from leaking into adjacent discharge cells. The phosphor 20 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The discharge cell of this structure is selected by the counter discharge between the address electrode 12X and the scan / hold electrode 12Y, and then sustains the discharge by the surface discharge between the sustain electrode pairs 12Y and 12Z. In the PDP cell, the phosphor 20 emits light by ultraviolet rays generated during the sustain discharge, and visible light is emitted outside the cell to display an image.

The PDP is driven by an ADS (Address and Display Preiod Separated) method in which one frame is divided into several subfields having different number of discharge times to express gray level of an image.

Each subfield is further divided into a reset period for generating discharge uniformly, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. Each of the eight subfields is further divided into an address period and a sustain period. Here, the reset period and the address period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. Is increased. In this way, since the sustain period is different in each subfield, the gray level of the image can be expressed.

Referring to FIG. 2, the reset period RPD is divided into a set-up period and a set-down period. In the set-up period, the rising ramp waveform RP1 is supplied to the scan electrode 12Y, and in the set-down period, the falling ramp waveform RP2 is supplied.

In the setup period, a weak reset discharge occurs due to the rising ramp waveform RP1, and wall charges are accumulated in the cell. In the set-down period, the wall ramp in the cell is appropriately erased by the falling ramp waveform RP2 so that the wall charge is reduced to assist the next address discharge without causing an erroneous discharge. In addition, in order to reduce wall charge, a positive DC voltage Vs is supplied to the common sustain electrode 12Z during the set down period. The scanning / holding electrode 12Y to which the falling ramp waveform RP2 is supplied becomes a relatively negative polarity (-) relative to the common holding electrode 12Z to which the positive DC voltage Vs is supplied. This inversion reduces the wall charges generated during the setup period.

In the address period APD, address discharge is caused by the scan pulse SP applied to the scan / sustain electrode 12Y and the data pulse DP applied to the address electrode 12X. The wall charge formed by this address discharge is maintained for other discharge cells during the address period.

In the sustain period SPD, the sustain pulse is started in the discharge cells in which the trigger pulse TP is supplied to the scan / sustain electrode 12Y at the beginning to sufficiently wall charge in the address period. Subsequently, sustain pulses SUSPz and SUSPy are alternately supplied to the scan / sustain electrode 12Y and the common sustain electrode 12Z to maintain a sustain discharge during the sustain period SPD so that a desired gray scale is displayed.

In the erase period EPD, the discharge pulse EP is supplied to the common sustain electrode 12Z to stop the discharge. At this time, the erasing pulse EP has a ramp wave shape in which the light emission size is small and has a short pulse width of about 1 ms for the discharge erasing. The charged particles are erased by the short erase discharge by the erase pulse EP to stop the discharge.

The luminance of the PDP is proportional to the amount of vacuum ultraviolet rays generated during discharge. However, in the conventional PDP, the sustain discharge starts between the sustain electrode pairs 12Y and 12Z as shown in FIG. 3 and surface discharge occurs at the surface of the sustain electrode pairs 12Y and 12Z, but the emission area is maintained. There is a problem in that the brightness and efficiency are low because it is extremely limited between the pairs 12Y and 12Z. Therefore, in order to increase the amount of vacuum ultraviolet rays, a method of lengthening the discharge path by lengthening the interval between the sustain electrode pairs and a method of increasing the discharge size by widening the electrode width of the sustain electrode pair are considered. However, when the interval between the sustain electrode pairs is increased, the discharge distance increases and the amount of ultraviolet rays is generated. However, the discharge start voltage rapidly increases above a certain interval, which makes it difficult to apply in practice. In the case of widening the width of the discharge sustaining electrode, the amount of ultraviolet rays is increased as the discharge size is increased, but the discharge current increases in proportion to the width of the electrode.

In order to solve this problem, the sustain electrode pairs 12Y and 12Z formed in a T shape in the discharge cell shown in FIG. 4 are formed to be orthogonal to the partition wall. Accordingly, in the discharge cells in which the address discharge is generated, primary discharge is first generated at the protruding portion of the T-shaped bus electrode having a relatively short distance. Subsequently, the secondary discharge is caused by the voltage difference between the priming charged particles due to the primary discharge and the pair of transparent electrodes that are relatively far apart. As such, since the sustain discharge is generated by diffusion into the first and second discharges, the brightness and the efficiency are expected to increase as the discharge distance and the light emitting area are increased. However, the step discharge cannot be attracted from the sustain electrode by the charged particles generated at the protrusions. There is a problem that occurs.

Accordingly, an object of the present invention is to provide a plasma display panel and a driving method thereof which can improve discharge efficiency.

1 is a cross-sectional view showing a conventional plasma display panel.

FIG. 2 is a driving waveform diagram of the plasma display panel shown in FIG. 1.

3 is a cross-sectional view illustrating an electric field according to a distance between sustain electrode pairs of the plasma display panel shown in FIG. 1.

4 is a plan view of a plasma display panel in which sustain electrode pairs are formed in a 'T' shape.

5 is a cross-sectional view showing a discharge cell of the plasma display panel according to the present invention.

FIG. 6 is a plan view illustrating a discharge cell of the plasma display panel illustrated in FIG. 5.

FIG. 7 is a plan view of the plasma display panel shown in FIG. 6; FIG.

FIG. 8 is a drive waveform diagram of the plasma display panel shown in FIG. 5;

9A to 9C are plan views illustrating a discharging process of the plasma display panel illustrated in FIG. 5.

FIG. 10 is another drive waveform diagram of the plasma display panel shown in FIG. 5; FIG.

<Description of Symbols for Main Parts of Drawings>

10, 40: upper substrate 12Y, 42Y: scanning / holding electrode

12Z, 42Z: common holding electrode 14,22,44,52: dielectric layer

16,46: protective film 18,48: lower substrate

20,50 phosphor 24,54 partition wall

60: auxiliary electrode

In order to achieve the above object, the plasma display panel according to the present invention is a transparent electrode pair having a relatively wide width on the upper substrate, and a bus electrode pair formed with a relatively narrow width with the transparent electrode pair therebetween. And a dielectric layer for separating the transparent electrode pair and the bus electrode pair, an upper partition formed on the upper substrate, an auxiliary electrode pair formed in contact with the bus electrode pair inside the upper partition, and for increasing the discharge distance, and transparent. Switching means for selectively switching the electrode pair and the bus electrode pair.

And a lower substrate formed to face the upper substrate, an address electrode formed on the lower substrate, a dielectric layer formed to cover the address electrode, and a lower partition wall formed on the dielectric layer.

The height of the upper partition is characterized in that the range of about 1/2 of the lower partition.

Each of the auxiliary electrode pairs is shared with an adjacent discharge cell.

The auxiliary electrode pairs formed in the upper partition wall are each connected to the bus electrodes of different discharge cells.

The transparent electrode further includes a protrusion protruding toward the center of the discharge cell.

The driving method of the plasma display panel according to the present invention for achieving the above object is formed by separating the transparent electrode pair and the bus electrode pair, switching means for selectively switching the transparent electrode pair and the bus electrode pair, And an auxiliary electrode pair in contact, and the transparent electrode pair and the bus electrode pair are short-circuited by the switching means to initialize the full screen. And disconnecting the transparent electrode pairs and the bus electrode pairs by switching means to cause a short gap discharge between the transparent electrode pairs, making the transparent electrode pairs in a floating state or a high impedance state, and short gap discharge forming the auxiliary electrode pairs. Transitions to a long gap discharge in the auxiliary electrode pair.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 5 to 10.

5 and 6, a discharge cell of a PDP according to the present invention includes a pair of sustain electrodes formed on an upper substrate 40, that is, a scan / sustain electrode 42Y and a common sustain electrode 42Z, and a lower substrate. An address electrode 42X formed on the 48 is provided. The sustain electrode pairs 42Y and 42Z are formed of the transparent electrodes 42a and 42c and the bus electrodes 42b and 42d. The transparent electrodes 42a and 42c and the bus electrodes 42b and 42d of the sustain electrode pairs 42Y and 42Z are formed separately. In the separated transparent electrodes 42a and 42c and the bus electrodes 42b and 42d, the switch sw shown in FIG. 7 is turned on in the reset period RPD, the address period APD, and the erase period EPD. To connect the transparent electrodes 42a and 42c and the bus electrodes 42b and 42d. In the sustain period SPD, the switch sw is turned off to provide the transparent electrodes 42a and 42c and the bus electrodes 42b and 42d. ).

The transparent electrode pairs 42a and 42c are formed on the upper substrate 40 with a predetermined interval therebetween, and then the first dielectric layer 44a is formed to cover the transparent electrode pairs 42a and 42c. Bus electrode pairs 42b and 42d having the same height as the first dielectric layer 44a are formed with the first dielectric layer 44a therebetween. Then, auxiliary electrode pairs 60 and 62 are formed on the bus electrode pairs 42b and 42d and the first dielectric layer 44a. The auxiliary electrode pairs 60 and 62 cause a long gap discharge due to a short gap discharge occurring between the sustain electrode pairs 42Y and 42Z. The second dielectric layer 44b is formed to cover the auxiliary electrode pairs 60 and 62. The upper dielectric layer 44 accumulates wall charges generated during plasma discharge. The passivation layer 46 prevents damage to the upper dielectric layer 44 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 46, magnesium oxide (MgO) is usually used. The first partition 54b is formed on the protective film 46 by the printing method. The height of the 1st partition 54b is formed in about 1/3 of the height of the real thing (not shown) formed later. In other words, the height of the first partition wall 54b is formed to about 1/2 of the height of the second partition wall 54a.

The lower dielectric layer 52 for wall charge accumulation is formed on the lower substrate 48 on which the address electrode 42X is formed. The second partition wall 54a is formed on the lower dielectric layer 52. After the phosphor 50 is formed on the second partition 54a of the lower substrate 48, the upper and lower substrates 40 and 48 are actually bonded with the first and second partitions 54b and 54a interposed therebetween. . The partition wall 54 prevents ultraviolet rays and visible rays generated by the discharge from leaking into adjacent discharge cells. The phosphor 50 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 40 and 48 and the partition wall 54.

Referring to FIG. 8, the driving method of the PDP according to the present invention is divided into a reset period (RPD), an address period (APD), a sustain period (SPD), and an erase period (EPD).

The reset period RPD is divided into a set-up period and a set-down period. The rising ramp waveform RP1 is supplied to the scan electrode 42Y and the first auxiliary electrode 62 in the setup period, and the falling ramp waveform RP2 is supplied in the setdown period.

In the setup period, a weak reset discharge occurs due to the rising ramp waveform RP1, and wall charges are accumulated in the cell. In the set-down period, the wall ramp in the cell is appropriately erased by the falling ramp waveform RP2 so that the wall charge is reduced to assist the next address discharge without causing an erroneous discharge. In addition, in order to reduce wall charge, a positive DC voltage Vs is supplied to the common sustain electrode 42Z and the second auxiliary electrode 60 in the set down period. The scan / hold electrode 42Y and the first auxiliary electrode supplied with the falling ramp waveform RP2 to the common sustain electrode 42Z and the second auxiliary electrode 60 supplied with the positive DC voltage Vs. As the electrode 62 becomes relative negative (-), that is, the polarity is reversed, the wall charges generated during the setup period are reduced.

In the address period APD, the scan pulse SP is supplied to the scan / sustain electrode 42Y and the first auxiliary electrode 62, and at the same time, the data pulse DP is supplied to the address electrode 52 so that an address discharge occurs. Done. The wall charge formed by this address discharge is maintained for the period during which the other discharge cells are addressed.

At the beginning of the sustain period SPD, as shown in FIG. 9A, the trigger pulse TP is supplied to the scan / sustain electrode 42Y and the first auxiliary electrode 628 to sufficiently wall charge in the address period APD. The sustain discharge is started in the formed discharge cells. Subsequently, sustain pulses SUSPz and SUSPy are supplied to sustain electrode pairs 42Y and 42Z and auxiliary electrode pairs 60 and 62 having a short gap Vs voltage equal to the trigger pulse and a long gap VS voltage greater than the short gap Vs voltage. 9b and 9c, the sustain discharge is maintained during the sustain period SPD. In other words, the initial sustain discharge occurs between the sustain electrode pairs 42Y and 42Z. By this initial discharge, a lot of wall charges are formed in the sustain electrode pairs 42Y and 42Z, which helps long gap discharge of the auxiliary electrode pairs 60 and 62. As a result, the sustain discharge starts at the Vs voltage of the short gap which is the low voltage. At this time, a strong electric field is formed between the sustain electrode pairs 42Y and 42Z during the initial sustain discharge period, so as to prevent the gases from being ionized by the strong electric field, as shown in FIG. 9C. The transparent electrode pairs 42a and 42c are brought into a high-impedance state or a floating state. As a result, the strong discharge between the transparent electrode pairs 42a and 42c of the sustain electrode pairs 42Y and 42Z is changed to a weak discharge, and a long gap discharge between the auxiliary electrode pairs 60 and 62 is started. As the area of the weak discharge between the sustain electrode pairs 42Y and 42Z decreases gradually, the area of the weak discharge is extended to the entire area of the auxiliary electrode pairs 60 and 62 to maintain the discharge stably.

The erase period EPD stops the discharge which was maintained by supplying the erase pulse EP to the common sustain electrode 42Z and the second auxiliary electrode 60 after the sustain period SPD. In this case, the erasing pulse EP has a lamp wave shape in which the light emission size is small, and has a short pulse width of about 1 ms for erasing the discharge. The charged particles are erased by the short erase discharge by the erase pulse EP to stop the discharge.

Referring to FIG. 10, another driving method of the plasma display panel according to the present invention includes the same components except that the sustain discharge is formed by a long charge discharge as compared to the driving method illustrated in FIG. 8.

That is, at the beginning of the sustain period SPD, the trigger pulse TP is supplied to the scan / sustain electrode 42Y and the first auxiliary electrode 628 to discharge the discharge cells having sufficient wall charges in the address period APD. Initiate a sustain discharge. Subsequently, the sustain discharge is maintained for the sustain period SPD by supplying sustain pulses SUSPz and SUSPy having a long gap Vs having the same size as the trigger pulse to the sustain electrode pairs 42Y and 42Z and the auxiliary electrode pairs 60 and 62. To be. In other words, the initial sustain discharge occurs between the sustain electrode pairs 42Y and 42Z. By this initial discharge, a lot of wall charges are formed in the sustain electrode pairs 42Y and 42Z, which helps long gap discharge of the auxiliary electrode pairs 60 and 62. At this time, since a strong electric field is formed between the sustain electrode pairs 42Y and 42Z during the initial sustain discharge period, the transparent electrode pairs 42a and 42c of the sustain electrode pairs 42Y and 42Z to prevent the gases from being ionized by the strong electric field. ) Into high-impedance or floating state.

As described above, the plasma display panel and the driving method thereof according to the present invention form a partition of the upper substrate and the lower substrate, respectively, and an auxiliary electrode is formed inside the upper substrate partition. That is, a short gap is formed in the T-shaped transparent electrode pair, and a long gap is formed in the auxiliary electrode pair. Accordingly, since the short gap is formed in the long gap, the charged particles generated in the short gap are directly connected to the long gap, thereby lowering the discharge start voltage. In addition, as the discharge start voltage is lowered, the discharge current is reduced and power consumption is reduced, thereby increasing the discharge efficiency. In addition, after discharging to a short gap, the switch between the transparent electrode and the bus electrode is turned off and high impedance or floating treatment can be performed on the transparent electrode to prevent erroneous discharge.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

A pair of transparent electrodes formed on the upper substrate to have a relatively wide width; A bus electrode pair formed to have a relatively narrow width with the transparent electrode pair interposed therebetween; A dielectric layer for separating the transparent electrode pair and the bus electrode pair; An upper partition wall formed on the upper substrate; An auxiliary electrode pair formed in the upper partition to be in contact with the bus electrode pair to increase a discharge distance; And switching means for selectively switching the transparent electrode pair and the bus electrode pair. The method of claim 1, A lower substrate formed to face the upper substrate; An address electrode formed on the lower substrate; A dielectric layer formed to cover the address electrode; And a lower partition formed on the dielectric layer. The method of claim 2, And a height of the upper partition wall is in a range of about 1/2 of the lower partition wall. The method of claim 1, And wherein each of the auxiliary electrode pairs is shared with an adjacent discharge cell. The method of claim 1, And a pair of auxiliary electrodes formed in the upper partition wall are connected to bus electrodes of different discharge cells. The method of claim 1, The transparent electrode further comprises a protrusion protruding toward the center of the discharge cell. A transparent electrode pair and a bus electrode pair are formed separately, and having switching means for selectively switching the transparent electrode pair and the bus electrode pair, and an auxiliary electrode pair in contact with the bus electrode pair, Initializing a full screen by shorting the transparent electrode pair and the bus electrode pair to the switching means; Writing the data while the transparent electrode pair and the bus electrode pair are short-circuited to scan the entire screen in a line sequential manner; Shorting the gap between the transparent electrode pair and the bus electrode pair by the switching means to generate a short gap discharge between the transparent electrode pair; Making the transparent electrode pairs in a floating state or a high impedance state; And transferring the short gap discharge to the auxiliary electrode pair to cause a long gap discharge to occur in the auxiliary electrode pair.