KR100390811B1 - Method for atomic layer deposition of ruthenium layer and method for fabricating capacitor - Google Patents

Abstract

The present invention relates to an atomic layer deposition method of a metal film having a smooth surface and excellent step coverage while preventing oxidation of a lower barrier film, and a method of manufacturing a capacitor using the same, wherein the atomic layer deposition method of a metal film of the present invention is a semiconductor in a deposition chamber. Loading a substrate, supplying a metal organic source into the chamber in a pulse form to adsorb the metal organic source onto the semiconductor substrate, and reacting the reaction gas in a pulse form to alternate with a pulse of the metal organic source into the chamber. Supplying to excite the plasma, and reacting the excited plasma with the adsorbed metal organic source to form a pure metal atomic layer on the substrate.

Description

Atomic layer deposition method of platinum film and manufacturing method of capacitor using same {METHOD FOR ATOMIC LAYER DEPOSITION OF RUTHENIUM LAYER AND METHOD FOR FABRICATING CAPACITOR}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a memory device, and more particularly, to an atomic layer deposition method of a platinum film which prevents oxidation of a diffusion barrier film, has a smooth surface and excellent step coverage, and a method of manufacturing a capacitor using the same.

Recently, platinum (Pt), iridium (Ir), ruthenium (Ru), iridium oxide (IrO), ruthenium oxide (RuO), and platinum alloys are used as top and bottom electrodes to increase the capacitance of the capacitor. Metal such as (Pt-alloy) is used.

In order to uniformly deposit metals for the upper and lower electrodes in the highly integrated memory device, sputtering, chemical vapor deposition (CVD), and atomic layer deposition (ALD) are applied.

First, the sputtering method injects an inert gas such as argon into the vacuum chamber while a high voltage is applied to the target to generate argon ions in the plasma state. At this time, argon ions are sputtered on the surface of the target, and atoms of the target are removed from the surface of the target.

The sputtering method can form a high purity thin film having excellent adhesion with the substrate. However, in the case of depositing a highly integrated thin film having a process difference by the sputtering method, it is very difficult to secure uniformity over the entire thin film. There is a limit to the application.

Next, chemical vapor deposition (CVD) is the most widely used deposition technique. A thin film having a required thickness is deposited on a substrate using a reaction gas and a decomposition gas.

Chemical vapor deposition first injects various gases into the reaction chamber and deposits a thin film of a required thickness on the substrate by chemically reacting gases induced by high energy such as heat, light and plasma.

In addition, the chemical vapor deposition (CVD) increases the deposition rate by controlling the reaction conditions through the ratio and amount of plasma or gases applied by the reaction energy.

However, because the reactions are fast, it is very difficult to control the thermodynamic stability of atoms, and there is a problem of deteriorating the physical and chemical electrical properties of the thin film.

Finally, atomic layer deposition (ALD) is a method for depositing an atomic layer by alternately supplying a reaction gas and a purge gas, the thin film formed thereby has a high aspect ratio, uniform at low pressure, and excellent electrical and physical properties.

Atomic layer deposition (ALD) is a method of sequentially depositing a plurality of atomic layers on a semiconductor substrate by sequentially injecting and removing a reactant into a chamber.

The atomic layer deposition method is a deposition method using a chemical reaction like chemical vapor deposition (CVD), but it is distinguished from the CVD method in that each gas flows in pulses one by one without mixing in the chamber. For example, when using A and B gas, only A gas is injected first. At this time, A gas molecules are chemically absorbed. A gas remaining in the chamber is purged with an inert gas such as argon or nitrogen. Then, when only B gas is injected, the reaction between A gas and B gas occurs only at the surface of the chemisorbed A gas, and a thin film of an atomic layer is deposited. Because of this, any surface with any morphology (Morphology) can achieve 100% step coverage. After the reaction of A gas and B gas, the B gas and the reaction by-product remaining in the chamber are purged. The thickness of the thin film can be adjusted in atomic layer units by repeating atomic layer deposition by introducing the A or B gas. In other words, the thickness of the thin film by the atomic layer deposition method is closely related to the number of repetitions of the deposition process.

Recently, research has been conducted to apply platinum, ruthenium, and iridium as upper / lower electrodes of capacitors for high density memory devices such as DRAM or FeRAM. Research into applying the atomic layer deposition method is in progress.

By such atomic layer deposition, it is possible to secure step coverage in highly integrated devices with high aspect ratios.

However, for atomic layer deposition, there must be a reaction gas capable of substitution reaction with the platinum source, but currently there is no platinum source and reaction gas for atomic layer deposition.

1a to 1b is a view briefly showing a manufacturing method of a high density capacitor according to the prior art.

As shown in FIG. 1A, an interlayer dielectric (ILD) 12 is formed on a semiconductor substrate 11 on which a manufacturing process of a transistor and a bit line (not shown) is completed, and then a contact mask using a photosensitive film is formed. The interlayer insulating layer 12 is etched to form a plug contact hole through which the semiconductor substrate 11 is exposed. Subsequently, polysilicon is deposited on the entire surface including the plug contact hole, and then a polysilicon plug 13 partially embedded in the plug contact hole is formed by an etchback or chemical mechanical polishing (CMP) process. do.

Next, after forming the titanium silicide 14 on the polysilicon plug 13 to improve the contact resistance between the polysilicon plug 13 and the lower electrode, the polysilicon plug (14) from the lower electrode on the titanium silicide 14 is formed. Titanium nitride 15 is formed as a diffusion barrier to prevent oxygen diffusion into 13).

At this time, the titanium silicide 14 is formed by depositing titanium and heat treatment, the titanium nitride 15 is completely embedded in the plug contact hole through the etch back or chemical mechanical polishing process.

Subsequently, after the capacitor oxide film 16 is formed on the interlayer insulating film 12 including titanium nitride 15, the capacitor oxide film 16 is etched with a storage node mask (not shown) to form a lower electrode. (Hereinafter abbreviated as 'concave part') (17) is opened.

As shown in FIG. 1B, a platinum film 18, which is a lower electrode, is deposited on the capacitor oxide film 16 including the open concave portion 17 by chemical vapor deposition (CVD).

Although not shown in the drawings, the platinum film 18 is etched back or chemically mechanically polished in a subsequent process to remain only in the recesses, and then dielectric films such as BLT, Ta ₂ O ₅ , SBT, SBTN, and the like are deposited on the platinum film 18. Upper electrodes such as platinum and iridium are sequentially formed.

In the above-described conventional technique, chemical vapor deposition (CVD) was applied to form a platinum electrode as a lower electrode, but in chemical vapor deposition (CVD), the substrate must be maintained at a high temperature during deposition. There is a problem that is damaged.

In addition, due to the deposition by the pyrolysis reaction, it is difficult to deposit the dielectric film and the upper electrode, which is a subsequent process, because the step coverage is poor and the surface is rough and thus the lower electrode having a large aspect ratio is not uniformly filled ('A' in FIG. 1B). This follows. In particular, when the platinum film by chemical vapor deposition is used as the upper electrode, the lower electrode needs to have a higher step coverage due to a larger aspect ratio.

The present invention has been made to solve the above-mentioned problems of the prior art, and provides an atomic layer deposition method of a platinum film having a smooth surface and excellent step coverage while preventing damage to the diffusion barrier film, and a method of manufacturing a capacitor using the same. There is a purpose.

1A to 1B are cross-sectional views illustrating a method of forming a platinum lower electrode by chemical vapor deposition according to the prior art;

2 is a process flow diagram illustrating a plasma atomic layer deposition method of a platinum film according to an embodiment of the present invention;

3A to 3B are cross-sectional views illustrating a method of manufacturing a capacitor having a platinum film deposited according to FIG. 2 as a lower electrode;

* Description of the symbols for the main parts of the drawings *

31 semiconductor substrate 32 interlayer insulating film

33: polysilicon plug 34: titanium silicide

35 titanium nitride 36 capacitor oxide film

38: platinum film

The atomic layer deposition method of the platinum film of the present invention for achieving the above object is to load the substrate into the chamber, supplying a platinum metal organic source into the chamber in the form of a pulse to adsorb the platinum metal organic source on the substrate Supplying a reducing reaction gas in pulse form to alternate the pulse of the platinum metal organic source into the chamber to excite the plasma, and reacting the excited plasma with the adsorbed platinum metal organic source on the substrate. And forming a pure platinum atomic layer.

The method of manufacturing a capacitor of the present invention comprises the steps of depositing a lower electrode by plasma-reacting a platinum metal organic source and a reducing reaction gas, and sequentially depositing a dielectric film and an upper electrode on the lower electrode. It is done.

Preferably, the platinum metal organic source is (COD) Pt (CH ₃ ) ₃ , (COD) Pt (CH ₃ ) Cp, (COD) Pt (CH ₃ ) Cl, (Cp) Pt (CH ₃ ) CO, (Cp) Pt (allyl), (Cp) Pt (CH ₃ ) ₃ , (MeCp) Pt (CH ₃ ) ₃ , (acac) Pt (CH ₃ ) ₃ , Pt (acac) 2, Pt ( CH ₃ ) ₂ [CH ₃ NC], Pt (hfa) ₂ , Pt (hfac) ₂ or Pt (tmhd) ₂ using any one, or these sources are characterized in that dissolved in an organic solvent.

Preferably, the reducing reaction gas is H ₂ , NH ₃ , O ₂ , N ₂ O, saturated carbohydrates such as C _x H _{(2x + 2)} , cyclic saturated carbohydrates such as C _x H _2x , C _x H _(2x Some or all of the hydrogen of the saturated carbohydrate such as ₊₂₎ is characterized by using a gas substituted with F or Cl, or by using a mixture of these reaction gases.

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

In general, the atomic layer deposition chamber is connected with a reaction source supply pipe for supplying a reaction source and a reaction gas / purge gas supply pipe for supplying a plasma reaction gas and a purge gas for exciting the plasma. Through the reaction source supply pipe and the reaction / purge gas supply pipe, the reaction source and the plasma reaction gas are alternately injected into the deposition chamber in a pulse form. Here, the number of reaction source supply pipes may be changed according to the number of reaction sources introduced into the deposition chamber, and a purge gas is added to the plasma reaction gas to exhaust the residual gas after the reaction through the reaction gas / purge gas supply pipe.

The semiconductor substrate is placed on a support for mounting the semiconductor substrate, and a heating block is formed on an outer surface of the deposition chamber in which the support is installed. A plurality of heaters are provided in the heating block to maintain a constant temperature of the semiconductor substrate. do.

In addition, valves may be installed at each gas supply pipe to allow the purge gas or the reaction sources to flow into or out of the deposition chamber according to on / off of the valves.

2 is a process flowchart showing a plasma atom layer deposition method of a platinum film according to an embodiment of the present invention.

As shown in FIG. 2, after loading the semiconductor substrate into the deposition chamber, a platinum metal organic source is supplied to the surface of the semiconductor substrate by supplying a platinum organic organic source in a pulse form through the reaction source supply pipe in the deposition chamber. (21-22)

Here, the platinum metal organic source is (COD) Pt (CH ₃ ) ₃ , (COD) Pt (CH ₃ ) Cp, (COD) Pt (CH ₃ ) Cl, (Cp) Pt (CH ₃ ) CO, (Cp) Pt (allyl), (Cp) Pt (CH ₃ ) ₃ , (MeCp) Pt (CH ₃ ) ₃ , (acac) Pt (CH ₃ ) ₃ , Pt (acac) 2, Pt (CH ₃ ) ₂ [CH ₃ NC], Pt (hfa) ₂ , Pt (hfac) _2, or Pt (tmhd) ₂ . In using these reaction sources, the reaction sources may be dissolved in an organic solvent.

Subsequently, the unreacted platinum metal organic source except for the platinum metal organic source adsorbed on the surface of the semiconductor substrate is purged, and a valve for supplying the reaction gas in the reaction gas / purge gas supply pipe is opened, thereby reducing gas as the reaction gas into the deposition chamber. By supplying, the supplied reaction gas is excited by plasma (24). Here, the reactive gas is _{H 2, NH 3, O 2} , N 2 O, C x H (2x + 2) and the same saturated carbohydrates, cyclic saturated carbohydrate, such as _{C x H 2x, C x H} (2x + 2) Some or all of the hydrogen of the saturated carbohydrate, such as using a gas substituted with F or Cl, or use a mixture of these reaction gases.

In addition, inert gas such as He, Ne, Ar, Xe, Kr, N ₂ is added when supplying the reaction gas, and when the reaction gas is excited by plasma, power is applied to 10 W to 1000 W, and the pressure of the deposition chamber is 0.01 tor. It is maintained in the range of atmospheric pressure, the temperature of the semiconductor substrate is kept at 50 ° C to 500 ° C, and the plasma reaction time is in the range of 0.01 second to 60 seconds.

After the plasma excitation of the reaction gas described above, the plasma of the reaction gas and the platinum metal organic source adsorbed are reacted to deposit a platinum atomic layer on the surface of the semiconductor substrate (25), and after the deposition of the platinum atom layer, the reaction by-product and the unreacted reaction gas. While purging, the purge time is in the range of 0.01 seconds to 60 seconds (26).

A cycle for continuously supplying a platinum metal organic source, a purge gas, a plasma reaction gas, and a purge gas is set to 1 cycle, and the cycle is repeatedly executed to deposit a platinum thin film having a desired thickness.

As described above, embodiments of the present invention deposit platinum films through plasma excitation, unlike conventional atomic layer deposition methods using chemical reactions.

3A to 3B are cross-sectional views illustrating a method of depositing a platinum film by a process flow diagram shown in FIG. 2 as a lower electrode of a capacitor.

As shown in FIG. 3A, the interlayer insulating layer 32 is formed on the semiconductor substrate 31 on which the manufacturing process of the transistor and the bit line (not shown) is completed, and then the interlayer insulating layer 32 is formed as a contact mask using a photosensitive film. Etching is performed to form a plug contact hole exposing a predetermined surface of the semiconductor substrate 31. Subsequently, after the polysilicon is deposited on the entire surface including the plug contact hole, the polysilicon plug 33 is partially embedded in the plug contact hole by an etch back or chemical mechanical polishing (CMP) process.

Next, after the titanium silicide 34 is formed on the polysilicon plug 33 to improve the contact resistance between the polysilicon plug 33 and the lower electrode, the polysilicon plug (c) is formed from the lower electrode on the titanium silicide 34. Titanium nitride 35 is formed as a diffusion barrier to prevent oxygen diffusion into 33).

At this time, the titanium silicide 34 is formed by depositing titanium and heat treatment, the titanium nitride 35 is completely embedded in the plug contact hole through an etch back or chemical mechanical polishing process.

Subsequently, after forming the capacitor oxide film 36 which determines the height of the lower electrode on the interlayer insulating film 32 including the titanium nitride 35, the capacitor oxide film 36 is etched with a storage node mask (not shown). As a result, the region 37 in which the lower electrode is to be formed (hereinafter abbreviated as 'concave portion') 37 is opened.

As shown in FIG. 3B, the platinum film 38 serving as the lower electrode is deposited on the capacitor oxide film 36 including the open concave portion 37 by using the plasma atomic layer deposition method (PEALD).

During the deposition of the platinum film 38, (COD) Pt (CH ₃ ) ₃ , (COD) Pt (CH ₃ ) Cp, (COD) Pt (CH ₃ ) Cl, (Cp) Pt (CH ₃ ) CO, (Cp ) Pt (allyl), (Cp) Pt (CH ₃ ) ₃ , (MeCp) Pt (CH ₃ ) ₃ , (acac) Pt (CH ₃ ) ₃ , Pt (acac) 2, Pt (CH ₃ ) ₂ [CH ₃ NC], Pt (hfa) ₂ , Pt (hfac) ₂ or Pt (tmhd) ₂ , or any of these metal organic sources or a reaction source obtained by dissolving these metal organic sources in an organic solvent.

Then, the reaction gas is _{H 2, NH 3, O 2} , N 2 O, C x H (2x + 2) and the same saturated carbohydrates, cyclic saturated carbohydrate, such as _{C x H 2x, C x H} (2x + 2) Some or all of the hydrogen of the saturated carbohydrate, such as using a gas substituted with F or Cl, or use a mixture of these reaction gases.

In the atomic layer deposition of the platinum film 39, the temperature of the semiconductor substrate 31 is maintained at 50 ° C to 500 ° C.

When the platinum film is deposited on the lower electrode by the above method, the step coverage is superior to the chemical vapor deposition method, thereby sufficiently securing the open width between the upper portions of the lower electrodes, thereby preventing short circuits between the lower electrodes, and depositing subsequent dielectric films or upper electrodes. This is easy.

In addition, since it is deposited at a low temperature (50 ℃ ~ 500 ℃) using a reducing reaction gas to prevent oxidation of titanium nitride, a diffusion barrier film, the platinum metal organic source and the reaction gas are separated from each other in order to inject and purge chemically Compared to vapor deposition (CVD), it is possible to suppress particle generation by gas phase reaction.

Although not shown in the drawings, the platinum film 38 is left only in the concave portion 37 to isolate the lower electrode between neighboring cells in a subsequent process, and dielectric films such as BLT, Ta ₂ O ₅ , SBT, SBTN, etc. are disposed on the lower electrode. And upper electrodes such as platinum and iridium are sequentially formed. For example, in the case of depositing platinum on the upper electrode, it is more advantageous to use the plasma atomic layer deposition method because the lower structure becomes finer.

Platinum film according to an embodiment of the present invention is applicable as a part of the lower electrode or the lower electrode of the cylinder (Cylinder), concave, (stack) stack capacitor, and also, the upper electrode or of the capacitor having these various structures Applicable as part of the upper electrode.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Since the method of forming the platinum lower electrode by the plasma atomic layer deposition method described above is performed at a low temperature / reduction atmosphere, oxidation of the diffusion barrier film can be prevented, and the atomic layer deposition method is applied to improve the step coverage. have.

In addition, it is possible to deposit a high purity thin film, the surface roughness is small, there is an effect that can improve the deposition rate.

Claims (5)

In the manufacturing method of a capacitor, Depositing a platinum lower electrode by plasma-reacting a platinum metal organic source with a reaction gas; And Sequentially depositing a dielectric film and an upper electrode on the platinum lower electrode Method for producing a capacitor, characterized in that comprises a. The method of claim 1, Depositing the platinum lower electrode, A method for producing a capacitor, characterized in that in the atomic layer deposition chamber. The method of claim 1, Depositing the platinum lower electrode, And a power for exciting the plasma at 10 W to 1000 W, for 0.01 to 60 seconds under a pressure of 0.01 tor to atmospheric pressure and a temperature of 50 ° C to 500 ° C. The method of claim 1, The platinum metal organic source is (COD) Pt (CH ₃ ) ₃ , (COD) Pt (CH ₃ ) Cp, (COD) Pt (CH ₃ ) Cl, (Cp) Pt (CH ₃ ) CO, (Cp) Pt (allyl), (Cp) Pt (CH ₃ ) ₃ , (MeCp) Pt (CH ₃ ) ₃ , (acac) Pt (CH ₃ ) ₃ , Pt (acac) 2, Pt (CH ₃ ) ₂ [CH ₃ NC ], Pt (hfa) ₂ , Pt (hfac) ₂ or Pt (tmhd) ₂ using any one, or these sources are dissolved in an organic solvent used. The method of claim 1, Depositing the upper electrode, A method for producing a capacitor, characterized by a plasma atomic layer deposition method.