KR20000007465A - Method of forming upper electrode of capacitor for semiconductor by atomic layer deposition - Google Patents
Method of forming upper electrode of capacitor for semiconductor by atomic layer deposition Download PDFInfo
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- KR20000007465A KR20000007465A KR1019980026828A KR19980026828A KR20000007465A KR 20000007465 A KR20000007465 A KR 20000007465A KR 1019980026828 A KR1019980026828 A KR 1019980026828A KR 19980026828 A KR19980026828 A KR 19980026828A KR 20000007465 A KR20000007465 A KR 20000007465A
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- 238000000034 method Methods 0.000 title claims abstract description 53
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000003990 capacitor Substances 0.000 title abstract description 15
- 238000000231 atomic layer deposition Methods 0.000 title description 13
- 239000007789 gas Substances 0.000 claims abstract description 72
- 238000010926 purge Methods 0.000 claims abstract description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 18
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000001301 oxygen Substances 0.000 claims abstract description 15
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000010936 titanium Substances 0.000 claims abstract description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 9
- 239000003989 dielectric material Substances 0.000 claims abstract description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 8
- 238000006243 chemical reaction Methods 0.000 claims description 31
- 239000012495 reaction gas Substances 0.000 claims description 30
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 17
- 229910010282 TiON Inorganic materials 0.000 claims description 10
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 2
- 239000011261 inert gas Substances 0.000 claims description 2
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 7
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 abstract 1
- 239000010408 film Substances 0.000 description 31
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 238000005229 chemical vapour deposition Methods 0.000 description 7
- 239000010409 thin film Substances 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 239000012535 impurity Substances 0.000 description 5
- 206010021143 Hypoxia Diseases 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 239000002243 precursor Substances 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- HDZGCSFEDULWCS-UHFFFAOYSA-N monomethylhydrazine Chemical compound CNN HDZGCSFEDULWCS-UHFFFAOYSA-N 0.000 description 1
- 238000006722 reduction reaction Methods 0.000 description 1
- 238000012421 spiking Methods 0.000 description 1
- -1 that is Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Semiconductor Memories (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
본 발명은 반도체 소자의 제조 방법에 관한 것으로서, 특히 원자층 증착(Atomic Layer Deposition; 이하 ALD)법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a capacitor upper electrode of a semiconductor device using atomic layer deposition (ALD).
반도체 소자의 집적도가 증가함에 따라 디자인 룰이 점점 감소하고, 이에 따라 콘택 홀의 어스펙트 비(aspect ratio)는 증가하는 반면에 접합 깊이는 얕아지고 있다. 이러한 얕은 접합과 금속 배선을 접촉시키는 배선 기술에 있어서, 장벽 금속층은 필수적으로 사용된다. 이는 금속 배선이 얕은 접합을 침투하는 접합 스파이킹 현상을 방지하기 위한 것이다. 일반적으로 이와 같은 장벽 금속층으로서 TiN막이 널리 사용된다.As the degree of integration of semiconductor devices increases, design rules gradually decrease, resulting in an increase in the aspect ratio of the contact holes while shallowing the junction depth. In the wiring technique of contacting such a shallow junction with the metal wiring, a barrier metal layer is essentially used. This is to prevent the junction spiking phenomenon in which the metal wiring penetrates the shallow junction. Generally, as such a barrier metal layer, a TiN film is widely used.
종래에는 장벽 금속층인 TiN막을 형성하기 위하여, 화학 기상 증착(Chemical Vapour Deposition; 이하 CVD)법 또는 유기 금속 화학 기상 증착(Metal Organic CVD; 이하 MOCVD)법을 이용하였다.Conventionally, in order to form a TiN film as a barrier metal layer, a chemical vapor deposition (CVD) method or a metal organic CVD (MOCVD) method is used.
CVD법을 이용한 TiN막 형성 방법은 전구체(precusor)로서 TiCl4을 사용한다. TiCl4를 전구체로 사용하는 CVD법을 이용한 TiN막 형성 방법은, 단차 도포성이 향상된다는 이점이 있으나, TiN막에 Cl이 불순물로 남아서, 비저항이 높아지고 Al과 같은 금속 배선을 형성한 후에는 부식에 따른 신뢰성 저하와 같은 문제가 발생한다. TiN막 내에 Cl의 함량을 줄여서 비저항을 낮추기 위해서는 증착 온도를 높여야 한다. 예를 들면, 200μΩ-㎝ 이하의 낮은 저항을 얻기 위해서는 증착 온도가 약 675℃ 이상이 되어야 한다. 그러나 증착 온도가 600℃ 이상이 되면, 하지층에서 스트레스 발생 등의 문제가 생긴다. 이를 방지하기 위하여 MH(MethylHydrazine)를 첨가하여 500℃ 이하의 저온 증착법도 제안된 바 있지만, 이 방법은 단차 도포성이 70% 이하로 떨어진다는 단점이 있다.The TiN film formation method using the CVD method uses TiCl 4 as a precursor. The TiN film formation method using the CVD method using TiCl 4 as a precursor has the advantage that the step coverage is improved. However, Cl remains as an impurity in the TiN film, resulting in high resistivity and corrosion after forming a metal wiring such as Al. A problem such as a decrease in reliability occurs. In order to reduce the resistivity by reducing the Cl content in the TiN film, the deposition temperature must be increased. For example, the deposition temperature should be about 675 ° C. or higher to achieve low resistance of 200 μΩ-cm or less. However, when the deposition temperature is higher than 600 ℃, problems such as the generation of stress in the underlying layer occurs. In order to prevent this, a low temperature deposition method of 500 ° C. or less has also been proposed by adding MH (MethylHydrazine), but this method has a disadvantage in that the step coverage is lowered to 70% or less.
한편, MOCVD법을 이용한 TiN막 형성 방법은 전구체로서 Ti[N(CH2CH3)2]4또는 Ti[N(CH3)2]4등과 같은 유기 금속을 사용한다. 유기 금속을 전구체로 사용하는 MOCVD법을 이용한 TiN막 형성 방법은 불순물 역할을 하는 Cl이 없고 저온 증착이 가능하다는 장점이 있지만, 박막 내의 C 불순물이 다량으로 존재하여 높은 비저항을 나타내고, 단차 도포성이 떨어진다는 단점이 있다.On the other hand, the TiN film forming method using MOCVD method uses an organic metal such as Ti [N (CH 2 CH 3 ) 2 ] 4 or Ti [N (CH 3 ) 2 ] 4 as a precursor. The TiN film formation method using MOCVD method using an organic metal as a precursor has the advantage that there is no Cl acting as an impurity and low temperature deposition is possible, but a large amount of C impurities in the thin film shows a high specific resistance and a step coating property There is a downside to falling.
따라서, 현재에는 CVD법을 이용한 TiN막 형성 공정에 가스 펄싱(gas pulsing) 방법을 도입하여 단 원자층의 박막을 교대로 증착시키는 ALD법을 이용한 TiN막 형성 방법에 주목하고 있다. 여기서 가스 펄싱 방법은 반응 가스와 퍼징(purging) 가스가 교대로 공급되는 방식을 의미한다. ALD법을 이용한 TiN막 형성 방법은 증착된 박막 내의 잔류 불순물이 적고, 200Å 미만의 박막을 증착할 때 두께 조절이 용이하다는 장점을 갖고 있다.Therefore, attention is now focused on a TiN film formation method using an ALD method in which a gas pulsing method is introduced to a TiN film formation process using a CVD method to alternately deposit a thin film of a single atomic layer. Here, the gas pulsing method means a method in which a reactive gas and a purging gas are alternately supplied. The TiN film formation method using the ALD method has an advantage of having less residual impurities in the deposited thin film and easily controlling the thickness when depositing a thin film of less than 200 GPa.
그런데, TiN막이 산소를 포함한 고유전 물질, 예컨대 Ta2O5를 유전막 재료로 사용한 커패시터 상부 전극으로 사용되는 경우에, ALD법을 이용한 TiN막 형성 과정중에 N2또는 NH3분위기에서의 Ta2O5의 산소 결핍에 따른 누설 전류의 증가와 같은 문제가 발생한다.However, the unique TiN film containing oxygen around the material, such as Ta 2 O 5 in the case used as a capacitor top electrode with a dielectric material, the TiN film-forming process using the ALD method N 2 or Ta 2 O in a NH 3 atmosphere Problems such as an increase in leakage current due to oxygen deficiency of 5 arise.
본 발명의 목적은, TiN막이 산소를 포함한 고유전 물질을 유전막 재료로 사용한 커패시터 상부 전극으로 사용되는 경우에, 고유전 물질의 산소 결핍에 따른 누설 전류의 증가를 억제하는 원자층 증착법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법을 제공하는데 있다.An object of the present invention is to provide a semiconductor device using an atomic layer deposition method for suppressing an increase in leakage current due to oxygen deficiency of a high dielectric material when the TiN film is used as a capacitor upper electrode using a high dielectric material containing oxygen as a dielectric film material. To provide a method of forming a capacitor upper electrode.
도 1은 본 발명에 따른 원자층 증착법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법을 설명하기 위한 흐름도이다.1 is a flowchart illustrating a method of forming a capacitor upper electrode of a semiconductor device using an atomic layer deposition method according to the present invention.
도 2는 본 발명에 따른 원자층 증착법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법 중, TiON막을 형성시키기 위한 가스 펄싱 방법을 설명하기 위한 타이밍도이다.FIG. 2 is a timing diagram illustrating a gas pulsing method for forming a TiON film in a capacitor upper electrode forming method of a semiconductor device using an atomic layer deposition method according to the present invention.
도 3은 본 발명에 따른 원자층 증착법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법 중, TiN막을 형성시키기 위한 가스 펄싱 방법을 설명하기 위한 타이밍도이다.3 is a timing diagram illustrating a gas pulsing method for forming a TiN film in a capacitor upper electrode forming method of a semiconductor device using an atomic layer deposition method according to the present invention.
상기 목적을 달성하기 위하여, 본 발명에 따른 원자층 증착법을 이용한 반도체 소자의 커패시터 상부 전극 형성 방법은, 산소가 포함된 고유전 물질로 이루어진 유전막이 형성된 반도체 기판을 반응 챔버 내로 인입하는 단계; 산소를 포함한 제1 소스 가스를 상기 반응 챔버 내로 공급하는 단계; 상기 제1 소스 가스를 퍼징하는 단계; 티타늄을 포함한 제2 반응 가스를 상기 반응 챔버 내로 공급하여 상기 제1 소스 가스와 반응시키는 단계; 상기 제2 반응 가스를 퍼징하는 단계; 질소를 포함한 제3 반응 가스를 상기 반응 챔버 내로 공급하여 상기 반도체 기판 상에 흡착된 상기 제1 및 제2 소스 가스와 반응시켜 상기 유전막 상에 TiON막을 형성하는 단계; 상기 제3 반응 가스를 퍼징하는 단계; 상기 TiON막이 형성된 후에 상기 제2 반응 가스를 상기 반응 챔버 내로 공급한 후 퍼징하는 단계; 및 상기 제3 반응 가스를 상기 반응 챔버 내로 공급하여 상기 TiON막이 형성된 반도체 기판 상에 흡착된 상기 제2 반응 가스와 반응시켜 TiN막을 형성하는 단계를 포함하는 것을 특징으로 한다.In order to achieve the above object, a method of forming a capacitor upper electrode of a semiconductor device using the atomic layer deposition method according to the present invention, the step of introducing a semiconductor substrate formed with a dielectric film made of a high-k dielectric material containing oxygen into the reaction chamber; Supplying a first source gas comprising oxygen into the reaction chamber; Purging the first source gas; Supplying a second reaction gas including titanium into the reaction chamber to react with the first source gas; Purging the second reaction gas; Supplying a third reaction gas including nitrogen into the reaction chamber to react with the first and second source gases adsorbed on the semiconductor substrate to form a TiON film on the dielectric film; Purging the third reaction gas; Purging after supplying the second reaction gas into the reaction chamber after the TiON film is formed; And supplying the third reaction gas into the reaction chamber to react with the second reaction gas adsorbed on the semiconductor substrate on which the TiON film is formed to form a TiN film.
여기서, 상기 산소 원자를 포함한 제1 반응 가스는 H2O 가스이고, 상기 티타늄을 포함한 제2 반응 가스는 TiCl4가스이며, 그리고 상기 질소를 포함한 제3 반응 가스는 NH3가스인 것이 바람직하다.Here, it is preferable that the first reaction gas including the oxygen atom is H 2 O gas, the second reaction gas including titanium is TiCl 4 gas, and the third reaction gas including nitrogen is NH 3 gas.
그리고, 상기 반응 가스들을 퍼징하는 단계들은 질소 가스 또는 불활성 가스를 이용하여 수행하며, 상기 반응 챔버 내의 압력이 일정하게 유지되도록 상기 반응 챔버 내로 분위기 가스를 공급하는 단계를 더 포함하는 것이 바람직하다.The purging of the reaction gases may be performed using nitrogen gas or an inert gas, and the method may further include supplying an atmosphere gas into the reaction chamber to maintain a constant pressure in the reaction chamber.
이하, 첨부 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 1은 본 발명에 따른 원자층 증착법을 이용한 반도체 장치의 커패시터 상부 전극 형성 방법을 설명하기 위한 흐름도이다. 그리고, 도 2 및 도 3은 본 발명에서의 가스 펄싱 방법을 나타내 보인 타이밍도이다.1 is a flowchart illustrating a method of forming a capacitor upper electrode of a semiconductor device using the atomic layer deposition method according to the present invention. 2 and 3 are timing diagrams showing the gas pulsing method in the present invention.
도 1 내지 도 3을 참조하면, 먼저 산소가 포함된 고유전 물질로 이루어진 유전막이 형성된 반도체 기판을 반응 챔버 내로 인입한다(단계 100). 여기서 산소가 포함된 고유전 물질의 예로서 Ta2O5등이 있다. 반응 챔버는 일반적인 화학 기상 증착법을 사용할 수 있는 챔버이다.1 to 3, first, a semiconductor substrate on which a dielectric film made of a high dielectric material containing oxygen is formed is introduced into a reaction chamber (step 100). Examples of the high-k dielectric material containing oxygen include Ta 2 O 5 . The reaction chamber is a chamber in which a general chemical vapor deposition method can be used.
그리고, 분위기 가스를 반응 챔버 내로 공급한다(단계 110). 여기서 분위기 가스로서 N2, Ar, He 가스 등을 사용한다. 분위기 가스는 반응 챔버 내의 압력을 일정하게 유지하기 위한 것이므로 본 발명에 따른 공정이 수행되는 동안에는 계속 반응 챔버로 공급되어 반응 챔버 내가 일정 압력 상태가 되도록 한다(도 2 및 도 3 참조).The atmosphere gas is then supplied into the reaction chamber (step 110). As the atmosphere gas, N 2 , Ar, He gas, or the like is used. Atmospheric gas is intended to maintain a constant pressure in the reaction chamber, so that while the process according to the invention is carried out, it is continuously supplied to the reaction chamber so that the reaction chamber is in a constant pressure state (see FIGS. 2 and 3).
그리고, 산소를 포함한 제1 소스 가스를 반응 챔버 내로 공급한다(단계 120). 여기서 산소를 포함한 제1 소스 가스로서 H2O 가스를 사용한다. 제1 소스 가스인 H2O 가스를 공급하는 이유는 후속 단계인 NH3가스 공급 단계에서 커패시터의 유전막, 예컨대 Ta2O5막의 환원 반응시에 산소가 결핍되어 누설 전류가 증가되는 것을 방지하기 위한 것이다. 제1 소스 가스를 일정 시간 동안 반응 챔버 내로 공급한 후에는 공급을 중지하고, 제1 소스 가스를 퍼징한다(단계 130). 여기서 퍼징 가스로서 N2, Ar, He 가스 등을 사용한다.Then, a first source gas containing oxygen is supplied into the reaction chamber (step 120). Here, H 2 O gas is used as the first source gas containing oxygen. The reason for supplying the H 2 O gas, which is the first source gas, is to prevent oxygen deficiency during the reduction reaction of the dielectric film of the capacitor, such as the Ta 2 O 5 film, in the subsequent NH 3 gas supply step, thereby increasing leakage current. will be. After supplying the first source gas into the reaction chamber for a certain time, the supply is stopped and the first source gas is purged (step 130). As the purging gas, N 2 , Ar, He gas or the like is used.
다음에, 티타늄을 포함한 제2 반응 가스를 일정 시간 동안 상기 반응 챔버 내로 공급하여 상기 제1 소스 가스와 반응시킨다(단계 140). 티타늄을 포함한 제2 반응 가스로서 TiCl4가스를 사용한다. 그러면, 제1 소스 가스와 제2 소스 가스가 반응하여 커패시터의 유전막 상에서 제1 소스 가스의 티타튬 성분과 제2 소스 가스의 산소 성분이 결합된다. 제2 반응 가스를 공급한 후에는 퍼징 가스를 사용하여 퍼징 공정을 수행한다(단계 150).Next, a second reaction gas including titanium is supplied into the reaction chamber for a predetermined time to react with the first source gas (step 140). TiCl 4 gas is used as the second reaction gas containing titanium. Then, the first source gas and the second source gas react to combine the titanium component of the first source gas and the oxygen component of the second source gas on the dielectric film of the capacitor. After the second reaction gas is supplied, a purging process is performed using the purging gas (step 150).
다음에, 질소를 포함한 제3 반응 가스를 상기 반응 챔버 내로 공급하여 상기 반도체 기판 상에 흡착된 상기 제1 및 제2 소스 가스와 반응시켜 상기 유전막 상에 TiON막을 형성한다(단계 160). 여기서, 질소를 포함한 제3 반응 가스로는 NH3가스를 사용한다. 제3 반응 가스를 공급한 후에는 퍼징 가스를 사용하여 퍼징 공정을 수행한다(단계 170).Next, a third reaction gas including nitrogen is supplied into the reaction chamber to react with the first and second source gases adsorbed on the semiconductor substrate to form a TiON film on the dielectric film (step 160). Here, NH 3 gas is used as the third reaction gas containing nitrogen. After the third reaction gas is supplied, a purging process is performed using the purging gas (step 170).
TiON막이 형성된 후에 티타늄을 포함한 제2 반응 가스, 즉 TiCl4가스를 상기 반응 챔버 내로 공급한 후 퍼징한다(단계 180, 190).After the TiON film is formed, a second reaction gas including titanium, that is, TiCl 4 gas is supplied into the reaction chamber and then purged (steps 180 and 190).
그리고 질소를 포함한 제3 반응 가스, 즉 NH3가스를 상기 반응 챔버 내로 공급하여 상기 TiON막이 형성된 반도체 기판 상에 흡착된 상기 제2 반응 가스, 즉 TiCl4가스와 반응시켜 TiN막을 형성한다(단계 200). 제3 반응 가스를 공급한 후에는 퍼징 가스를 공급하여 퍼징 공정을 수행한다(단계210).Then, a third reaction gas including nitrogen, that is, NH 3 gas, is supplied into the reaction chamber to react with the second reaction gas, ie, TiCl 4 gas, adsorbed on the semiconductor substrate on which the TiON film is formed (step 200). ). After the third reaction gas is supplied, a purging gas is supplied to perform a purging process (step 210).
이상, 본 발명을 바람직한 실시예를 들어 상세하게 설명하였으나, 본 발명은 상기 실시예에 한정되지 않으며, 본 발명의 기술적 사상의 범위 내에서 당 분야에서 통상의 지식을 가진 자에 의하여 여러 가지 변형이 가능하다.In the above, the present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. It is possible.
이상의 설명에서와 같이, 본 발명에 따른 원자층 증착법을 이용한 반도체 장치의 커패시터 상부 전극 형성 방법에 의하면 다음과 같은 이점이 있다.As described above, the method of forming the capacitor upper electrode of the semiconductor device using the atomic layer deposition method according to the present invention has the following advantages.
첫째로, 산소를 포함한 가스를 공급하는 공정을 포함시킴으로써 NH3가스 공급에 따른 커패시터의 유전막 환원시에 산소 결핍에 따른 누설 전류의 증가를 억제할 수 있다.First, by including a step of supplying a gas containing oxygen, it is possible to suppress an increase in leakage current due to oxygen deficiency at the time of reducing the dielectric film of the capacitor according to the NH 3 gas supply.
둘째로, 반응 가스들을 순차적으로 반응 챔버 내로 공급시킴으로써, 박막 내에 잔류한 불순물들을 제거하기 용이하다.Secondly, by supplying the reaction gases sequentially into the reaction chamber, it is easy to remove impurities remaining in the thin film.
셋째로, 가스 공급 싸이클의 조절로 박막 두께를 조절함으로써 전체 박막의 두께 조절이 용이하다.Third, it is easy to control the thickness of the entire thin film by adjusting the thin film thickness by adjusting the gas supply cycle.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100390811B1 (en) * | 2001-06-30 | 2003-07-12 | 주식회사 하이닉스반도체 | Method for atomic layer deposition of ruthenium layer and method for fabricating capacitor |
| US6673668B2 (en) | 2001-06-12 | 2004-01-06 | Hynix Semiconductor, Inc. | Method of forming capacitor of a semiconductor memory device |
| KR100417893B1 (en) * | 2001-05-31 | 2004-02-11 | 삼성전자주식회사 | Method of forming a thin film using atomic layer deposition |
| KR100418569B1 (en) * | 2001-12-10 | 2004-02-14 | 주식회사 하이닉스반도체 | Method for forming high dielectric thin film using atomic layer deposition |
| KR100431743B1 (en) * | 2001-12-19 | 2004-05-17 | 주식회사 하이닉스반도체 | Method for forming titanium-nitride layer by atomic layer deposition and method for fabricating capacitor using the same |
| KR100449028B1 (en) * | 2002-03-05 | 2004-09-16 | 삼성전자주식회사 | Method for forming thin film using ALD |
| KR100449247B1 (en) * | 2001-12-26 | 2004-09-18 | 주식회사 하이닉스반도체 | Method for manufacturing Ir and IrO2 upper /bottom electrode of capacitor |
| KR20180054476A (en) * | 2016-11-14 | 2018-05-24 | 도쿄엘렉트론가부시키가이샤 | TiN-BASED FILM AND TiN-BASED FILM FORMING METHOD |
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| KR100582415B1 (en) * | 2000-06-28 | 2006-05-23 | 주식회사 하이닉스반도체 | Method of forming a capacitor in a semiconductor device |
| KR102131078B1 (en) | 2013-09-05 | 2020-08-06 | 삼성전자 주식회사 | MIM capacitor and method for fabricating the same, semiconductor device comprising the same |
| KR102392819B1 (en) | 2015-09-09 | 2022-05-02 | 삼성전자주식회사 | Capacitor and semiconductor device comprising the same |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100417893B1 (en) * | 2001-05-31 | 2004-02-11 | 삼성전자주식회사 | Method of forming a thin film using atomic layer deposition |
| US6673668B2 (en) | 2001-06-12 | 2004-01-06 | Hynix Semiconductor, Inc. | Method of forming capacitor of a semiconductor memory device |
| KR100422565B1 (en) * | 2001-06-12 | 2004-03-12 | 주식회사 하이닉스반도체 | Method of forming a capacitor of a semiconductor device |
| KR100390811B1 (en) * | 2001-06-30 | 2003-07-12 | 주식회사 하이닉스반도체 | Method for atomic layer deposition of ruthenium layer and method for fabricating capacitor |
| KR100418569B1 (en) * | 2001-12-10 | 2004-02-14 | 주식회사 하이닉스반도체 | Method for forming high dielectric thin film using atomic layer deposition |
| KR100431743B1 (en) * | 2001-12-19 | 2004-05-17 | 주식회사 하이닉스반도체 | Method for forming titanium-nitride layer by atomic layer deposition and method for fabricating capacitor using the same |
| KR100449247B1 (en) * | 2001-12-26 | 2004-09-18 | 주식회사 하이닉스반도체 | Method for manufacturing Ir and IrO2 upper /bottom electrode of capacitor |
| KR100449028B1 (en) * | 2002-03-05 | 2004-09-16 | 삼성전자주식회사 | Method for forming thin film using ALD |
| KR20180054476A (en) * | 2016-11-14 | 2018-05-24 | 도쿄엘렉트론가부시키가이샤 | TiN-BASED FILM AND TiN-BASED FILM FORMING METHOD |
| US10927453B2 (en) | 2016-11-14 | 2021-02-23 | Tokyo Electron Limited | TiN-based film and TiN-based film forming method |
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