KR100366102B1 - Plasma display panel - Google Patents

Abstract

A plasma display panel is disclosed. The plasma display panel includes a front substrate; A common electrode and a scan electrode disposed in parallel with each other on the front substrate; A front dielectric layer coated on upper surfaces of the common electrode and the scan electrode; A rear substrate installed to face the front substrate to form a discharge space; An address electrode disposed on the rear substrate so as to cross the common electrode and the scan electrode at a predetermined angle, and having a protrusion formed at a portion of the rear substrate opposite to the scan electrode; A back dielectric layer formed on an upper surface of the back substrate to fill the address electrode; Barrier ribs formed parallel to the address electrode on an upper surface of the rear dielectric layer; And red, green, and blue phosphor layers applied to the discharge space partitioned by the barrier ribs.

Description

Plasma display panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, which is a type of flat panel display device, and more particularly, to a plasma display panel having a protruding address electrode.

Plasma display panel is a display using light emission according to gas discharge, and when the voltage is applied to the light emitting cell, the discharge is generated inside, and the ultraviolet light generated at this time touches the phosphor inside the cell and operates on the principle that visible light is generated. It is attracting much attention as one of the flat panel displays (FPDs) that can replace the conventional cathode ray tube (CRT) and liquid crystal display (LCD) due to its thinness and large screen size and wide viewing angle.

The plasma display panel is divided into a direct current (DC) type and an alternating current (DC) type according to a method of applying a voltage when a discharge is generated, and is divided into a counter discharge type and a surface discharge type according to the configuration of the electrodes.

FIG. 1 illustrates an example of a surface discharge plasma display panel of the conventional discharge type plasma display device.

As shown in the drawing, the plasma display device includes a front electrode 1 and a sustain electrode 2 and 3 paired with a scan electrode 2 and a common electrode 3 disposed on the front substrate, and the front substrate. And a front dielectric layer 4 for applying the sustain electrode, a back substrate 6 is provided to face the front substrate, and a predetermined angle with the sustain electrodes 2 and 3 is provided on the back substrate 6. An address electrode 7, a back dielectric layer 8 filling the back substrate 6 and the address electrode 7, and a partition wall 9 disposed parallel to the address electrode 7 on the back dielectric layer 8. ) Is provided. Here, the phosphor layer applied to the top of the back dielectric layer 8 and the inside of the partition wall is not shown.

In the plasma display panel according to the related art configured as described above, after an address discharge occurs between the scan electrode 2 and the address electrode 7, a discharging occurs between the sustain electrodes 2 and 3 so that the discharge gas is discharged from electrons and ions. Ionized into a plasma state. At this time, ultraviolet rays emitted by the particles excited by the collision collide with the phosphor layer to emit visible light.

The electrode structure of the conventional plasma display panel has the same opposing distance between the scan electrode 2 of the sustain electrode provided on the front substrate and the address electrode 7 provided on the back substrate. Accordingly, there is a limitation in optimizing the discharge gap to increase the address discharge probability and the address voltage margin in forming an address discharge between the scan electrode and the address electrode of the plasma display panel.

In addition, since the thickness of the back dielectric layer 8 formed on the address electrode is the same in the part facing the scan electrode and the part facing the common electrode, the structure of the conventional plasma display panel has many limitations in optimizing the address discharge voltage.

In this case, the discharge gap between the address electrode and the scan electrode can be adjusted by adjusting the height of the barrier rib, but this method has a disadvantage in that the discharge space is reduced in the pixel.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a plasma display panel capable of reducing a discharge start voltage by narrowing a gap between a scan electrode and an address electrode.

It is still another object of the present invention to provide a plasma display panel capable of reducing an address voltage during address discharge.

Another object of the present invention is to provide a plasma display panel which increases the light emitting luminance of the phosphor layer by increasing the area on which the phosphor is applied.

1 is a schematic diagram showing an internal structure of a conventional plasma display panel;

2 is a schematic diagram showing an internal structure of a plasma display panel according to an embodiment of the present invention;

3A and 3B are cross-sectional views taken along the lines A-A and B-B of FIG. 2 according to one embodiment of the present invention;

4A and 4B are cross-sectional views taken along the lines A-A and B-B of FIG. 2 according to another embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

1 ... front substrate 2 ... scanning electrode

3. Common electrode 4. Front dielectric layer

5 ... Shield 6 ... Back board

7 ... address electrode 7a ... projection

8 ... back dielectric layer 9 ... bulkhead

10. Phosphor layer

Plasma display panel of the present invention for achieving the above object,

Front substrate; A common electrode and a scan electrode disposed in parallel with each other on the front substrate; A front dielectric layer coated on upper surfaces of the common electrode and the scan electrode; A rear substrate installed to face the front substrate to form a discharge space; An address electrode disposed on the rear substrate so as to cross the common electrode and the scan electrode at a predetermined angle, and having a protrusion formed at a portion of the rear substrate opposite to the scan electrode; A back dielectric layer formed on an upper surface of the back substrate to fill the address electrode; Barrier ribs formed parallel to the address electrode on an upper surface of the rear dielectric layer; And red, green, and blue phosphor layers applied to the discharge space partitioned by the barrier ribs.

Here, the back dielectric layer applying the protrusion of the address electrode opposite to the scan electrode may be formed thinner than the dielectric layer applying the other portion except the address electrode protrusion.

In addition, the back dielectric layer applying the protrusion of the address electrode opposite to the scan electrode may be formed to be the same or thicker than the dielectric layer applying the other portion of the address electrode protrusion.

Hereinafter, an embodiment of a plasma display panel having a protruding address electrode according to the present invention will be described in detail with reference to the accompanying drawings. For each figure, like reference numerals denote like elements.

2 is an exploded perspective view illustrating a schematic structure of a plasma display panel according to an exemplary embodiment of the present invention.

As illustrated, the plasma display device includes a transparent front substrate 1, and a plurality of pairs of sustain electrodes 2 in which a scan electrode 2 and a common electrode 3 form a pair on the top surface of the front substrate 1. 3) are formed parallel to each other. In addition, although not shown in the drawing, a bus electrode may be provided on the sustain electrode to reduce the resistance of the electrode. A front dielectric layer 4 is formed on the top surface of the sustain electrode pair and the front substrate to facilitate discharging by acting as a capacitor between the sustain electrode, that is, the scan electrode 2 and the common electrode 3. A magnesium oxide (MgO) protective film 5 is formed on the top surface of the front dielectric layer 4 to protect the sustain electrode pairs 2 and 3 and the front dielectric layer 4 from sputtering occurring during discharge of each cell. . In addition, since the protective film 5 emits secondary electrons for discharging, the protective film 5 plays a role of maintaining a discharge state and limiting an extra discharge current.

A lower substrate 6 is provided below the front substrate so as to face the front substrate 1, and a plurality of address electrodes 7 are formed at a predetermined angle with the sustain electrodes at an upper portion of the rear substrate. Are formed parallel to each other in a direction perpendicular to each other. Unlike the simple stripe type in the conventional plasma display panel, the address electrode 7 is formed so that the portion facing the scan electrode is protruded from the other portion. The protruding portion 7a may be formed integrally with the address electrode, or may be formed by attaching the protruding portion 7a on an upper portion of the conventional bar electrode.

The back dielectric layer 8 is coated on the upper surface of the address electrode 7 and the back substrate 6.

3A and 4A are cross-sectional views showing the back substrate portion of the plasma display panel of FIG. 2 cut in the direction AA of the address electrode in another embodiment of the present invention, and FIGS. 3B and 4B show the address electrode; It is sectional drawing cut in the orthogonal direction BB.

3A and 3B, the rear dielectric layer 8 applied on the rear substrate 6 and the address electrodes 7 and 7a forms a flat upper surface irrespective of the protrusion 7a of the address electrode. Doing. In other words, the back dielectric layer 8 applying the protrusion 7a of the address electrode 7 opposite to the scan electrode 2 is formed thinner than the back dielectric layer applying the other portion of the address electrode.

4A and 4B, the back dielectric layer 8 also forms a protruding surface in a portion corresponding to the protrusion 7a of the address electrode 7. That is, in this case, the back dielectric layer applying the protrusion 7a of the address electrode opposite to the scan electrode is formed to be the same or thicker than the back dielectric layer applying the other part of the address electrode.

Partitions 9 are formed on the rear dielectric layer 8 in parallel with the address electrode 7 to maintain a discharge distance and prevent optical cross talk between cells, and are divided by the partitions. Red, green, and blue phosphors 10 are respectively coated on the surface.

The video display operation of the plasma display panel of the present invention having such a configuration is

First, when a specific pulse voltage is applied between the scan electrode 2 and the address electrode 7, an address discharge occurs between the scan electrode 2 and the address electrode 7 to generate a phosphor layer 10 of the corresponding discharge space (FIG. 3B). And wall charges are formed on 4b) and the front dielectric layer 4.

Thereafter, a voltage of a specific pulse is applied to the sustain electrode pairs 2 and 3, and a discharging occurs between the sustain electrodes so that the discharge gas injected into the discharge space is ionized with electrons and ions to form a plasma state.

In addition, the energy of the particles excited by the collision in the plasma state falls to the ground state to emit ultraviolet rays to the phosphor layer 10, the phosphor layer is excited by the collision of ultraviolet rays to emit visible light, the visible Light rays are emitted to the outside through the transparent front substrate 1.

In this case, the discharge gap between the address electrode 7 and the scan electrode 2 opposite to the address electrode 7 can be minimized by forming the protrusion 7a of the address electrode at the portion opposite to the scan electrode 2 formed on the front substrate 1. As a result, the address discharge voltage can be reduced and the address voltage margin can be increased.

On the other hand, if the thickness of the back dielectric layer 8 on which the address electrodes 7 and 7a are applied is too thick, the capacitance becomes large, thereby increasing the driving voltage required for driving the plasma display panel. Referring to 3b, the thickness of the back dielectric 8 of the address electrode protrusion 7a is made thinner than the thickness of the back dielectric layer 8 other than that, so that the address voltage can be reduced.

4A and 4B, the thickness of the back dielectric 8 formed on the projecting portion 7a of the address electrode is convex to the portion where the partition wall 9 is formed in the same or thicker than the portion other than the projecting portion. By being formed, the emission luminance and color purity are increased due to the increase in the emission area of the phosphor layer 10 applied on the back dielectric layer 8.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

In the plasma display panel including the protrusion address electrode according to the present invention as described above,

By minimizing the discharge gap between the address electrode and the scan electrode opposite thereto, the address discharge voltage can be reduced and the address voltage margin can be increased.

In addition, the thickness of the back dielectric layer of the address electrode protrusion can be made thin to reduce the address voltage.

In addition, there is an advantage in that the emission luminance and color purity are increased due to the increase in the emission area of the phosphor layer applied on the top of the back dielectric layer.

Claims (3)

Front substrate; A common electrode and a scan electrode disposed in parallel with each other on the front substrate; A front dielectric layer coated on upper surfaces of the common electrode and the scan electrode; A rear substrate installed to face the front substrate to form a discharge space; An address electrode disposed on the rear substrate so as to cross the common electrode and the scan electrode at a predetermined angle, and having a protrusion formed at a portion of the rear substrate opposite to the scan electrode; A back dielectric layer formed on an upper surface of the back substrate to fill the address electrode, wherein a portion of the projection electrode facing the scan electrode has the same thickness as a portion of the projection electrode of the address electrode; A back dielectric layer formed to a thicker thickness; Barrier ribs formed parallel to the address electrode on an upper surface of the rear dielectric layer; And Red, green, and blue phosphor layers applied to the discharge space partitioned by the barrier ribs; Plasma display panel comprising a delete delete