KR100739055B1 - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel having an opposite discharge structure for facilitating address discharge. The plasma display panel according to an embodiment of the present invention is disposed to face each other at a predetermined interval and is divided into a plurality of spaces therebetween. A first substrate and a second substrate having a discharge cell, a phosphor layer formed in the discharge cell, an address electrode formed in a first direction in the second substrate, and formed on the second substrate while covering the address electrode A first dielectric layer formed between the first substrate and the second substrate, the first dielectric layer is formed along a second direction crossing the first direction and protrudes toward the first substrate in a direction away from the second substrate; A first electrode and a second electrode which are formed to face each other with a space therebetween, and are exposed to the inner space of the discharge cell. A hole is formed on the surface of the first dielectric layer.

Counter discharge, address discharge, dielectric breakdown, hole

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

1 is a partially exploded perspective view illustrating a plasma display panel according to a first embodiment of the present invention.

2 is a partial plan view schematically illustrating a structure of an electrode and a discharge cell of a plasma display panel according to a first embodiment of the present invention.

3 is a partial cross-sectional view taken along line III-III of the plasma display panel shown in FIG.

4 is a partial cross-sectional view taken along the line IV-IV of the plasma display panel shown in FIG.

FIG. 5 is a view schematically showing the planar shape of the hole of the plasma display panel according to the first embodiment of the present invention.

FIG. 6 is a view schematically illustrating a planar shape of a hole of a plasma display panel according to a second embodiment of the present invention.

FIG. 7 is a view schematically illustrating a planar shape of a hole of a plasma display panel according to a third exemplary embodiment of the present invention.

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel having an opposite discharge structure for improving discharge efficiency.

In general, a plasma display pane is a display device that implements an image using visible light generated by excitation of a phosphor by vacuum ultraviolet rays (VUV) emitted from a plasma obtained through gas discharge. Such a plasma display panel can realize a large screen of 60 inches or more in a thickness of only 10 cm. In addition, since the plasma display panel is a self-luminous display device such as a CRT, the plasma display panel has excellent color reproducibility and no distortion phenomenon according to the viewing angle. In addition, the manufacturing method is simpler than LCD, and thus has advantages in terms of productivity and cost.

The structure of the plasma display panel has been developed for a long time since the 1970s, and the structure generally known is a three-electrode surface discharge type structure. The three-electrode surface discharge type structure consists of one substrate including two electrodes located on the same surface, and another substrate including an address electrode vertically spaced apart from the substrate at a predetermined distance. The discharge gas is filled between the pair of substrates, and both substrates are sealed.

In general, the presence or absence of discharge is determined by the discharge of the scan electrode connected to each line and independently controlled and the address electrode facing the scan electrode. In addition, the sustain discharge indicating luminance is made by two electrode groups located on the same plane, that is, the sustain electrode and the scan electrode.

On the other hand, when a discharge occurs between the sustain electrode and the scan electrode, the voltage distribution between the sustain electrode and the scan electrode is distorted by the space charge effect generated in the dielectric layers around the sustain electrode and the scan electrode. appear. More specifically, in the AC type 3-electrode surface discharge structure, the sustain electrode and the scan electrode alternately play the roles of the anode and the cathode according to the voltage pulse applied, and the voltage distribution between the anode and the cathode appears in a distorted form. .

That is, a cathode sheath region around the cathode, an anode sheath region around the anode, and a positive column region formed between the two regions are formed. Most of the voltage applied between the anode and the cathode is consumed in the cathode sheath region, a part of the voltage is consumed in the anode region, and little voltage is consumed in the positive column region. In addition, the electron heating efficiency in the cathode sheath region depends on the secondary electron emission coefficient of the protective film (usually MgO film) formed on the surface of the dielectric layer, and in the positive column region, most of the applied voltage is consumed for electron heating. Known.

A vacuum ultraviolet ray that strikes the phosphor and emits visible light is generated when the excited state of the xenon (Xe) gas is transferred to a stable state, and the excited state of the xenon is obtained by the collision between the xenon gas and the electrons. Therefore, in order to increase the ratio of generating the visible light (that is, the luminous efficiency) among the applied voltages, the ratio (that is, the discharge efficiency) that contributes to the discharge of the xenon gas among the applied voltages must be increased. The collision of xenon gases with electrons should be increased. In addition, in order to increase the collision of electrons with the xenon gas, the electron heating efficiency must be increased.

In the cathode sheath region, most of the applied voltage is consumed, but the electron heating efficiency is low. In the positive column region, the electron heating efficiency is very high while the applied voltage is hardly consumed. In addition, the cathode sheath region and the anode sheath region occupy a substantially constant space irrespective of the distance between the sustain electrode and the scan electrode. Therefore, in order to obtain high discharge efficiency, the positive column area must be increased, and in order to increase the positive column area, a plasma display panel having an opposite discharge structure that increases the distance between the sustain electrode and the scan electrode and the opposite area is required.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display panel having an opposite discharge structure which further facilitates address discharge in a plasma display panel.

In order to achieve the above object, a plasma display panel according to an embodiment of the present invention includes a first substrate and a second substrate, which are disposed to face each other at a predetermined interval, and are provided with discharge cells divided into a plurality of spaces therebetween; A phosphor layer formed in the discharge cell, an address electrode formed in a second direction in the second substrate, a first dielectric layer formed on the second substrate while covering the address electrode, and the first substrate and the first substrate A first electrode which is formed between two substrates along a second direction crossing the first direction and protrudes toward the first substrate in a direction away from the second substrate, and is formed to face each other with a space therebetween; A hole may be formed on a surface of the first dielectric layer including a second electrode and exposed to the inner space of the discharge cell.

In addition, in the direction parallel to the second substrate, the hole may be formed closer to the second electrode than the first electrode.

A plurality of holes may be formed on the first dielectric layer, and the plurality of holes may be formed closer to the second electrode than the first electrode in a direction parallel to the second substrate.

Further, the distance from the surface of the first dielectric layer to the address electrode measured in the direction perpendicular to the second substrate is greater than the depth of the hole measured in the direction perpendicular to the second substrate from the surface of the first dielectric layer. It is largely formed.

Further, the hole is a condition of D ≦ T when the size of the maximum width of the hole measured in the direction parallel to the second substrate is D, and the maximum depth of the hole measured in the direction perpendicular to the second substrate is T. It may be formed so as to satisfy, preferably D and T may be formed the same as each other.

The planar shape of the hole may be made of a circle, oval, or polygon.

The hole may have a slit shape corresponding to each discharge cell and having a long axis in a second direction.

In the cross section of the first electrode and the second electrode, it is preferable that the length in the direction perpendicular to the second substrate is longer than the length in the direction parallel to the second substrate.

Each of the first electrode and the second electrode is disposed to cross a boundary of neighboring discharge cells along the first direction, and is alternately arranged along the first direction.

A second dielectric layer may be formed on outer surfaces of the first electrode and the second electrode, and a protective layer may be further formed on outer surfaces of the first dielectric layer and the second dielectric layer.

The second dielectric layer includes a first dielectric layer portion formed along the first direction and a second dielectric layer portion formed in a direction crossing the first dielectric layer portion, and the first dielectric layer portion and the second dielectric layer portion A plurality of first discharge spaces are partitioned.

A partition wall may be formed on the first substrate to partition a second discharge space facing the first discharge space, and the first discharge space and the second discharge space may form one discharge cell.

The partition wall may include a first partition member formed along the first direction while corresponding to the first dielectric layer part, and a second partition wall formed in a direction crossing the first partition member while corresponding to the second dielectric layer part. The member may include a member, and the first partition member and the second partition member may be formed of the same material as the first substrate.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like elements throughout the specification.

1 is a partially exploded perspective view illustrating a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 1, the plasma display panel according to the first exemplary embodiment of the present invention basically includes a first substrate 10 (hereinafter referred to as a "back substrate") and a second substrate 20 (hereinafter referred to as a "front substrate"). The battery cells are disposed to face each other at predetermined intervals, and a plurality of discharge cells 17 are partitioned between the rear substrate 10 and the front substrate 20. In the discharge cell 17, a phosphor layer 19 that absorbs ultraviolet rays and emits visible light is formed. In addition, a discharge gas (eg, a mixed gas including xenon (Xe), neon (Ne), etc.) is filled in the discharge cell 17 to cause plasma discharge.

Address electrodes 22 are formed on the opposite surface of the back substrate 10 of the front substrate 20 in a first direction (y-axis direction in the drawing). These address electrodes 22 are formed side by side while maintaining a predetermined distance from each other. The first dielectric layer 24 is formed on the front substrate 20 while covering the address electrode 22, and the first electrode 25 (hereinafter referred to as a 'holding electrode') is formed on the first dielectric layer 24. And a second electrode 26 (hereinafter referred to as a “scan electrode”) are formed along the second direction (the x-axis direction in the drawing) that intersects the first direction (y-axis direction). In addition, a second dielectric layer 28 is formed on the first dielectric layer 24 while covering the sustain electrode 25 and the scan electrode 26.

This second dielectric layer 28 includes a first dielectric layer portion 28a and a second dielectric layer portion 28b. The first dielectric layer portion 28a is formed along the first direction (y-axis direction in the drawing), and the second dielectric layer portion 28b is formed in a second direction (x-axis in the drawing) crossing the first dielectric layer portion 28a. Direction). A plurality of first discharge spaces 21 are formed in the first dielectric layer portion 28a and the second dielectric layer portion 28b that cross each other.

On the other hand, a partition wall 16 for partitioning a plurality of second discharge spaces 18 is formed on the opposite surface of the front substrate 20 of the rear substrate 10. In the present embodiment, the partition wall 16 is formed by etching the back substrate 10 in a shape corresponding to the second discharge space 18. As a method of etching the back substrate 10 into a shape corresponding to the second discharge space 18, a known method may be used. For example, the back substrate 10 may be etched by a sand blast method. In this case, the partition 16 and the back substrate 10 are formed of the same material. However, the partition wall may be formed on the rear substrate 10 by using a partition material having a material different from that of the rear substrate 10, which is also within the scope of the present invention.

Meanwhile, the partition wall 16 includes a first partition member 16a and a second partition member 16b. The first partition wall member 16a is formed along the first direction (y-axis direction in the drawing) while corresponding to the first dielectric layer section 28a, and the second partition wall member 16b is formed with the second dielectric layer section 28b. Correspondingly, it is formed to intersect with the first partition member 16a. The 2nd discharge space 18 is partitioned by these 1st partition member 16a and the 2nd partition member 16b. Such a barrier rib structure is not limited to the above-described structure, and a stripe barrier rib structure made of only a barrier member parallel to the first direction (y-axis direction in the drawing) may also be applied to the present invention, and various shapes defining a second discharge space may be applied. The bulkhead structure is also possible and is also within the scope of the present invention.

The first discharge space 21 is partitioned on the front substrate 20 side by the first dielectric layer portion 28a and the second dielectric layer portion 28b, and the first partition member 16a and the second partition member 16b are separated from each other. By this, the second discharge space 18 is partitioned on the back substrate 10 side. The first discharge space 21 and the second discharge space 18 are formed in a shape corresponding to each other, so that substantially one discharge cell 17 is formed.

The phosphor layer 19 is formed in the discharge cell 17. More specifically, the phosphor layer 19 is formed in the second discharge space 18 formed on the rear substrate 10 side. In this way, the address electrode 22 is formed on the front substrate 20 side and the phosphor layer 19 is formed on the rear substrate 10 side, so that the discharge start voltage at the address discharge is uniform for each discharge cell 17. There is an advantage that can be formed.

That is, in the conventional three-electrode surface discharge structure, since the phosphor layer is positioned between the address electrode and the scan electrode causing the address discharge, the discharge start voltage of the address discharge is uneven due to the different dielectric constants of the red, green, and blue phosphor layers. There was a downside. However, in the present embodiment, the address electrode 22 and the scan electrode 26 causing the address discharge are provided on the front substrate 20 side, and the phosphor layer 19 is provided on the rear substrate 10 side. The disadvantage of can be solved.

In addition, since the address discharge occurs between the address electrode 22 provided on the front substrate 20 side and the scan electrode 26 disposed between the front substrate 20 and the back substrate 10, the back substrate 10 The charges do not accumulate upon the address discharge on the phosphor layer 19 formed on the () side. For this reason, it is possible to prevent the phosphor lifetime from being reduced by ion sputtering while charges are accumulated on the phosphor layer 19.

2 is a partial plan view schematically illustrating a structure of an electrode and a discharge cell of a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 2, the address electrode 22 formed on the front substrate 20 along the first direction (y-axis direction in the drawing) includes a bus electrode 22a and an enlarged electrode 22b. The bus electrode 22a is formed along the first direction (y-axis direction in the drawing) while corresponding to the first partition member 16a, and the enlarged electrode 22b corresponds to each discharge cell 17 and corresponds to the bus electrode. It extends from 22a toward the center of each discharge cell 17.

In this case, the enlarged electrode 22b may be formed of a transparent electrode, for example, an indium tin oxide (ITO) electrode, to secure the aperture ratio of the front substrate 20. In this embodiment, the magnification electrode is formed to have a rectangular planar shape, but an magnification electrode having another planar shape may also be applied to this embodiment. For example, a triangular shaped enlarged electrode whose width gradually decreases from the scan electrode 26 toward the sustain electrode 25 may also be applied to this embodiment, which is also within the scope of the present invention. In addition, the bus electrode 22a may be made of a metal electrode in order to compensate for the high resistance of the transparent electrode to improve the electrical conductivity. In the present embodiment, since the bus electrodes 22a are formed in parallel with each other while passing through the boundaries of neighboring discharge cells 17 in the second direction (the x-axis direction of the drawing), the front substrate 20 may be formed even though the bus electrodes 22a are formed of metal electrodes. ) Has the advantage of not lowering the aperture ratio.

On the other hand, the sustain electrode 25 and the scan electrode 26 are formed in the direction crossing the address electrode 22. In the present exemplary embodiment, the sustain electrode 25 and the scan electrode 26 pass in the first direction (y-axis direction in the drawing) while passing through boundaries of neighboring discharge cells 17 in the y-axis direction of the drawing in the first direction 9. Alternately formed. The scan electrode 26 interacts with the address electrode 22 to cause an address discharge in the address period. The discharge cells 17 to be turned on by this address discharge are selected. The sustain electrode 25 mainly interacts with the scan electrode 26 to cause sustain discharge in the sustain period. This sustain discharge causes an image to be displayed on the front substrate 20. However, the role thereof may vary depending on the discharge voltage applied to each electrode, and the present invention is not limited thereto.

In addition, the sustain electrode 25 and the scan electrode 26 may be formed of a metal electrode. That is, in this embodiment, since the sustain electrode 25 and the scan electrode 26 are disposed at the boundary between the discharge cells 17 neighboring in the first direction (y-axis direction in the drawing), even if these electrodes are formed of metal, the aperture ratio Deterioration can be prevented.

In addition, the region S shown in FIG. 2 schematically shows a position where holes are formed. That is, the holes are formed closer to the scan electrode 26 than to the sustain electrode 25. The structure and operation of this hole will be described in detail with the changed drawings.

3 is a partial cross-sectional view taken along line III-III of the plasma display panel shown in FIG. 4 is a partial cross-sectional view taken along the line IV-IV of the plasma display panel shown in FIG.

Referring to FIG. 3, the storage electrode 25 and the scan electrode 26 are formed on the first dielectric layer 24 covering the address electrode 22. The cross sections of the sustain electrodes 25 and the scan electrodes 26 have a direction (y-axis) in which a length h in a direction perpendicular to the substrates 10 and 20 (z-axis direction) is parallel to the substrates 10 and 20. Direction) may be formed longer than the length (W). In other words, the height from the front substrate 20 surface of the sustain electrode 25 and the scan electrode 26 can be formed higher. By increasing the heights of the sustain electrodes 25 and the scan electrodes 26, the amount of reduction in the size of the discharge cells may be compensated even when the size of the discharge cells is to be reduced in order to realize the high-definition display. Further, by increasing the area of the opposing surface between the sustain electrode 25 and the scan electrode 26, higher luminous efficiency can be obtained compared to the surface discharge structure.

On the other hand, the second dielectric layer 28 is formed on the outer surfaces of the sustain electrode 25 and the scan electrode 26. The second dielectric layer 28 and the first dielectric layer 24 covering the address electrode 22 may be made of the same material, and serve to protect each electrode from collision of electric charges generated during gas discharge. In addition, wall charges may accumulate on the first dielectric layer 24 and the second dielectric layer 28 during the address discharge, and the wall charges thus accumulated may be discharged during the sustain discharge between the sustain electrode 25 and the scan electrode 26. It lowers the voltage.

In addition, a protective film 29 may be further formed on the surfaces of the first dielectric layer 24 and the second dielectric layer 28, and is preferably formed on the surface of the dielectric layer exposed to gas discharge. As an example of the protective film 29, an MgO protective film 29 may be used. The MgO protective film 29 serves to protect the dielectric layer from collision of ionized ions during gas discharge. In addition, the discharge efficiency of the MgO passivation layer 29 may be improved because the emission coefficient of the secondary electrons is also high when ions collide with each other.

Meanwhile, a plurality of holes 23 are formed in the first dielectric layer 24 corresponding to the second discharge space 21. These holes 23 are formed on the surface of the first dielectric layer 24 with a predetermined distance from each other. The spacing between the holes 23 can be adjusted according to the electrode structure and the discharge characteristics. Since the holes 23 are formed in the first dielectric layer 24, address discharge may be performed at a low discharge start voltage.

More specifically, a predetermined voltage is applied to each of the address electrode 22 and the scan electrode 26 for address discharge. In this embodiment, since the hole 23 is located between the discharge path of the address electrode 22 and the scan electrode 25, when the voltage lower than the general address discharge start voltage is applied, the hole 23 is discharged first. (Capillary discharge) is disclosed.

That is, the thickness of the first dielectric layer 24 between the hole 23 and the front substrate 20 is thinner than the thickness of the first dielectric layer 24 corresponding to the second discharge space 21 to form a strong electric field. Further, on the side of the hole 23, an electric field is formed in a direction perpendicular to the side of the hole 23 and gathers to the center of the hole 23, thereby forming a stronger electric field, and capillary discharge occurs first at a low voltage.

The discharge generates plasma in the hole 23, and the plasma diffuses toward the first discharge space 21 to generate a discharge between the address electrode 22 and the scan electrode 26. That is, when the hole 23 is not formed on the first dielectric layer 24, the hole 23 is formed on the first dielectric layer 24 than the discharge start voltage between the address electrode 22 and the scan electrode 26. When formed, the discharge start voltage between the address electrode 22 and the scan electrode 26 may be lower.

On the other hand, the maximum width D of the hole 23 measured in the direction parallel to the front substrate 20 is the maximum depth T ₁ of the hole 23 measured in the direction perpendicular to the front substrate 20. It may be formed equal to or smaller than), preferably formed substantially the same as each other. When the maximum width D of the hole 23 is formed larger than the maximum depth T ₁ of the hole, capillary discharge phenomenon becomes less likely to occur, and the address discharge start voltage also increases.

As shown in FIG. 3 and FIG. 4, the holes 23 are preferably formed closer to the scan electrode 26 than the sustain electrode 25 on the first dielectric layer 24. That is, the distance L ₁ between the hole 23 and the scan electrode 26 measured in the direction parallel to the front substrate 20 is the distance between the hole 23 and the sustain electrode 25 measured in the same direction. It is formed shorter than (L ₂ ). More specifically, the address discharge does not occur between the address electrode 22 and the sustain electrode 25, but occurs between the address electrode 22 and the scan electrode 26. Therefore, when the holes 23 are formed closer to the scan electrode 26 than the sustain electrode 25 as in the present embodiment, the holes located between the discharge paths of the scan electrode 26 and the address electrode 22 are formed. A strong electric field is formed around the 23. This strong electric field causes electron density to increase around the holes 23 in comparison with other areas. Therefore, the electron density is improved at the time of address discharge, which helps in the formation of wall charges, and the efficiency of the address can be improved.

In addition, the holes 23 are formed closer to the scanning electrode 26 side than the sustain electrode 25 on the first dielectric layer 24 corresponding to the first discharge space 21, thereby causing dielectric breakdown of the first dielectric layer 24. Can be minimized. More specifically, in the present embodiment, the address electrode 22 is disposed on the front substrate 20, and the scan electrode 26 is disposed between the front substrate 20 and the rear substrate 10. The distance between the address electrode 22 and the scan electrode 26 is shorter than that of the general surface discharge three electrode structure. In this case, the shortest distance between the scan electrode 26 and the address electrode 22 is formed at the boundary between neighboring discharge cells in the first direction (y-axis direction in the drawing). For this reason, at the time of address discharge, insulation breakdown of the first dielectric layer 24 may occur between the scan electrode 26 and the address electrode 22 which form this shortest distance. However, as in this embodiment, the holes 23 are formed on the first dielectric layer 24, so that the first dielectric layer 24 formed at the shortest distance between the scan electrode 26 and the address electrode 22 is formed. Before causing breakdown, discharge is initiated inside the holes 23. In addition, the discharge generated in the holes 23 may be induced into the first discharge space 21, thereby minimizing the risk of dielectric breakdown of the first dielectric layer 24.

In addition, in the present embodiment, the distance T ₂ from the surface of the first dielectric layer 24 to the address electrode 22 is greater than the depth T ₁ of the hole 23. That is, the first dielectric layer 24 is positioned between the bottom surface of the holes 23 and the address electrode 22. Thus, when the depth T ₁ of the hole 23 is equal to the distance T ₂ from the surface of the first dielectric layer 24 to the address electrode 22, that is, the address electrode 22 is discharged firstly. Rather than being exposed to the space 21, the risk of dielectric breakdown of the first dielectric layer 24 is reduced.

FIG. 5 is a view schematically showing the planar shape of the hole of the plasma display panel according to the first embodiment of the present invention.

Referring to FIG. 5, the planar shape of the holes 23 formed on the first dielectric layer 24 may be formed in a circular shape, and the scan electrode 26 may be formed in the first direction (y-axis direction in the drawing) rather than the storage electrode 25. It is formed closer to the side. By forming the planar shape of the hole 23 in a circular shape, the discharge occurring in the hole at the address discharge can be started more efficiently. In addition, the planar shape of the hole 23 may be formed in an elliptical shape rather than a circular shape, which also belongs to the scope of the present invention.

Hereinafter, the second embodiment and the third embodiment of the present invention will be described. The second embodiment and the third embodiment are the same or similar to each other in the configuration and operation different from the first embodiment, detailed description thereof will be omitted. However, since the plane shape of the hole is formed differently from the first embodiment, it will be described with reference to this.

6 is a view schematically showing the planar shape of the hole according to the second embodiment of the present invention. That is, compared with the first embodiment, the second embodiment shown in FIG. 6 has a polygonal planar shape of the hole 223. More specifically, in the second embodiment, the planar shape of the hole 223 is formed into a regular hexagon. However, a hole 223 having a polygonal planar shape other than a regular hexagon may also be applied to the present invention. In such a case, a strong electric field is formed around the hole 223 at the time of address discharge, and the electron density increases around the hole 223, whereby the efficiency of the address can be improved.

7 is a view schematically showing the planar shape of the hole according to the third embodiment of the present invention.

In the third embodiment shown in Fig. 7, the planar shape of the hole 323 is formed in a slit shape when compared with the first embodiment. In the third embodiment, the hole 323 has a slit shape. That is, the hole 323 is formed in a slit shape having a long axis in the second direction (x-axis direction in the drawing) while corresponding to each discharge cell.

Even in such a case, a strong electric field is formed around the slit-shaped hole 323 at the time of address discharge, and the electron density increases around this hole 323, whereby the efficiency of the address can be improved.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications or changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. It goes without saying that it belongs to the scope of the present invention.

According to the plasma display panel according to the present invention as described above, by forming a plurality of holes on the dielectric layer covering the address electrode, the discharge start voltage is lowered during the address discharge, the smooth address discharge can be performed.

In addition, the electron density around the holes becomes relatively higher than other areas during address discharge, so that the address efficiency can be improved.

In addition, since the hole is formed, the discharge can be easily induced into the discharge space in which the discharge is substantially generated, thereby minimizing the dielectric breakdown of the dielectric layer formed at the shortest distance between the address electrode and the scan electrode.

In addition, since the address electrode is formed on the front substrate, it is possible to prevent the phosphor lifetime from being reduced by ion sputtering or the like while charges are accumulated on the phosphor.

In addition, a long gap discharge, which is known to be excellent in luminous efficiency, becomes possible by opposing discharge between the sustain electrode and the scan electrode, whereby a higher luminous efficiency can be obtained than in the conventional surface discharge structure.

Claims (16)

A first substrate and a second substrate disposed to face each other at predetermined intervals, the discharge cells being divided into a plurality of spaces therebetween; A phosphor layer formed in the discharge cell; An address electrode formed along the first direction in the second substrate; A first dielectric layer formed on a second substrate while covering the address electrode; A space between the first substrate and the second substrate is formed along a second direction perpendicular to the first direction and protrudes toward the first substrate in a direction away from the second substrate and spaces therebetween A first electrode and a second electrode which are formed to face each other with respect to each other; And And a second dielectric layer formed on outer surfaces of the first electrode and the second electrode. The first electrode and the second electrode have a longer length in a direction perpendicular to the second substrate than a length in a direction parallel to the second substrate in a cross section of the first electrode and the second electrode. Protrudes toward the first substrate, A hole is formed in a surface of the first dielectric layer exposed to the inner space of the discharge cell, The hole, A plasma display panel that satisfies the following conditions when D is the maximum width of the hole measured in the direction parallel to the second substrate and D is the maximum depth of the hole measured in the direction perpendicular to the second substrate. . D ≤ T The method of claim 1, And the hole is formed closer to the second electrode than the first electrode in a direction parallel to the second substrate. The method of claim 1, A plurality of holes are formed on the surface of the first dielectric layer, and in the direction parallel to the second substrate, the plurality of holes provided in at least two corresponding to the inner space of the discharge cell have a second electrode rather than a first electrode. Plasma display panel formed closer to the. The method of claim 1, The distance from the surface of the first dielectric layer to the address electrode measured in the direction perpendicular to the second substrate is greater than the depth of the hole measured from the surface of the first dielectric layer in the direction perpendicular to the second substrate. Plasma display panel. delete The method of claim 1, And the D and the T are formed to be the same. The method of claim 1, And a planar shape of the hole is circular. The method of claim 1, And a planar shape of the hole is polygonal. The method of claim 1, And said hole has a slit shape corresponding to each discharge cell and having a long axis in a second direction. delete The method of claim 1, Each of the first electrode and the second electrode is disposed to cross a boundary of neighboring discharge cells along the first direction, and is alternately arranged along the first direction. delete The method of claim 1, And a passivation layer formed on surfaces of the first dielectric layer and the second dielectric layer. The method of claim 1, The second dielectric layer includes a first dielectric layer portion formed along the first direction and a second dielectric layer portion formed in a direction perpendicular to the first dielectric layer portion. And a plurality of first discharge spaces defined by the first dielectric layer portion and the second dielectric layer portion. The method of claim 14, A partition wall for partitioning a second discharge space facing the first discharge space is formed on the first substrate, wherein the first discharge space and the second discharge space form a discharge cell. The method of claim 15, The partition wall may include a first partition member formed along the first direction while corresponding to the first dielectric layer part, and a second partition wall formed perpendicularly to the first partition member while corresponding to the second dielectric layer part. Including members, The first barrier member and the second barrier member are formed of the same material as the first substrate.

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