KR100303319B1 - Driving method of plasma display panel - Google Patents
Driving method of plasma display panel Download PDFInfo
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- KR100303319B1 KR100303319B1 KR1019990025020A KR19990025020A KR100303319B1 KR 100303319 B1 KR100303319 B1 KR 100303319B1 KR 1019990025020 A KR1019990025020 A KR 1019990025020A KR 19990025020 A KR19990025020 A KR 19990025020A KR 100303319 B1 KR100303319 B1 KR 100303319B1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2927—Details of initialising
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
본 발명은 플라즈마 디스플레이 패널을 구동함에 있어서 초기화 과정인 리셋구간에서 전면 방전을 할 때 별도의 더블링 회로를 사용하지 않고 전면방전을 하여 구동회로를 간단히 제작할 수 있는 방법으로서, 이를 위해 플라즈마 디스플레이 패널상에 화상을 표시하기 위하여 1프레임을 다수개의 서브필드로 분할구동하며, 상기 각 서브필드를 리셋구간, 어드레스구간, 유지구간으로 분할 구동하는 3전극 면방전 PDP의 구동방법 중 상기 리셋구간에서 전체 셀의 전면방전을 일으켜 플라즈마 디스플레이 패널을 초기화 시키는 구동방법에 있어서, 유지전극에는 양의 전압을 인가하고, 주사전극에는 음의 전압을 인가하여 전면방전 전압을 만들어 주고 동시에 데이터 전극에서의 벽전하 생성방지를 위한 바이어스 전압을 인가하는 것을 포함한다.The present invention is a method of simply manufacturing the driving circuit by performing a front discharge without using a separate doubling circuit when the front discharge in the reset section, which is an initialization process in driving the plasma display panel. In order to display an image, one frame is divided into a plurality of subfields, and each subfield is divided into a reset section, an address section, and a sustain section. In the driving method for initializing the plasma display panel by causing the front discharge, a positive voltage is applied to the sustain electrode and a negative voltage is applied to the scan electrode to make the front discharge voltage and prevent the generation of wall charges at the data electrode. Applying a bias voltage for the circuit.
Description
본 발명은 플라즈마 디스플레이 패널(Plasma display panel,이하 PDP라 함)의 구동방법에 관한 것이다.The present invention relates to a method of driving a plasma display panel (hereinafter referred to as PDP).
도1은 종래의 PDP구동방법 중 ADS(Address-Display separation)구동방법을 사용하였을 때의 전압 파형도를 도시한 것이다.FIG. 1 shows a voltage waveform diagram when an address-display separation (ADS) driving method of the conventional PDP driving method is used.
상기 PDP구동을 ADS방식으로 구동할 때, 각 서브필드는 리셋(reset)구간, 어드레스(address) 구간, 유지(sustain) 구간으로 나뉘어진다. 이미 알려진 바와 같이 256계조를 실현하기 위하여 1개의 프레임은 8개의 서브필드로 나뉘어지고, 8개의 서브필드 각각은 다시 상기 리셋구간, 어드레스 구간, 유지 구간으로 나뉘어진다.When driving the PDP drive using the ADS method, each subfield is divided into a reset section, an address section, and a sustain section. As already known, one frame is divided into eight subfields to realize 256 gray levels, and each of the eight subfields is divided into the reset period, the address period, and the sustain period.
상기 리셋 구간에는 먼저 주사전극(Y1)이 접지전위로 되고, 동시에 유지전극(X)에 전압 Vs+α(약 300V)로 된 전면기입펄스, 즉 전면 방전전압(Vw)이 인가된다. 상기와 같이 통상적인 방전개시전압(Vf)보다 높은 상기 전면 방전전압(Vw, Vs＋α)를 인가하여 셀 전체를 고르게 방전을 시킨다.In the reset period, first, the scan electrode Y1 becomes the ground potential, and at the same time, a front write pulse having a voltage Vs + α (about 300 V), that is, a front discharge voltage Vw is applied to the sustain electrode X. As described above, the front discharge voltages Vw and Vs + α higher than the normal discharge start voltage Vf are applied to evenly discharge the entire cell.
상기와 같이 전면기입펄스가 인가된 결과, 이전의 표시상태와는 관계없이 전 표시라인의 전 방전셀로 기입방전이 이루어진다. 이때, 데이터 전극에는 공통으로 전압 Va(약 100V)가 인가되어 있다. 다음으로 상기 유지전극(X)과 상기 데이터 전극의 전위를 0V로 하면, 앞서 동작된 전면기입방전에 의해 축적된 벽전하 자체의 전위차에 의해 모든 방전 셀에서 자기소거방전이 실시된다. 상기 자기소거방전은 전극간의 전위차가 없기 때문에 공간전하를 자기중화하여 종식시키게 되므로 상기 자기소거방전에 의해 패널 내의 모든 방전셀들의 전하분포상태가 벽전하가 없는 균일한 상태로 리셋된다. 즉 방전셀의 초기화를 말한다. 상기 리셋기간을 실시하므로서 이어지는 어드레스 기간의 기입방전을 안정하게 실시할 수가 있다.As a result of applying the front write pulse as described above, the write discharge is performed to all the discharge cells of all the display lines regardless of the previous display state. At this time, a voltage Va (about 100 V) is commonly applied to the data electrodes. Next, when the potential of the sustain electrode X and the data electrode is set to 0 V, the self-erasing discharge is performed in all the discharge cells due to the potential difference of the wall charge itself accumulated by the front-side discharge. Since the self-erasing discharge is terminated by self-neutralizing the space charge because there is no potential difference between the electrodes, the charge distribution of all the discharge cells in the panel is reset to a uniform state without wall charges by the self-erasing discharge. That is, the initialization of the discharge cell. By performing the reset period, the write discharge of the subsequent address period can be stably performed.
상기 어드레스 구간은 상기 전면판의 주사전극이 스캔(scan)할 때 데이터 전극 전체에 데이터 전압을 동시에 인가한다. 어드레스의 목적은 방전해야 할 셀의 주사전극에 벽전하를 만들어 주는 것이다. 예를 들면, VGA급 PDP는 전면판에 각각 480개의 평행한 X, Y전극을 구비하며 배면판은 1개 셀의 중심부를 지나가며 X, Y전극에 수직한 2560개의 데이터 전극을 구비한다. 데이터를 주는 어드레스 구간은 주사전극과 데이터 전극에 동시에 펄스를 인가하여 방전시킨다. 즉, 주사전극 1개의 라인에 주사펄스를 인가하고 동시에 2560개의 데이터 라인에 펄스를 인가하여 방전시켜서 선택된 주사전극 1개의 라인에 벽전하를 만든다.The address section simultaneously applies a data voltage to the entire data electrode when the scan electrode of the front panel is scanned. The purpose of the address is to create wall charges on the scan electrodes of the cells to be discharged. For example, a VGA-class PDP has 480 parallel X and Y electrodes on the front panel, and the back panel has 2560 data electrodes perpendicular to the X and Y electrodes passing through the center of one cell. In the address section for giving data, pulses are simultaneously applied to the scan electrodes and the data electrodes for discharge. That is, scan pulses are applied to one line of scan electrodes and pulses are applied to 2560 data lines at the same time to generate wall charges on one line of the selected scan electrodes.
상기 유지기간은 실제로 PDP가 켜지는 구간이다. 1프레임 내의 8개의 서브필드 각각의 발광시간을 방전유지전압(Vs), 즉 유지펄스를 통해 조정하여 원하는 화상을 표시한다. 결국 서로 다른 가중치를 가지는 서브프레임 8개가 순차적으로 동작하게 된다.The maintenance period is actually a period in which the PDP is turned on. The light emission time of each of the eight subfields in one frame is adjusted through the discharge sustain voltage Vs, that is, the sustain pulse, to display a desired image. As a result, eight subframes having different weights operate sequentially.
상술한 3단계의 기간 중 초기화 단계라 할 수 있는 리셋구간에 있어서, 상기 방전개시전압(Vf)보다 더 높은 전압을 인가하기 위해서는, 상기 Vw만큼의 전압을 만들기 위해 상기 방전유지전압(Vs)을 더블링(Doubling)하기 위한 별도의 더블링(Doubling)회로가 필요하게 된다.In the reset period, which may be referred to as an initialization step, in the above-described three-step period, in order to apply a voltage higher than the discharge start voltage Vf, the discharge sustain voltage Vs is set to make the voltage as much as Vw. There is a need for a separate doubling circuit for doubling.
그리고, 상기 유지전극인 X전극과 상기 주사전극인 Y전극사이에서 전면방전이 일어나도록 인가하는 상기 전면기입펄스의 영향에 의해 데이터 전극에 원치않는 벽전하가 생성되는 결과를 초래하게 되는데, 이를 방지하기 위해서는 데이터 전극에 상기 전면방전전압의 1/2크기의 바이어스 전압(Va)을 가해주어야 한다. 그러나, 상기 바이어스 전압(Va)은 100 V 정도밖에 인가해주지 못하는 문제로 인해, 종래 기술에 따른 플라즈마 디스플레이 패널 구동시에 유지전극인 X전극 한쪽에 300V 이상의 높은 전압이 인가되어도 전면방전 시 데이터 전극에 벽전하 생성을 방지하기 위한 바이어스 전압(Va)을 150V 정도를 인가해 주지 못하기 때문에 상기 유지전극인 X전극과 상기 데이터 전극 사이에서 방전이 일어나 벽전하가 생성되는 것을 완전히 방지하기가 어렵게 된다.In addition, unwanted wall charges are generated in the data electrode due to the influence of the front write pulse applied to cause front discharge between the sustain electrode X electrode and the scan electrode Y electrode. In order to do this, a bias voltage Va of 1/2 of the front discharge voltage should be applied to the data electrode. However, since the bias voltage Va is applied only about 100 V, even when a high voltage of 300 V or more is applied to one side of the X electrode as the sustain electrode when driving the plasma display panel according to the prior art, a wall is applied to the data electrode during the front discharge. Since the bias voltage Va for preventing charge generation is not applied to about 150 V, it is difficult to completely prevent wall charges from being generated due to discharge between the sustain electrode and the X electrode and the data electrode.
상기와 같은 결과로 인해 리셋기간이 끝나고 이어지는 어드레스 기간에서 오동작을 유발하게 되는 결과를 유발하게 된다.As a result, the reset period ends and a malfunction occurs in a subsequent address period.
본 발명은 상술한 바와 같은 문제점을 보완하기 위해 안출된 것으로서, 별도의 더블링회로를 사용하지 않고 전면방전이 일어나도록 하여 보다 간단한 플라즈마 디스플레이 패널을 제작가능하도록 하는 플라즈마 디스플레이 패널 구동방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a plasma display panel driving method for enabling a simpler plasma display panel to be produced by a front discharge without using a separate doubling circuit. There is this.
도1은 종래 기술에 따른 플라즈마 디스플레이 패널의 구동 전압 파형도.1 is a driving voltage waveform diagram of a plasma display panel according to the prior art.
도2는 본 발명의 방법에 따른 플라즈마 디스플레이 패널의 구동 전압 파형도.2 is a drive voltage waveform diagram of a plasma display panel according to the method of the present invention;
상기 목적을 달성하기 위한 본 발명은, 플라즈마 디스플레이 패널상에 화상을 표시하기 위하여 1프레임을 다수개의 서브필드로 분할구동하며, 상기 각 서브필드를 리셋구간, 어드레스구간, 유지구간으로 분할 구동하는 3전극 면방전 PDP의 구동방법 중 상기 리셋구간에서 전체 셀의 전면방전을 일으켜 플라즈마 디스플레이 패널을 초기화 시키는 구동방법에 있어서, 유지전극에는 양의 전압을 인가하고, 주사전극에는 음의 전압을 인가하여 전면방전 전압을 만들어 주고 동시에 데이터 전극에서의 벽전하 생성방지를 위한 바이어스 전압을 인가하는 것을 포함하여 이루어진다.In order to achieve the above object, the present invention provides a method for dividing and driving one frame into a plurality of subfields for displaying an image on a plasma display panel, and for driving each subfield into a reset section, an address section, and a sustain section. In the driving method of an electrode surface discharge PDP, a front discharge of all cells is initiated in the reset section to initialize the plasma display panel, wherein a positive voltage is applied to the sustain electrode and a negative voltage is applied to the scan electrode. And generating a discharge voltage and simultaneously applying a bias voltage to prevent generation of wall charges at the data electrode.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시하 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명하기로 한다.Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. do.
도2는 본 발명에 따른 별도의 더블링 회로를 사용하지 않고 전면방전이 일어나도록 한 구동파형도를 도시한 것이다.2 illustrates a driving waveform diagram in which front discharge occurs without using a separate doubling circuit according to the present invention.
도2를 참조하여, 더블링 회로를 두지 않고 전면방전을 일으키는 방법을 살펴보면, 리셋기간에 유지전극(X)에는 양의 전압을 인가하고, 주사전극(Y1)에는 음의전압을 인가함으로서 상기 유지전극(X)과 상기 주사전극(Y1) 사이의 전압차가 Vw되도록 한다.Referring to FIG. 2, a method of causing a front discharge without a doubling circuit is described. In the reset period, a positive voltage is applied to the sustain electrode X, and a negative voltage is applied to the scan electrode Y1 to maintain the discharge electrode. The voltage difference between (X) and the scan electrode Y1 is set to Vw.
구체적으로 상기 유지전극(X)에는 '+Vs'를 인가하고, 상기 주사전극(Y1)에는 '-Vy'를 인가하여 상기 유지전극(X)과 상기 주사전극(Y1)사이에 방전 개시 전압(Vf)보다 큰 'Vw'가 인가되도록 하는 것이다.Specifically, '+ Vs' is applied to the sustain electrode X and '-Vy' is applied to the scan electrode Y1 to discharge the discharge voltage between the sustain electrode X and the scan electrode Y1. 'Vw' larger than Vf) is applied.
이때, 상기 유지전극(X)에 인가되는 전압 'Vs'는 도2의 유지기간(sustain)에 사용되는 전압 'Vs'를 사용하고, 상기 주사전극(Y1)에 인가되는 전압 '-Vy'는 도2의 선택기간(address)에 사용되는 전압 '-Vy'를 사용하므로 전면 방전을 위한 별도의 회로 없이 초기화 하는 것이 가능하다. 또한 상기 각각의 전압 'Vs'와 전압'-Vy' 인가 시에 상기 전압 'Vs'의 인가시간을 상기 전압'-Vy'의 인가시간보다 더 크게 인가하므로서 상기 도1의 리셋기간에서의 유지전극(X)에 가하는 전압과 동일한 파형을 구현한다.In this case, the voltage 'Vs' applied to the sustain electrode X uses the voltage 'Vs' used in the sustain period of FIG. 2, and the voltage '-Vy' applied to the scan electrode Y1 is used. Since the voltage '-Vy' used in the selection address of FIG. 2 is used, it can be initialized without a separate circuit for front discharge. In addition, when the voltage 'Vs' and the voltage '-Vy' are applied, the application time of the voltage 'Vs' is greater than the application time of the voltage '-Vy', thereby maintaining the sustain electrode in the reset period of FIG. Implement the same waveform as the voltage applied to (X).
또한, 데이터 전극에서의 벽전하 생성을 방지하기 위해 인가하는바이어스(bias)전압을 도2의 리셋구간에서의 '가'부분, 즉 X전극이 양의 전압이고 Y전극이 접지전압일때는 크기 Va인 바이어스(bias)전압을 인가해주고, 도2의 리셋구간에서의 '나'부분, 즉 X전극이 양의 전압이고 Y전극이 음의 전압일때는 바이어스(bias)전압을 접지전압으로 인가하고, 다시 도2의 리셋구간에서의 '다'부분은 상기 '가'부분과 같은 크기 Va인 바이어스(bias)전압을 인가해 준다.In addition, the bias voltage applied to prevent the generation of wall charges in the data electrode is a value Va when the 'ga' portion of the reset period of FIG. 2, that is, the X electrode is a positive voltage and the Y electrode is a ground voltage. In-bias voltage is applied, and when the 'I' portion of the reset section of FIG. 2, that is, the X electrode is a positive voltage and the Y electrode is a negative voltage, a bias voltage is applied as the ground voltage. In the reset section of FIG. 2, the 'da' portion applies a bias voltage having the same magnitude Va as the 'a' portion.
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
본 발명은 리셋기간 중에 별도의 더블링 회로를 사용하지 않고 전면 방전이 일어나도록 하여 어드레싱 하기 전에 플라즈마 디스플레이 패널 전체를 균일하게 초기화 시켜주는 구동방법으로서, 보다 더 간단하게 플라즈마 디스플레이 패널의 구동회로를 제작할 수 있다.The present invention is a driving method for initializing the entire plasma display panel uniformly before addressing by causing front discharge to occur without using a separate doubling circuit during a reset period, and more easily manufacturing the driving circuit of the plasma display panel. have.
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| KR100458569B1 (en) * | 2002-02-15 | 2004-12-03 | 삼성에스디아이 주식회사 | A driving method of plasma display panel |
| KR100573165B1 (en) * | 2004-11-12 | 2006-04-24 | 삼성에스디아이 주식회사 | Driving apparatus of plasma display panel |
| KR100647641B1 (en) * | 2004-11-12 | 2006-11-23 | 삼성에스디아이 주식회사 | Method for driving plasma display panel without using X drivers |
| KR100649196B1 (en) * | 2005-08-03 | 2006-11-24 | 삼성에스디아이 주식회사 | Driving method of plasma display device |
| KR100766562B1 (en) * | 2006-07-14 | 2007-10-12 | 엘지전자 주식회사 | Method of driving for plasma display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101016676B1 (en) | 2008-12-01 | 2011-02-25 | 삼성에스디아이 주식회사 | Plasma display, and driving method thereof |
| US8310411B2 (en) | 2008-12-01 | 2012-11-13 | Samsung Sdi Co., Ltd. | Plasma display and driving method thereof |
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