KR100649196B1 - Driving method of plasma display device - Google Patents

Abstract

A driving method of a plasma display device is provided to restrict erroneous discharge between an address electrode and a sustain electrode during a sustain period of a non-addressed cell. In a plasma display device comprising plural first and second electrodes(Y,X), plural third electrodes(A) crossing the first and second electrodes, and discharge cells formed by the first, second, and third electrodes, a driving method includes the steps of: applying first sustain discharge pulse having alternately formed high and low level voltages, to the first electrodes during a sustain period(S1) of at least a first subfield(SF1) of plural subfields; applying a first positive voltage to the third electrode during a first period including at least a section of the sustain period where the high level voltage is firstly applied to the first electrode; and applying the first voltage to the third electrode during a second period including at least a section of the sustain period where the high level voltage is finally applied to the first electrode. The sum of the first and second periods corresponds to a predetermined section of the sustain period.

Description

Driving method of plasma display device {DRIVING METHOD OF PLASMA DISPLAY DEVICE}

1 is a view showing a schematic configuration of a plasma display device according to an embodiment of the present invention.

2 illustrates a driving waveform diagram of a plasma display device according to a first exemplary embodiment of the present invention.

3A to 3E are diagrams showing wall charge distribution according to application of a driving waveform to the plasma display device according to the first embodiment of the present invention.

FIG. 4 is a diagram for describing a method of driving a plasma display device in which scan electrode lines are divided into two groups, and one frame is divided into a plurality of subfields for each group.

5 is a driving waveform diagram of a plasma display device according to a second embodiment of the present invention.

6 is a driving waveform diagram of a plasma display device according to a third exemplary embodiment of the present invention.

The present invention relates to a method of driving a plasma display device including a plasma display panel (PDP).

A plasma display device is a flat display device that displays characters or images by using plasma generated by gas discharge. The display panel may have tens to millions or more of discharge cells (hereinafter, referred to as "cells") depending on its size. Arranged in matrix form.

In general, the plasma display device divides one frame into a plurality of subfields having respective weights, and time-division controls them to implement gray scale. Each subfield consists of a reset period, an address period, and a sustain period. The reset period is a period for initializing the state of each cell to smoothly perform an address operation on the cell, and the address period is a period for selecting a cell to be turned on from a plurality of cells through address discharge. That is, in the address period, scan pulses are sequentially applied to the plurality of scan electrodes, and address pulses are applied to the address electrodes. At this time, address discharge occurs in a cell to which a scan pulse and an address pulse are simultaneously applied. In the sustain period, sustain discharge pulses having a high level voltage and a low level voltage are alternately applied to the scan electrode and the sustain electrode in opposite phases to generate sustain discharge in a cell to be turned on.

On the other hand, in the cell selected as the cell to be turned on in the address period, a large amount of negative wall charges are formed on the address electrode. Therefore, when the address electrode is biased to the ground voltage when the sustain discharge occurs in the sustain period, a high level voltage is applied. Discharge may occur between the scan electrode and the address electrode. Then, since the subsequent sustain discharge does not occur smoothly, recently, when the sustain discharge pulse is first applied to the scan electrode and / or the sustain electrode, a positive voltage is applied to the address electrode.

However, in the reset period, the cell may be initialized with a large amount of positive wall charges accumulated on the address electrode. In such a state, when a low level sustain discharge pulse is applied to the sustain electrode and a positive voltage is applied to the address electrode, mis-discharge may occur between the sustain electrode and the address electrode of the unselected cell.

That is, due to the positive charge accumulated on the address electrode and the positive voltage applied to the address electrode, erroneous discharge may occur between the address electrode and the sustain electrode of the cell not selected in the address period.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a method of driving a plasma display device capable of preventing an undischarged cell from being erroneously discharged in a sustain period.

According to one feature of the present invention for achieving the above object, it comprises a plurality of first electrodes and second electrodes, a plurality of third electrodes formed to cross the first and second electrodes, A method of driving a plasma display device in which discharge cells are formed by a first electrode, a second electrode, and a third electrode is provided. The driving method includes applying a first sustain discharge pulse alternately having a high level voltage and a low level voltage to the first electrode in a sustain period of at least one first subfield among a plurality of subfields; Applying a positive first voltage to the third electrode during a first period comprising at least a portion of a period during which the high level voltage is first applied to the first electrode during the sustain period; And applying the first voltage to the third electrode during a second period including at least a portion of a period during which the high level voltage is last applied to the first electrode during the sustain period. It includes. Wherein the sum of the first period and the second period is a part of the maintenance period.

According to another feature of the invention, it comprises a plurality of first electrodes, a plurality of second electrodes and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode, wherein the first, second And a driving method of dividing and driving one frame into a plurality of subfields in a plasma display device in which discharge cells are formed by a third electrode. In this driving method, the plurality of first electrodes are divided into a plurality of groups, and the subfield includes the plurality of sustain periods and a plurality of address periods corresponding to the plurality of groups, respectively, Selecting a cell to be turned on from among the cells of each group in an address period of each group; In a first sustain period positioned between two adjacent address periods of the plurality of sustain periods, a high level voltage and a low level voltage are alternately applied to the plurality of first electrodes, and the high level voltage is first applied. Making the third electrode a positive first voltage during a first period comprising at least a portion of the applied period; The high level voltage and the low level voltage are alternately applied to the plurality of first electrodes in a second sustain period that is located after the last address period of the subfield among the plurality of sustain periods. And making the third electrode a positive second voltage during a second period including at least a portion of a period during which the high level voltage is last applied to one electrode.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

In addition, the wall charge referred to in the present invention refers to a charge formed in the wall (eg, a dielectric layer) of the discharge cell close to each electrode and accumulated in the electrode. Such wall charges are not actually in contact with the electrodes themselves, but here wall charges are described as "formed", "accumulated" or "stacked" on the electrodes. In addition, wall voltage refers to the potential difference formed in the wall of a discharge cell by wall charge.

A method of driving a plasma display device according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, a plasma display device according to an exemplary embodiment of the present invention will be described with reference to FIG. 1. 1 is a schematic conceptual diagram of a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a plasma display device according to an exemplary embodiment of the present invention includes a plasma display panel 100, a controller 200, an address driver 300, a sustain electrode driver 400, and a scan electrode driver 500. Include. The plasma display panel 100 includes a plurality of address electrodes A1-Am extending in the column direction, a plurality of sustain electrodes X1-Xn extending in the row direction, and a plurality of scan electrodes Y1-Yn. The plurality of scan electrodes Y1-Yn and the sustain electrodes X1-Xn are arranged in pairs with each other. The discharge cells are formed by the adjacent scan electrodes, the sustain electrodes, and the address electrodes crossing them.

The controller 200 receives an image signal from the outside and outputs an address driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal. The controller 200 divides and drives one frame into a plurality of subfields, and each subfield is represented by a reset period, an address period, and a sustain period. The address driver 300 receives an address drive control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode. The sustain electrode driver 400 receives the sustain electrode driving control signal from the controller 200 and applies a driving voltage to the sustain electrode. The scan electrode driver 500 receives a scan electrode driving control signal from the controller 200 and applies a driving voltage to the scan electrode.

Next, a driving method of the plasma display device according to the first embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3A to 3E.

FIG. 2 is a driving waveform diagram of the plasma display device according to the first exemplary embodiment of the present invention, and FIGS. 3A to 3E are diagrams showing the wall charge distribution state according to the driving waveform application of the plasma display device shown in FIG. 2.

In FIG. 2, two subfields (hereinafter, referred to as "first subfield SF1 and second subfield SF2") of the plurality of subfields will be described as an example. In FIG. 2, only driving waveforms applied to one of the plurality of scan electrodes, sustain electrodes, and address electrodes Y, sustain electrodes X, and address electrodes A are illustrated.

As shown in Fig. 2, each subfield includes a reset period, an address period, and a sustain period. The reset period R1 of the first subfield includes a rising period RR1 and a falling period RF1, and the reset period R2 of the second subfield includes a falling period.

In the first subfield, in the rising period RR1 of the reset period, the voltage of the scan electrode Y is set to Vs at the voltage Vs while the reference voltage (the ground voltage 0V in FIG. 2) is applied to the sustain electrode X. Incrementally increase to voltage. Then, a weak reset discharge occurs between the scan electrode Y, the address electrode A, and the sustain electrode X, respectively, and a negative wall charge is formed on the scan electrode Y, and the address electrode A is formed. And positive wall charges are formed on the sustain electrode (X).

In the falling period RF1 of the reset period, the voltage of the scan electrode Y is gradually decreased from the Vs voltage to the Vnf voltage while the Ve voltage is applied to the sustain electrode X. Then, a weak reset discharge occurs between the scan electrode Y and the sustain electrode X and between the scan electrode Y and the address electrode A while the voltage of the scan electrode Y decreases. Then, the negative wall charges formed on the scan electrode Y and the positive wall charges formed on the sustain electrode X and the address electrode A are erased.

In this manner, after the rising period RR1 and the falling period RF1 of the reset period, all cells are initialized as cells that will not be turned on.

Next, in the address period A1, a scan pulse having a VscL voltage is sequentially applied to the plurality of scan electrodes Y to select a cell to be turned on, and the scan electrode Y to which the VscL voltage is not applied is higher than the VscL voltage. VscH voltage is applied. At this time, the Ve voltage is applied to the sustain electrode (X). The VscL voltage may be lower than or equal to the Vnf voltage.

Among the plurality of cells formed by the scan electrode Y to which the VscL voltage is applied, an address pulse having a Va voltage is applied to the address electrode A passing through the cell to be turned on, and the reference voltage (A) is applied to the remaining address electrodes A. 0V) is applied.

Then, address discharge occurs in the discharge cells formed by the address electrode A to which Va voltage is applied and the scan electrode Y to which VscL is applied, so that positive wall charges are formed on the scan electrode Y, and the sustain electrode ( In X), a negative wall charge is formed. Further, negative wall charges are also formed on the address electrode A. FIG.

Subsequently, in the sustain period S1, the sustain discharge pulse having the Vs voltage and the reference voltage are alternately applied to the scan electrode Y and the sustain electrode X in the opposite phase.

That is, the reference voltage (0V) is applied to the sustain electrode (X) when the Vs voltage is applied to the scan electrode (Y), and the reference voltage (V) is applied to the scan electrode (Y) when the Vs voltage is applied to the sustain electrode (X). 0V) is applied.

If the wall voltage is formed between the scan electrode Y and the sustain electrode X by the address discharge, when the Vs voltage is applied to the scan electrode Y, the wall electrode and the sustain voltage are sustained by the wall voltage and the Vs voltage. Discharge occurs at the electrode X.

As a result, negative wall charges are formed on the scan electrode Y and positive wall charges are formed on the sustain electrode X. When the voltage Vs is applied to the sustain electrode X in this state, sustain discharge occurs again to form a positive wall charge on the scan electrode Y and a negative wall charge on the sustain electrode X. This process is repeated the number of times corresponding to the luminance weight of the first subfield. At this time, after the Vs voltage is applied to the scan electrode Y to generate the sustain discharge, the cell is in a state as shown in FIG. 3A. After the Vs voltage is applied to the sustain electrode X to generate the sustain discharge, the cell is shown in FIG. 3B. It is in a state.

In the sustain period S1, a positive voltage is applied to the address electrode A while the first Vs voltage is applied to the scan electrode Y to prevent discharge between the address electrode A and the scan electrode Y. do. In this case, even when the first Vs voltage is applied to the sustain electrode X, a positive voltage may be applied to the address electrode A. FIG.

2, while the last sustain discharge pulse is applied to the scan electrode Y in the sustain period S1, a positive voltage is applied to the address electrode A. As shown in FIG. Then, when (-) wall charges are formed on the scan electrode Y, (+) wall charges are formed on the sustain electrode X and the address electrode A by the last sustain discharge, as shown in FIG. Compared with the case where no positive voltage is applied to A) (FIG. 3A), the amount of positive wall charges formed in the address electrode A is reduced.

If Va voltage is used as the positive voltage applied to the address electrode A in the sustain period S1, it is not necessary to form an additional power supply for supplying the positive voltage.

In the reset period R2 of the next second subfield, the voltage of the scan electrode Y is changed from the voltage Vs to the voltage Vnf while the Ve voltage is applied to the sustain electrode X as in the falling period RF1 of the first subfield. To decrease. In this case, since the voltage applied in the reset period R2 of the second subfield is the same as the voltage applied in the falling period R1 of the first subfield, a cell not selected as a cell to be turned on in the first subfield is selected from the second subfield. No discharge occurs in the reset period of the field. In the first subfield, a discharge occurs in a cell selected as a cell to be turned on and a sustain discharge occurs, and a negative wall charge formed on the scan electrode Y and a positive wall charge formed on the sustain electrode X and the address electrode A. Is erased. That is, in the reset period R2 of the second subfield, only cells in which sustain discharge has occurred in the first subfield, which is the previous subfield, are initialized.

At this time, if a positive voltage is not applied to the address electrode A as in the first embodiment of the present invention at the end of the sustain period S1 of the first subfield, the cell is initialized in the wall charge state as shown in FIG. 3A. It becomes like FIG. 3D. That is, the cell is initialized with a large amount of positive wall charges formed on the address electrode A. FIG.

On the other hand, if a positive voltage is applied to the address electrode A at the end of the sustain period S1 of the first subfield as in the first embodiment of the present invention, the cell is initialized in the wall charge state as shown in FIG. Becomes That is, since the wall charges are erased in the cell in a state where the (+) wall charges are smaller in the address electrode than in FIG. 3A, a smaller amount of the (+) wall charges remain in the address electrode A than in FIG. 3D.

Next, in the address period A2 of the second subfield, the scan pulse is sequentially applied to the scan electrode Y in the same manner as the address period A1 of the first subfield, so that the cell to be turned on is selected. The cell that will not turn on maintains the wall charge state formed in the reset period.

In the sustain period S2, a sustain discharge pulse is applied to the scan electrode Y and the sustain electrode X in the opposite phase. When the first sustain discharge pulse is applied, a positive voltage is applied to the address electrode A. At this time, in the cell that is not turned on having the state as shown in FIG. 3D, the address electrode A and the sustain electrode X are formed by the positive wall charges formed on the address electrode A and the positive voltage applied to the address electrode A. FIG. Misdischarge can occur between them.

However, in the first embodiment of the present invention, since a small amount of positive wall charges are formed in the address electrode A as shown in FIG. 3E in the unlit cell at the end of the sustain period, the address electrode A at the beginning of the sustain period. ) And the sustain electrode X do not cause an erroneous discharge.

In FIG. 2, the positive voltage Va is applied to the address electrode A while the last sustain discharge pulse is applied in the sustain period. However, the pulse width of the positive voltage Va is the width of the sustain discharge pulse. It can also be shorter.

In addition, in FIG. 2, it was described that a positive voltage is applied to the address electrode A when the first and last Vs voltages are applied to the scan electrode Y in the sustain period. Alternatively, the address electrode A may be floated when the first and last Vs voltages are applied to the scan electrode Y in the sustain period. Then, the voltage of the address electrode A increases to the positive voltage along the voltage of the scan electrode Y.

On the other hand, while the scan pulses are sequentially applied to the plurality of scan electrodes Y1 to Yn in the address period of the first embodiment of the present invention, addressing operations are sequentially performed. After the addressing operation is performed on all cells in the address period, the sustain discharge operation is performed on the cells to be turned on in the sustain period.

In this way, the sustain discharge occurs after a long time has elapsed in the cells in which the addressing operation is performed in advance in time. In such cells, since the priming particles and / or wall charges formed by the addressing discharge may be erased by a certain amount before the sustain discharge occurs, the sustain discharge may occur unstable.

Hereinafter, an embodiment of preventing unstable sustain discharge will be described in detail with reference to FIGS. 4 to 6.

4 is a diagram for describing a method of driving a plasma display device according to a second embodiment of the present invention.

As shown in FIG. 4, the scan electrodes Y _1- Y _n are divided into two group groups G1 and G2 (hereinafter, referred to as "first and second groups", respectively).

In this case, each of the first and second groups G1 and G2 may be a group consisting of odd-numbered scan electrodes and a group consisting of even-numbered scan electrodes, or may be a scan electrode formed on the plasma display panel 100. It may be a group consisting of a group consisting of a scan electrode formed in the lower portion. The plurality of scan electrodes Y1-Yn may be divided into three or more groups.

One subfield includes a reset period R, an address / sustain mixing period T1, a luminance correction period T2, and a common sustain period T3.

The reset period R is a period in which a reset waveform is applied to the discharge cells of all the groups G1 and G2 to initialize the wall charge state of the discharge cells.

In the address / sustain mixing period T1, a cell to be turned on by performing an address period A _G1 for the first group G1 is first set, and then a sustain period S ₁₁ is performed to turn on the first group G1. The cell sustains discharge.

Next, after the address period A _G2 is performed for the second group G2 and the cell to be turned on is set, the sustain periods S ₁₂ and S ₂₁ are performed to turn on the first and second groups G1 and G2. The cell sustains discharge.

When the address / sustain mixing period T1 is performed as described above, one sustain period S ₁₁ is further performed for the cells to be turned on in the first group G1 compared to the cells to be turned on in the second group G2. Therefore, in the first and second groups G1 and G2, a difference occurs in the number of sustain periods, thereby causing a luminance difference between the first and second groups G1 and G2.

In order to correct the luminance difference for each group, the luminance correction period T2 is performed in the second embodiment of the present invention. The luminance correction period T2 is a period in which sustain discharge is selectively performed for a group in which the number of sustain discharges is smaller than that of other groups.

That is, in order to match the luminance of the cells to be turned on in the second group G2 with the luminance of the cells to be turned on in the first group G1, the sustain period in the state in which the cells to be turned on in the first group G1 is set to not cause sustain discharge ( S ₂₂ ) is performed. Then, sustain discharge occurs in the cells to be turned on in the second group G2.

In this way, sustain discharge may be generated the same number of times for the cells to be turned on in the first group G1 and the second group G2.

In the common sustain period T3, the sustain period T3 is performed in common for the first and second groups G1 and G2 for a predetermined period, so that the cells to be turned on in the first and second groups G1 and G2 are turned on. Sustain discharge occurs. By adjusting the length of the common sustain period T3, the luminance weight of the corresponding subfield may be set.

In FIG. 4, the common sustain period T3 is performed after the luminance correction period T2, but may be performed before the luminance correction period T2. In addition, when the luminance weight of the corresponding subfield is satisfied by the address / sustain mixing period T1 and the luminance correction period T2, the common sustain period T3 may not be performed.

In addition, the luminance correction period T2 may be included in the address / sustain mixing period T1. For example, in FIG. 4, when the cells to be turned on in the first group G1 express the desired gray scale by one holding period S _{11 −} , the first group () for one holding period S ₁₂ thereafter. The cell to be turned on in G1) may be set to a state where no sustain discharge occurs.

Next, a driving waveform for implementing the driving method described with reference to FIG. 4 will be described in detail with reference to FIGS. 5 to 6.

5 is a driving waveform diagram of a method of driving a plasma display device according to a second embodiment of the present invention. In FIG. 5, the scan electrode YG1 of one first group G1, the scan electrode YG2 of one second group G2, one sustain electrode X, and an address electrode A are illustrated. In FIG. 5, only a part of the first subfield SF1 and the second subfield SF2 of the plurality of subfields are illustrated.

As shown in FIG. 5, the driving waveform according to the second embodiment of the present invention is similar to that of the first embodiment, and unlike the first embodiment, the address period A _G1 and the second of the first group YG1 are different. The address period A _G2 of the group YG2 is separated.

In the reset period R of the second subfield SF2, a reset waveform is applied to the first and second groups of scan electrodes YG1 and YG2 to initialize the wall charge state of the discharge cell. That is, while the Ve voltage is applied to the sustain electrode X, the voltages of the scan electrodes YG1 and YG2 gradually decrease from the voltage Vs to the voltage Vnf.

Next, in the address / sustain mixing period T1, an address period A _G1 is first performed for the first group YG1. In the address period A _G1 , while the Ve voltage is applied to the sustain electrode X, the scan pulses of the VscL voltage are sequentially applied to the scan electrodes YG1 of the first group. At this time, the VscH voltage higher than the VscL voltage is applied to the scan electrode YG2 of the second group and the scan electrode YG1 of the first group to which the scan pulse is not applied.

At this time, since the discharge does not occur because the VscH voltage is applied to the scan electrode YG2 of the second group, only a cell to be turned on is selected from among the discharge cells formed by the scan electrode YG1 and the sustain electrode X of the first group. do.

In the sustain period S ₁₁ of the address / sustain mixing period T1, the sustain discharge pulse is applied to the scan electrodes YG1 and YG2 and the sustain electrode X in the opposite phase. In FIG. 5, one sustain discharge pulse is applied.

In the sustain period S ₁₁ , when a voltage Vs is first applied to the scan electrodes YG1 and YG2 and 0 V is applied to the sustain electrode X, the cells are turned on in the cells to be turned on in the first group YG1 selected in the address period AG1. Discharge occurs. When 0 V is applied to the scan electrodes YG1 and YG2 and a Vs voltage is applied to the sustain electrode X, sustain discharge occurs in the corresponding discharge cell.

On the other hand, the sustain discharge pulse is also applied to the scan electrode YG2 and the sustain electrode X of the second group, but no sustain discharge occurs because a wall voltage is not formed between the scan electrode YG2 and the sustain electrode X.

At this time, as described in the first embodiment, in order to prevent erroneous discharge between the address electrode A and the scan electrode YG1 in the sustain period S ₁₁ of the second subfield SF2, the address electrode A is provided. Apply positive voltage.

Subsequently, an address period A _G2 is performed for the second group YG2. In the address period A _G2 , while the Ve voltage is applied to the sustain electrode X, the scan pulses of the VscL voltage are sequentially applied to the scan electrodes YG2 of the second group.

At this time, the VscH voltage is applied to the scan electrode YG1 of the first group and the scan electrode YG2 of the second group to which the scan pulse is not applied.

Then, discharge is generated in the cell to be turned on formed by the second group of scan electrode YG2 to which the scan pulse is applied and the address electrode A to which the address voltage Va is applied, and is selected as the cell to be turned on.

Next, in the sustain periods S ₁₂ and S ₂₁ of the address / sustain mixing period, the sustain discharge pulse is applied once in the opposite phase to the scan electrodes YG1 and YG2 and the sustain electrode X. First, a 0V voltage is applied to the sustain electrode X and a Vs voltage is applied to the scan electrodes YG1 and YG2 to generate sustain discharge in the cells to be turned on in the first and second groups.

Next, a voltage Vs is applied to the sustain electrode X and a voltage 0 V is applied to the scan electrodes YG1 and YG2 to generate sustain discharge in the cells to be turned on in the first and second groups.

In addition, positive wall charges are formed on the scan electrodes YG1 and YG2 of the cells to be turned on in the first and second groups, and negative wall charges are formed on the sustain electrode X.

At this time, as described above, a positive voltage Va is applied to the address electrode A in order to prevent erroneous discharge between the address electrode A and the scan electrode YG2.

In addition, since two sustain discharges are generated in the sustain period S ₁₁ more times than the cells to be turned on in the first group YG1, the cells to be turned on in the first group YG1 are compared with the cells to be turned on in the first group YG1. A luminance correction period T2 is performed to further cause two sustain discharges for the cells to be turned on in the second group YG2.

That is, in the luminance correction period T2, a voltage of 0 V is simultaneously applied to the scan electrode YG1 and the sustain electrode X of the first group. In addition, the voltage Vs is applied to the scan electrode YG2 of the second group. In this way, sustain discharge occurs in the cells to be turned on by the voltage difference Vs applied to the scan electrode YG2 and the sustain electrode XG. On the other hand, in the cells to be turned on in the first group, the sustain discharge does not occur because the voltage difference applied to the scan electrode YG1 and the sustain electrode XG is 0V.

Subsequently, a voltage of 0 V is applied to the scan electrodes YG1 and YG2 of the first and second groups, and a voltage of Vs is applied to the sustain electrode X. At this time, since the sustain discharge does not occur immediately before the first group of cells to be turned on, a positive wall charge is formed on the scan electrode YG1, so that the sustain discharge does not occur even when a 0 V voltage is applied to the scan electrode YG1.

As described above, in the luminance correction period T2, since two sustain discharges occur in the cells to be turned on in the second group in a state in which the cells to be turned on in the first group do not have sustain discharges, in the cells to be turned on in the first group and in the second group, The luminance can be matched.

In the next common sustain period T3, sustain discharge pulses are applied to the first and second groups of scan electrodes YG1 and YG2 and sustain electrode X to perform sustain discharge in common for the two groups of cells to be turned on. . At this time, when the last Vs voltage is applied to the scan electrodes YG1 and YG2 as described in the first embodiment, the address electrode A is set to a positive voltage. Then, in the sustain periods S _{11 and} S ₂₁ , it is possible to prevent erroneous discharges from occurring in the cells that will not be turned on by the positive voltage applied to the address electrode A. FIG.

6 is a driving waveform diagram of a plasma display device according to a third exemplary embodiment of the present invention.

As shown in FIG. 6, the driving waveform according to the third embodiment of the present invention has a last high level on the scan electrodes YG1 and YG2 in the sustain period of the first subfield SF1 and the second subfield SF2. The same as in the second embodiment except that the sustain discharge pulse having the voltage is applied and the positive voltage Va having the same pulse width as the sustain discharge pulse is applied to the address electrode A.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the exemplary embodiment of the present invention, it is possible to prevent the erroneous discharge between the address electrode and the sustain electrode in the sustain period of the unaddressed cell in the plasma display device.

Further, according to another embodiment of the present invention, the time interval between the address period and the sustain period can be reduced.

Claims (11)

And a plurality of third electrodes formed to intersect the plurality of first and second electrodes, the first and second electrodes, and discharge cells are formed by the adjacent first, second and third electrodes. In the method of driving a plasma display device, In the sustain period of at least one first subfield of the plurality of subfields, Applying a first sustain discharge pulse alternately having a high level voltage and a low level voltage to the first electrode; Applying a positive first voltage to the third electrode during a first period comprising at least a portion of a period during which the high level voltage is first applied to the first electrode during the sustain period; And Applying the first voltage to the third electrode during a second period including at least a portion of a period during which the high level voltage is last applied to the first electrode during the sustain period; Including, The sum of the first period and the second period is a part of the sustain period. The method of claim 1, In the retention period, Applying a second sustain discharge pulse having a high level voltage and a low level voltage to the second electrode in an opposite phase to the first sustain discharge pulse; And the first period further comprises at least a portion of a period during which the high level voltage is first applied to the second electrode. The method of claim 1, And the first voltage is equal in magnitude to the second voltage. The method according to any one of claims 1 to 3, In the address period of the at least one subfield, applying a third voltage and a fourth voltage to the first electrode and the third electrode of the discharge cell to be turned on in the sustain period among the plurality of discharge cells, respectively; , At least one of the first voltage and the second voltage is the same size as the fourth voltage. The method according to any one of claims 1 to 3, And driving the third electrode during at least one of the first period and the second period. The method according to any one of claims 1 to 3, And gradually decreasing the voltage of the first electrode in the reset period of the second subfield subsequent to the first subfield. A plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode, wherein the discharge cells are formed by the first, second, and third electrodes. A driving method in which one frame is divided into a plurality of subfields and driven in the formed plasma display device, The plurality of first electrodes are divided into a plurality of groups, and the subfields include the plurality of sustain periods and a plurality of address periods corresponding to the plurality of groups, respectively. In the subfield, Selecting a cell to be turned on from among the cells of each group in the address period of each group; In a first sustain period positioned between two adjacent address periods of the plurality of sustain periods, a high level voltage and a low level voltage are alternately applied to the plurality of first electrodes, and the high level voltage is first applied. Making the third electrode a positive first voltage during a first period comprising at least a portion of the applied period; The high level voltage and the low level voltage are alternately applied to the plurality of first electrodes in a second sustain period that is located after the last address period of the subfield among the plurality of sustain periods. Making the third electrode a positive second voltage during a second period comprising at least a portion of a period during which the high level voltage is last applied to a first electrode; Method of driving a plasma display device comprising a. The method of claim 7, wherein In the first and second retention periods, And applying a high level voltage and a low level voltage to the plurality of second electrodes in phases opposite to the high level voltage and the low level voltage applied to the plurality of first electrodes. . The method of claim 8, In the address period for each group, And applying a third voltage and a fourth voltage to the first electrode and the third electrode of the discharge cell to be selected among the discharge cells of the corresponding group, respectively. The method according to any one of claims 7 to 9, At least one of the first voltage and the second voltage is the same size as the fourth voltage driving method of the plasma display device. The method according to any one of claims 7 to 9, And driving the third electrode during at least one of the first period and the second period.

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