KR100670176B1 - Plasma display and driving method thereof - Google Patents

Abstract

A plasma display device and a driving method thereof are provided to improve the contrast of the plasma display device by performing a main reset process during a specific sub-field and an auxiliary reset process during the other sub-fields. A plasma display panel(100) includes plural address electrodes, plural sustain electrodes, and plural scan electrodes. A controller(200) receives an external image signal and outputs an address electrode driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal. The controller divides one frame into plural sub-fields, where each of the sub-fields includes a reset period, an address period, and a sustain period. An address electrode driver(300) receives the address electrode driving control signal from the controller and applies a display data signal to the address electrodes. The display data signal is used to select desired discharge cells. A sustain electrode driver(500) receives the sustain electrode driving control signal and applies a driving voltage to the sustain electrodes. A scan electrode driver(400) receives the scan electrode driving control signal from the controller and applies the driving voltage to the scan electrodes.

Description

Plasma display device and driving method thereof {PLASMA DISPLAY AND DRIVING METHOD THEREOF}

1 illustrates a driving waveform of a conventional plasma display device.

2 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention.

3 to 5 are diagrams illustrating driving waveforms of the plasma display device according to the first to third embodiments of the present invention, respectively.

The present invention relates to a plasma display device and a driving method thereof.

The plasma display device is a display device using a plasma display panel that displays text or an image by using plasma generated by gas discharge.

The display panel of the plasma display device is driven by dividing one frame into a plurality of subfields having respective weights, and each subfield is configured for a reset period, an address period, and a sustain period. Is done. The reset period is a period for initializing the state of the discharge cells in order to stably perform the address discharge, and the address period is a period for selecting a cell to be turned on from among the plurality of discharge cells through the address discharge. The sustain period is a period in which sustain discharge is performed for the cells to be turned on to actually display an image.

1 is a driving waveform diagram of a conventional plasma display device.

As shown in FIG. 1, in the address period, the VscL voltage is sequentially applied to the scan electrode Y, and the VscL voltage passes through the discharge cell to be selected from among the discharge cells formed by the scan electrode Y to which the VscL voltage is applied. An address voltage Va is applied to the address electrode A to select a discharge cell to be turned on. However, since the addressing operation is sequentially performed on all the discharge cells in the address period, the address discharge may not occur well due to the lack of priming particles in the discharge cells in the discharge cells that are addressed later in time.

An object of the present invention is to provide a plasma display device and a driving method thereof capable of performing stable address discharge.

According to an aspect of the present invention, a frame is included in a plasma display device including a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode. A method of driving by dividing into a plurality of subfields is provided. The driving method includes dividing the plurality of first electrodes into a plurality of groups including first and second groups, and dividing the plurality of subfields into a plurality of groups including first and second groups. In the subfields of the first group, initializing the discharge cells of the first group in the first reset period, selecting the discharge cells to be turned on among the discharge cells of the first group in the first address period, and performing the first reset period in the second reset period. Initializing two groups of discharge cells, selecting discharge cells to be turned on among the discharge cells of the second group in a second address period, and sustaining and discharging the discharge cells of the selected first and second groups in a sustain period; And one of the first and second reset periods in a first subfield preceding in time of the subfields of the first group gradually shifts the voltage of the second electrode from the first voltage to the second voltage.The second reset period is an auxiliary reset period, and the other is a main reset period in which the voltage of the second electrode is gradually increased from the third voltage to the fourth voltage and then gradually decreased from the fifth voltage to the sixth voltage. The first and second reset periods in the second subfield later in time among the subfields of the group are the auxiliary reset periods, respectively.

In this case, the first reset period in the first subfield is the auxiliary reset period.

According to this driving method, in the subfield of the second group, initializing a discharge cell of the second group in a third reset period, selecting a discharge cell to be turned on among the discharge cells of the second group in a third address period. Initializing the discharge cells of the first group in the fourth reset period, selecting discharge cells to be turned on among the discharge cells of the first group in the fourth address period, and selecting the selected first and second cells in the sustain period. Sustaining and discharging a discharge cell of a second group, wherein at least one of the third and fourth reset periods in the third subfield preceding in time of the subfields of the second group is the auxiliary reset period; One is the main reset period, and the third and fourth reset periods are the auxiliary reset periods, respectively, in a fourth subfield that is later in time among the subfields of the second group. .

In this case, the third reset period in the third subfield is the auxiliary reset period.

According to another aspect of the present invention, a plasma display device including a plasma display panel, a controller, and a driving circuit is provided. The plasma display panel includes a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode, and the controller controls the plurality of first electrodes. The apparatus is divided into a plurality of groups including the first and second groups, and one frame is driven into a plurality of groups including the first and second groups. The driving circuit initializes the discharge cells of the first group during the first reset period in the subfield of the first group and performs the address discharge on the discharge cells of the first group during the first address period, and then the second reset period. During the second address period, the discharge cells of the second group are initialized and address discharge is performed on the discharge cells of the second group. In this case, one of the first and second reset periods in the first subfield temporally among the subfields of the first group is an auxiliary reset period for initializing the cells in which sustain discharge has occurred in the previous subfield. The other one is a main reset period for initializing all discharge cells, and the first and second reset periods are the auxiliary reset periods in a second subfield that is later in time among the subfields of the first group.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification. In addition, when a part is said to "include" a certain component, this means that it may further include other components, except to exclude other components unless otherwise stated.

In the present invention, the wall charge refers to a charge formed close to each electrode on the wall of the cell (eg, the dielectric layer). And the wall charge is not actually in contact with the electrode itself, but is described here as “formed”, “accumulated” or “stacked” on the electrode. In addition, the wall voltage refers to the potential difference formed in the wall of the cell by the wall charge.

Now, a plasma display device and a driving method thereof according to an exemplary embodiment of the present invention will be described in detail.

First, a schematic structure of a plasma display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 2.

2 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 2, a plasma display device according to an exemplary embodiment of the present invention includes a plasma display panel 100, a controller 200, an address electrode driver 300, a scan electrode driver 400, and a sustain electrode driver 500. It includes.

The plasma display panel 100 includes a plurality of address electrodes A1 to Am extending in the column direction, and a plurality of sustain electrodes X1 to Xn and scan electrodes Y1 to Yn extending in pairs in the row direction. Include. The sustain electrodes X1 to Xn are formed corresponding to the scan electrodes Y1 to Yn, and generally have one end connected to each other in common. The plasma display panel 100 includes a substrate (not shown) on which the sustain and scan electrodes X1 to Xn and Y1 to Yn are arranged, and a substrate (not shown) on which the address electrodes A1 to Am are arranged. The two substrates are disposed to face each other with the discharge space therebetween so that the scan electrodes Y1 to Yn and the address electrodes A1 to Am and the sustain electrodes X1 to Xn and the address electrodes A1 to Am are orthogonal to each other. At this time, the discharge space at the intersection of the address electrodes A1 to Am and the sustain and scan electrodes X1 to Xn and Y1 to Yn forms a discharge cell. The structure of the plasma display panel 100 is an example, and a panel having another structure to which the driving waveform described below may be applied may also be applied to the present invention.

The controller 200 receives an image signal from the outside and outputs an address electrode driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal. The controller 200 divides and drives one frame into a plurality of subfields, and each subfield is composed of a reset period, an address period, and a sustain period.

The address electrode driver 300 receives an address electrode driving control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A. FIG.

The scan electrode driver 400 receives a scan electrode driving control signal from the controller 200 and applies a driving voltage to the scan electrode Y.

The sustain electrode driver 500 receives the sustain electrode driving control signal from the controller 200 and applies a driving voltage to the sustain electrode X.

Next, a driving waveform of the plasma display device according to the first exemplary embodiment of the present invention will be described in detail with reference to FIG. 3. Hereinafter, for convenience, a scan electrode (hereinafter referred to as a “Y electrode”), a sustain electrode (hereinafter referred to as an “X electrode”) and an address electrode (hereinafter referred to as an “A electrode”) forming one cell are applied. Only driving waveforms will be described.

3 illustrates a driving waveform of the plasma display device according to the first embodiment of the present invention.

As shown in FIG. 3, the plasma display device according to the first exemplary embodiment is driven by dividing a plurality of X electrodes into a plurality of groups. In FIG. 3, a plurality of X electrodes are divided into two groups, a first group is divided into odd X electrodes, and a second group is divided into even X electrodes. In the following, the discharge cells formed by the X and Y electrodes of the first group and the A electrode intersecting with each other are referred to as the discharge cells of the first group, and the X and Y electrodes of the second group and the A electrode intersecting therewith The discharge cells formed are called discharge cells of the second group.

3, in one subfield, address discharge is performed after the auxiliary reset is performed on the discharge cells of the first group, and address discharge is performed after the main reset is performed on the discharge cells of the second group. Here, the auxiliary reset refers to a reset period consisting only of the falling period, and the main reset refers to a reset period consisting of the rising period and the falling period. The auxiliary reset initializes the discharge cells in which the sustain discharge has occurred in the immediately preceding subfield, and the main reset initializes all the discharge cells.

The addressing operation is first performed on the discharge cells of the first group in which the auxiliary reset is performed, and then the addressing operation is performed after the main reset is performed on the discharge cells of the second group. Compared to the conventional method of sequentially addressing cells, since the time required for the addressing operation to be performed on the last discharge cell after reset can be reduced in half, address discharge can be stably generated.

In FIG. 3, the auxiliary reset is performed before the main reset in each subfield, but may be different. For example, the main reset may be performed first, followed by the auxiliary reset, or only the auxiliary reset or the main reset may be performed. However, since the auxiliary discharge has a reset discharge in the case of sustain discharge in the immediately preceding subfield, and no reset discharge in the absence of sustain discharge, the auxiliary reset is performed after the end of sustain discharge in the previous subfield. Since the time required before the start is long, the priming particles may disappear and the auxiliary reset may not form an appropriate level of wall charges, and in the case of performing only the main reset, the time required for the reset may be longer. In the example, it is described that the auxiliary reset is performed before the main reset in time in each subfield.

First, a driving waveform applied to an odd subfield will be described.

As shown in FIG. 3, in the sustain period immediately before the reset period R11 of the odd-numbered subfield, that is, the sustain period S2 of the even-numbered subfield, the Y electrode Y and the X electrodes of the first and second groups ( The sustain discharge pulses having the voltage Vs are applied to X1, X2) alternately. At this time, while a sustain discharge pulse having a voltage of Vs is applied to one of the electrodes, a voltage of 0V is applied to the other electrode. In this sustain period S2, a voltage of 0 V is applied to the Y electrode immediately before the last Vs voltage is applied to the Y electrode Y, and a voltage of Vs is applied to the X electrodes X1 and X2 of the first and second groups. A sustain discharge is caused in a cell to be turned on among the discharge cells of the first and second groups. In the state where the voltage of the X electrode X2 of the second group is maintained at the Vs voltage, the last Vs voltage is applied to the Y electrode Y and the 0 V voltage is applied to the X electrode X1 of the first group, thereby providing the first group. The sustain discharge occurs only in the cells to be turned on among the discharge cells. Then, in the reset period R11 of the odd subfield, a positive wall charge is formed on the X electrode X1 of the first group so that reset discharge can occur only in the discharge cells of the first group, and X of the second group is formed. A negative wall charge is formed at the electrode X2, and a negative wall charge is formed at the Y electrode.

In the falling period of the reset period R11, the voltage of the Y electrode Y is gradually decreased to the voltage Vnf while the last sustain discharge pulse is applied to the Y electrode Y in the sustain period of the previous subfield. At this time, a reference voltage is applied to the A electrode A and the X electrode X2 of the second group, and the X electrode X1 of the first group is biased to the Ve voltage. Then, while the voltage of the Y electrode Y decreases, a weak reset discharge occurs between the Y electrode Y and the X electrode X1 of the first group and between the Y electrode Y and the A electrode A. The negative wall charges formed on the Y electrode Y and the positive wall charges formed on the X electrode X1 and the A electrode A of the first group are erased.

As described above, when the voltage of the electrode gradually changes as shown in FIG. 3, a weak discharge occurs in the cell, and wall charge is formed so that the sum of the voltage applied from the outside and the wall voltage of the cell maintains the discharge start voltage state. This principle is disclosed in US Pat. No. 5,745,086 to Weber. In general, the magnitude of the (Ve-Vnf) voltage is set near the discharge start voltage between the Y electrode and the X electrode. As a result, the wall voltage between the Y electrode Y and the first group of X electrodes X1 becomes almost 0 V, whereby cells that do not have an address discharge in the address period can be prevented from being erroneously discharged in the sustain period.

In the sustain period S2, since negative wall charges are formed at the second group of X electrodes X2 and positive wall charges are formed at the Y electrodes, in the reset period R11, the discharge cells of the second group are discharged. Reset discharge does not occur.

Next, in the address period A11, a scan pulse having a VscL voltage is sequentially applied to the Y electrode Y to select a discharge cell, and the Y electrode to which the VscL voltage is not applied is biased to the VscH voltage. The address electrode having Va voltage is applied to the A electrode A passing through the discharge cell to be selected from among the plurality of discharge cells formed by the Y electrode Y to which the VscL voltage is applied, and the A electrode not selected is Bias to the reference voltage.

Then, an address discharge occurs in the discharge cell formed by the A electrode A to which the Va voltage is applied and the Y electrode Y to which the VscL voltage is applied, and positive wall charges are formed on the Y electrode Y. Negative wall charges are formed in the X group X1 of the first group. A negative wall charge is also formed on the A electrode A. FIG.

At this time, since a positive wall charge is formed in the Y electrode Y, no address discharge occurs in the discharge cells of the second group in the address period A11.

In FIG. 3, the Ve voltage is applied to the first group of X electrodes X1 in the falling period of the reset period R11 and the address period A11, but is applied to the X electrodes X2 of the second group. A reference voltage that is the same voltage as the voltage may be applied.

In this manner, when the address discharge is completed for the discharge cells of the first group, reset discharge is performed for the discharge cells of the second group.

In the rising period of the reset period R12, the voltage of the Y electrode is gradually increased from the reference voltage to the Vs2 voltage while the first electrode of the X electrode X1 and the A electrode A are maintained at the Vs1 voltage and the reference voltage, respectively. Let's do it. At this time, a negative voltage Vn is applied to the X electrode X2 of the second group. Then, a weak reset discharge occurs between the Y electrode Y and the second group of X electrodes X2 while the voltage of the Y electrode Y increases, while the negative wall formed on the Y electrode Y is negative. A charge is formed and a positive wall charge is formed in the X electrode X2 of the second group. Here, in the reset period, since the states of all cells must be initialized, the difference between the voltage Vs1 and the voltage Vn is a voltage high enough to cause a discharge in the cells of all conditions. At this time, if the magnitudes of the Vs1 voltage and the Vs2 voltage are set to the same magnitude as the Vs voltage applied to the first and second groups of the X electrodes X1 and X2 and the Y electrode Y in the sustain period, additional power can be reduced. have.

In the falling period of the reset period R12, the voltage of the Y electrode Y is referred to while the first electrode X1 and the second electrode X2 are maintained at the reference voltage and the Ve voltage, respectively. Incrementally decreases from voltage to Vnf. Then, while the voltage of the Y electrode Y decreases, a weak reset discharge occurs between the Y electrode Y and the second group of X electrodes X2, while the Y electrode Y and the second group of X electrodes are generated. Wall charges formed at (X2) are erased.

In the meantime, the reason why the reset discharge does not occur between the Y electrode and the first group of X electrodes X1 in the reset period R12 is explained. When the voltage of the Y electrode increases to the voltage Vs2 in the rising period, the first group Since the X electrode X1 is biased by the voltage Vs1, no reset discharge occurs between the X electrode X1 and the Y electrode Y in the first group. Therefore, the wall charge state after the end of the rising period becomes substantially the same as the wall charge state after the end of the address period. That is, while the positive wall charges are formed on the Y electrode Y and the negative wall charges are formed on the X electrode X1 of the first group, the voltage of the Y electrode is reduced to the Vnf voltage in the falling period. When the first group of X electrodes X1 is biased with a reference voltage, reset discharge does not occur between the Y electrode Y and the first group of X electrodes X1.

Next, in the address period A12, a scan pulse having a VscL voltage is sequentially applied to the Y electrode Y to select a discharge cell, and the Y electrode Y to which the VscL voltage is not applied is biased to the VscH voltage. At this time, the VscL voltage is called a scan voltage and the VscH voltage is also called a non-scan voltage. In addition, an address pulse having a Va voltage is applied to the A electrode A passing through the discharge cell to be selected from among the plurality of discharge cells formed by the Y electrode to which the VscL voltage is applied. Bias to the reference voltage. Then, an address discharge occurs in the discharge cell formed by the A electrode A to which the Va voltage is applied and the Y electrode Y to which the VscL voltage is applied, and positive wall charges are formed on the Y electrode Y. A negative wall charge is formed in the second group of X electrodes X2. A negative wall charge is also formed on the A electrode A. FIG.

Subsequently, in the sustain period S1, the sustain discharge pulse of the voltage Vs is applied to the Y electrode Y and the X electrodes X1 and X2 of the first and second groups in order. Then, in the address period, the Y electrode Y and the first and second groups are formed by the wall voltage and the Vs voltage formed between the Y electrode Y1 and the X and X electrodes X1 and X2 of the first and second groups by the address discharge. Sustain discharge occurs at the X electrodes X1 and X2. In this sustain period S1, a voltage of 0 V is applied to the Y electrode immediately before the last Vs voltage is applied to the Y electrode Y, and a voltage of Vs is applied to the X electrodes X1 and X2 of the first and second groups. A sustain discharge is caused in a cell to be turned on among the discharge cells of the first and second groups. The Vs voltage is applied to the Y electrode Y and the 0 V voltage is applied to the X electrode X2 of the second group while the voltage of the X electrode X1 of the first group is maintained at the Vs voltage. The sustain discharge is generated only in the cells to be turned on among the discharge cells. Then, in the reset period R21 of the even-numbered subfield, negative wall charges are formed on the X electrode of the first group so that reset discharge can occur only in the discharge cells of the second group, and ( +) A wall charge is formed, and a negative wall charge is formed at the Y electrode.

Next, a driving waveform applied to the even subfield will be described.

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In the falling period of the reset period R21, the voltage of the Y electrode Y is gradually decreased to the voltage Vnf while the last sustain discharge pulse is applied to the Y electrode Y in the sustain period of the previous subfield. In this case, a reference voltage is applied to the A electrode A and the X electrode X1 of the first group, and the X electrode X2 of the second group is biased to the Ve voltage. Then, while the voltage of the Y electrode Y decreases, a weak reset discharge occurs between the Y electrode Y and the second electrode of the X electrode X2 and between the Y electrode Y and the A electrode A. The negative wall charges formed on the Y electrode Y and the positive wall charges formed on the X electrode X2 and the A electrode A of the second group are erased. At this time, as described above, at the end of the sustain period S1, since the negative wall charges are formed on the X group X1 of the first group and the positive wall charges are formed on the Y electrode Y, the reset is performed. In the period R21, no reset discharge occurs between the Y electrode Y and the X electrode X1 of the first group.

In the address period A21, a scan pulse having a VscL voltage is sequentially applied to the Y electrode Y to select a discharge cell, and the Y electrode Y, to which the VscL voltage is not applied, is biased to the VscH voltage. In addition, an address pulse having Va voltage is applied to the A electrode A passing through the discharge cell to be selected from among the plurality of discharge cells formed by the Y electrode Y to which the VscL voltage is applied, and the A electrode (not selected) A) biases to the reference voltage. Then, an address discharge occurs in the discharge cell formed by the A electrode A to which the Va voltage is applied and the Y electrode Y to which the VscL voltage is applied, and positive wall charges are formed on the Y electrode Y. A negative wall charge is formed in the second group of X electrodes X2. A negative wall charge is also formed on the A electrode A. FIG. At this time, since a positive wall charge is formed in the Y electrode Y, no discharge occurs in the discharge cells of the first group in the address period.

In this manner, when the address discharge is completed for the discharge cells of the second group, reset discharge is performed for the discharge cells of the first group.

In the rising period of the reset period R22, the voltage of the Y electrode Y is changed from the reference voltage to the voltage Vs2 while the X group X2 and the A electrode A of the second group are maintained at the voltage Vs1 and the reference voltage, respectively. Incrementally increases. In this case, a negative voltage Vn is applied to the X electrode X1 of the first group. Then, a weak reset discharge occurs between the Y electrode Y and the first group of X electrodes X1 while the voltage of the Y electrode Y increases, and the wall of (−) formed on the Y electrode Y is weak. A charge is formed and a positive wall charge is formed in the X electrode X2 of the second group.

In the falling period of the reset period R22, the voltage of the Y electrode Y is referred to while the X electrode X1 of the first group and the X electrode X2 of the second group are maintained at the Ve voltage and the reference voltage, respectively. Incrementally decreases from voltage to Vnf. Then, while the voltage of the Y electrode Y decreases, a weak reset discharge occurs between the Y electrode Y and the first group of X electrodes X1, while the Y electrode Y and the first group of X electrodes are generated. Wall charges formed at (X1) are erased.

On the other hand, no reset discharge occurs between the Y electrode Y and the second group X electrode X2 in the reset period R22 for the same reason as described above.

Next, in the address period A22, a scan pulse having a VscL voltage is sequentially applied to the Y electrode Y to select a discharge cell, and the Y electrode Y to which the VscL voltage is not applied is biased to the VscH voltage. In addition, an address pulse having Va voltage is applied to the A electrode A passing through the discharge cell to be selected from among the plurality of discharge cells formed by the Y electrode Y to which the VscL voltage is applied, and the A electrode (not selected) A) biases to the reference voltage. Then, an address discharge occurs in the discharge cell formed by the A electrode A to which the Va voltage is applied and the Y electrode Y to which the VscL voltage is applied, and positive wall charges are formed on the Y electrode Y. A negative wall charge is formed on the X electrode X1 of the first group. A negative wall charge is also formed on the A electrode A. FIG.

Subsequently, in the sustain period R2, the sustain discharge pulse of the voltage Vs is applied to the Y electrode Y and the X electrodes X1 and X2 of the first and second groups in order. Then, in the address period, the Y electrode Y and the first and second groups are formed by the wall voltage and the Vs voltage formed between the Y electrode Y and the X and X electrodes X1 and X2 of the first and second groups by the address discharge. Discharge occurs at the X electrodes (X1, X2) electrodes. In the sustain period S2, 0 V is applied to the Y electrode immediately before the last Vs voltage is applied to the Y electrode Y so that reset discharge can occur only in the discharge cells of the first group in the reset period R11 of the odd-numbered subfield. After applying a voltage and applying a Vs voltage to the X electrodes X1 and X2 of the first and second groups to generate sustain discharge in the cells to be turned on among the discharge cells of the first and second groups, the X electrodes of the second group ( The last Vs voltage is applied to the Y electrode Y and the 0V voltage is applied to the X electrode X1 of the first group while the voltage of X2) is maintained at the Vs voltage.

As described above, in the first embodiment of the present invention, addressing is performed after initializing the discharge cells of the first group, and addressing is performed after the initialization of the discharge cells of the second group. It can be raised.

In the first embodiment of the present invention, the voltage of the Y electrode is described as near the Vs voltage in the rising period of the main reset. At this time, since the Vn voltage lower than the reference voltage is applied to the X electrode (X1 or X2), the voltage difference between the Y electrode (Y) and the X electrode (X1 or X2) is increased, the Y electrode (Y) and the X electrode (X1 or X2) Sufficient wall charge can be formed therebetween. However, since the voltage difference between the Y electrode A and the A electrode A is not relatively large, sufficient wall charge may not be formed between the Y electrode Y and the A electrode A. FIG. Therefore, subsequent discharge may not occur well. Hereinafter, an embodiment in which a wall charge can be sufficiently formed between the Y electrode Y and the A electrode A will be described in detail with reference to FIG. 4.

4 illustrates a driving waveform of the plasma display device according to the second exemplary embodiment of the present invention.

As shown in FIG. 4, in the periods A11 ′ and A21 ′ immediately after the address periods A11 and A21 following the reset periods R11 and R21 to perform the auxiliary reset, the X electrodes X1 of the first and second groups. , A voltage is applied to the A electrode A while X2) is biased to the reference voltage, and the voltage of the Y electrode Y is gradually decreased from the VscH voltage to the VscL voltage. This forms a negative wall charge on the A electrode A and a positive wall charge on the Y electrode Y. That is, since the potential due to the wall charge of the Y electrode Y becomes higher than the potential due to the wall charge of the A electrode A, the Y electrode Y and the A electrode (in the rising periods of the subsequent reset periods R12 and R22 ( The discharge between A) can occur quickly. Therefore, sufficient wall charge can be formed between the Y electrode Y and the A electrode A. FIG.

Meanwhile, according to the first and second embodiments of the present invention, the main reset is performed every time for one group of discharge cells (discharge cells of the first group or the second group) in each subfield. As described above, the main reset has a problem in that the contrast ratio is lowered because reset discharge occurs for all the discharge cells. Therefore, an embodiment of reducing such reset discharge will be described in detail with reference to FIG. 5.

5 is a view showing a driving waveform of the plasma display device according to the third embodiment of the present invention. 5 shows a modification of the first embodiment of the present invention.

As shown in FIG. 5, when arranging a plurality of subfields in chronological order, the driving waveform according to the first embodiment of the present invention is applied, but the main reset is performed only in a predetermined subfield preceding in time. All fields perform an auxiliary reset. In this case, since the reset discharge is reduced compared to the first embodiment of the present invention, the contrast ratio is improved. In FIG. 5, the main reset is performed only in the first and second subfields SF1 and SF2 among the plurality of subfields.

On the other hand, the voltage level of each electrode described in the first to third embodiments of the present invention is different voltage level if the voltage difference between the A electrode (A), the X electrode (X1, X2) and the Y electrode (Y) is similar to the embodiment Or other forms.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

According to the present invention, a stable address discharge is performed by performing addressing after initializing the discharge cells of the first group with the auxiliary reset and performing addressing after initializing the main cells with the discharge cells of the second group. It can be raised. At this time, the contrast ratio is improved by performing the main reset only in the predetermined subfields temporally in advance and performing the auxiliary reset in all subsequent subfields.

Claims (15)

In a plasma display device including a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode, a frame is driven by dividing a frame into a plurality of subfields. In the method, Dividing the plurality of first electrodes into a plurality of groups including first and second groups, dividing the plurality of subfields into a plurality of groups including first and second groups, In the subfield of the first group, Initializing a first group of discharge cells in a first reset period, Selecting a discharge cell to be turned on among the discharge cells of the first group in the first address period, Initializing a second group of discharge cells in a second reset period, Selecting a discharge cell to be turned on from among the discharge cells of the second group in a second address period, and Sustain-discharging the selected first and second groups of discharge cells in a sustain period, Any one of the first and second reset periods in the first subfield in time of the first group of subfields gradually reduces the voltage of the second electrode from the first voltage to the second voltage. And the other is a main reset period in which the voltage of the second electrode is gradually increased from the third voltage to the fourth voltage and then gradually decreased from the fifth voltage to the sixth voltage, And the first and second reset periods in the second subfield later in time among the subfields of the first group are the auxiliary reset periods, respectively. The method of claim 1, And the first reset period in the first subfield is the auxiliary reset period. The method of claim 1, In the first subfield, The first electrode of the first group and the first electrode of the second group are biased to a seventh voltage and an eighth voltage while the voltage of the second electrode decreases in the first reset period, The first electrode of the first group and the first electrode of the second group are biased to the ninth voltage and the tenth voltage, respectively, while the voltage of the second electrode is decreased in the second reset period. Way. The method of claim 3, In the main reset period, when the voltage of the second electrode increases to the fourth voltage, a positive voltage is applied to the first electrode of the first group and a negative voltage is applied to the first electrode of the second group. A method of driving a plasma display device. The method of claim 3, And the seventh voltage and the tenth voltage are the same, the eighth voltage and the ninth voltage are the same, and the seventh voltage is higher than the eighth voltage. The method according to any one of claims 1 to 5, In the subfield of the second group, Initializing a second group of discharge cells in a third reset period, Selecting a discharge cell to be turned on among the discharge cells of the second group in a third address period, Initializing a first group of discharge cells in a fourth reset period, Selecting a discharge cell to be turned on from among the discharge cells of the first group in a fourth address period, and Sustain-discharging the discharge cells of the selected first and second groups in the sustain period. The method of claim 6, At least one of the third and fourth reset periods is the auxiliary reset period, and the other one is the main reset period, in a third subfield preceding in time of the subfields of the second group, And the third and fourth reset periods are respectively the auxiliary reset periods in a fourth subfield later in time among the subfields of the second group. The method of claim 7, wherein And the third reset period in the third subfield is the auxiliary reset period. The method of claim 6, The first electrode of any one of the first electrode of the first group and the first electrode of the second group is an odd-numbered first electrode, and the first electrode of the other group is an even-numbered first electrode. Driving method. The method according to any one of claims 1 to 5, Immediately after the first or second address period following the auxiliary reset period in each subfield, Applying an eleventh voltage to the third electrode, and gradually decreasing the voltage of the second electrode from a twelfth voltage to a thirteenth voltage, The difference between the eleventh voltage and the thirteenth voltage is greater than the difference between the voltage applied to the third electrode and the second electrode when the second voltage is applied to the second electrode in the auxiliary reset period. Method of driving. The method of claim 10, And the eleventh voltage is equal to an address voltage applied to the third electrode of a discharge cell to be turned on in the first and second address periods, and the thirteenth voltage is the same as the second voltage. A plasma display panel including a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes formed in a direction crossing the first electrode and the second electrode; A controller for dividing the plurality of first electrodes into a plurality of groups including first and second groups, and driving one frame into a plurality of groups including first and second groups; In the subfields of the first group, the discharge cells of the first group are initialized during the first reset period, the address discharge is performed on the discharge cells of the first group during the first address period, and then the second group during the second reset period. A driving circuit for initializing discharge cells of and performing address discharge on the discharge cells of the second group during the second address period, Any one of the first and second reset periods in the first subfield temporally among the subfields of the first group is an auxiliary reset period for initializing a cell in which sustain discharge has occurred in the previous subfield, One is the main reset period, which initializes all discharge cells, And the first and second reset periods are respectively the auxiliary reset periods in a second subfield that is later in time among the subfields of the first group. The method of claim 12, And the first reset period in the first subfield is the auxiliary reset period. The method according to claim 12 or 13, The drive circuit, In the subfield of the second group, after discharging the discharge cells of the second group during the third reset period and performing address discharge on the discharge cells of the second group during the third address period, the first discharge period during the fourth reset period. Initialize the discharge cells of the group and perform address discharge on the discharge cells of the first group during the fourth address period, One of the first and second reset periods is the auxiliary reset period and the other one is the main reset period in a third subfield temporally preceding among the subfields of the second group, And the first and second reset periods are respectively the auxiliary reset periods in a fourth subfield that is later in time among the subfields of the second group. The method of claim 14, And the first reset period in the third subfield is the auxiliary reset period.

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