KR100289685B1 - Metallization of semeconductor device - Google Patents
Metallization of semeconductor device Download PDFInfo
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- KR100289685B1 KR100289685B1 KR1019980017821A KR19980017821A KR100289685B1 KR 100289685 B1 KR100289685 B1 KR 100289685B1 KR 1019980017821 A KR1019980017821 A KR 1019980017821A KR 19980017821 A KR19980017821 A KR 19980017821A KR 100289685 B1 KR100289685 B1 KR 100289685B1
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- metal
- range
- boron
- metal wiring
- semiconductor device
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- 238000001465 metallisation Methods 0.000 title 1
- 229910052751 metal Inorganic materials 0.000 claims abstract description 105
- 239000002184 metal Substances 0.000 claims abstract description 105
- 238000000034 method Methods 0.000 claims abstract description 49
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910052796 boron Inorganic materials 0.000 claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 12
- 239000000956 alloy Substances 0.000 claims abstract description 12
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 7
- 238000005546 reactive sputtering Methods 0.000 claims abstract description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 8
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052786 argon Inorganic materials 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 4
- 230000005284 excitation Effects 0.000 claims description 3
- 239000012495 reaction gas Substances 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 25
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 abstract description 2
- 239000011800 void material Substances 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 abstract 1
- 230000000452 restraining effect Effects 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 239000010936 titanium Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 9
- 239000010949 copper Substances 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 6
- 229910052719 titanium Inorganic materials 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 229910018182 Al—Cu Inorganic materials 0.000 description 3
- 229910000521 B alloy Inorganic materials 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910021364 Al-Si alloy Inorganic materials 0.000 description 2
- 229910018575 Al—Ti Inorganic materials 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910000765 intermetallic Inorganic materials 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000012421 spiking Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
본 발명은 반도체 디바이스의 금속 도전층 형성 방법에 관한 것으로, 더욱 상세하게는 고집적 반도체 디바이스에서의 배선 신뢰성을 향상시키는 데 적합한 반도체 디바이스의 금속 도전층의 형성 방법에 관한 것이다.The present invention relates to a method of forming a metal conductive layer of a semiconductor device, and more particularly, to a method of forming a metal conductive layer of a semiconductor device suitable for improving wiring reliability in a highly integrated semiconductor device.
주지하다시피, 반도체 디바이스가 대용량화, 고집적화 되어감에 디바이스의 디멘젼은 축소되고, 디바이스 내의 금속 배선 또한 그 선폭이 감소되고 있다. 이때, 저항은 도선의 길이가 길수록, 도선의 선폭이 얇을수록 그 크기가 증가하므로, 금속 배선의 선폭이 감소됨에 따라 금속 배선의 저항 및 전류 밀도는 증가되는 문제점이 발생된다. 이와 같은 저항 및 전류 밀도의 증가는 일렉트로마이그레이션(Electromigration) 현상 등에 의해서 단선 등을 유발하는 문제점을 초래하게 된다. 즉, 금속 배선의 신뢰성 저하 및 그에 따른 반도체 디바이스의 수율 감소의 원인이 된다.As is well known, as semiconductor devices become larger and more integrated, the dimension of the device is reduced, and the metal wiring in the device is also reduced in its line width. In this case, the resistance increases as the length of the lead increases, and as the line width of the lead becomes thin, the resistance and current density of the metal interconnect increases as the line width of the metal interconnect decreases. Such increase in resistance and current density causes problems such as disconnection due to an electromigration phenomenon. That is, it causes a decrease in the reliability of the metal wiring and a decrease in the yield of the semiconductor device.
한편, 종래에는 금속 배선을 순수 알루미늄(Al)으로 형성하였으나, 그와 같은 경우에는 알루미늄 도전층과 실리콘 기판의 접합면에서 발생되는 정션 스파이킹(Junction Spiking)에 의해서 배선 신뢰도를 저하시키는 문제가 발생되었다. 즉, 열공정시 알루미늄 도전층과 실리콘 기판의 접합면에서 실리콘 원자(Si)가 알루미늄(Al) 도전층 내로 침투하여 실리콘 기판에 피트(Pit)를 형성하고, 그 피트에 알루미늄(Al)이 매립되며, 이와 같은 알루미늄이 깊게 형성되면 그 하부의 정션이 쇼트(Short)되는 문제가 발생된다.On the other hand, the metal wiring is conventionally formed of pure aluminum (Al), but in such a case, the problem of lowering the wiring reliability is caused by junction spiking generated at the junction between the aluminum conductive layer and the silicon substrate. It became. That is, during the thermal process, silicon atoms (Si) penetrate into the aluminum (Al) conductive layer at the junction between the aluminum conductive layer and the silicon substrate to form pits in the silicon substrate, and aluminum (Al) is embedded in the pits. If the aluminum is deeply formed, a problem arises in that the bottom junction is shorted.
따라서, 종래에는 상술한 문제점을 해결하고자, 알루미늄에 구리(Cu), 실리콘(Si) 및 티타늄(Ti)중 어느 하나를 첨가한 Al-Cu, Al-Si, Al-Ti 등의 합금으로 금속 배선층을 형성하였다.Therefore, conventionally, in order to solve the above-mentioned problems, the metal wiring layer is made of an alloy of Al-Cu, Al-Si, Al-Ti, etc. in which any one of copper (Cu), silicon (Si), and titanium (Ti) is added to aluminum. Formed.
이와 같이, 알루미늄(Al)에 구리(Cu)를 첨가한 Al-Cu 합금으로 금속 배선을 형성하는 경우, 알루미늄(Al)과 구리(Cu) 합금 원소의 반응으로 석출된 석출물에 의해서 보이드(Voide)의 성장을 억제하므로 일렉트로마이그레이션에 의한 금속 배선의 신뢰성 저하 문제를 해결할 수 있었으나, 이와 같이 Al-Cu 합금으로 형성된 금속 배선은 후속하는 식각 공정(금속 배선을 소정 형상으로 패터닝 하기 위한 공정)시 식각액에 의해 보다 쉽게 부식되는 문제점이 있었다.As described above, in the case of forming a metal wiring with an Al-Cu alloy in which copper (Cu) is added to aluminum (Al), voids are caused by precipitates precipitated by the reaction of aluminum (Al) and copper (Cu) alloy elements. The suppression of the growth of the metal wires caused by the electromigration could solve the problem of deterioration of reliability. However, the metal wires formed of the Al-Cu alloy may be applied to the etchant during the subsequent etching process (the process of patterning the metal wires into a predetermined shape). There was a problem of being easily corroded by.
한편, 알루미늄(Al) 내에 1% 이상의 실리콘(Si)을 과포화시킨 Al-Si 합금으로 금속 배선을 형성하는 경우, 알루미늄(Al) 내에 실리콘(Si)이 침투하는 것을 방지할 수 있었으나, 후속하는 열공정시 Al-Si 합금 내에 과포화된 실리콘(Si)이 금속 도전층과 실리콘 기판의 접합면에서 실리콘 노즐(nodule) 형태로 석출되고, 그에 따라 콘택 저항이 증가하며, 상술한 바와 같은 일렉트로마이그레이션 현상에 의해서 배선 신뢰도의 저하되는 문제점이 있었다.On the other hand, when the metal wiring is formed of an Al-Si alloy supersaturated with at least 1% of silicon (Si) in aluminum (Al), the penetration of silicon (Si) into aluminum (Al) can be prevented, Silicon (Si) supersaturated in the on-time Al-Si alloy precipitates in the form of a silicon nozzle at the junction surface of the metal conductive layer and the silicon substrate, thereby increasing the contact resistance, and by the electromigration phenomenon as described above. There was a problem that the wiring reliability is lowered.
다른 한편, 티타늄(Ti)을 첨가한 Al-Ti 합금을 사용하여 금속 배선을 형성함으로써, 배선 신뢰도를 향상하는 방법도 사용되고 있으나, 이와 같은 방법은 후속하는 열공정에서 티타늄(Ti)과 알루미늄(Al)이 반응하여 금속간 화합물을 형성하고, 이와 같은 금속간 화합물에 의해서 금속 배선의 저항이 증가되며, 결과적으로 일렉트로마이그레션에 의한 배선 신뢰도의 저하를 초래하는 문제점이 있었다.On the other hand, a method of improving the wiring reliability by forming a metal wiring using an Al-Ti alloy containing titanium (Ti) is also used, but such a method is used in the subsequent thermal process of titanium (Ti) and aluminum (Al). ) Reacts to form an intermetallic compound, and the resistance of the metal wiring is increased by such an intermetallic compound, resulting in a problem of lowering the wiring reliability due to electromigration.
본 발명은 상술한 문제점을 해결하기 위하여 안출한 것으로, 본 발명의 목적은 금속 배선의 결정립계 내에서 공공의 이동을 억제하여 금속 배선의 신뢰도를 향상시킬 수 있도록 붕소(B)를 첨가한 Al-B 합금으로 금속 배선을 형성할 수 있는 방법을 제공하는 데 그 목적이 있다.The present invention has been made to solve the above problems, an object of the present invention is to suppress the movement of vacancy in the grain boundaries of the metal wiring to improve the reliability of the metal wiring Al-B added with boron (B) The object is to provide a method for forming metal wirings from an alloy.
상기 목적을 달성하기 위하여 본 발명은, 도전성 금속에 붕소(B)원자를 첨가한 합금을 적층한 후, 기설정된 온도 범위에서 열 처리를 수행하거나 또는 상기 열 처리 공정과 동일한 온도 범위에서 상기 도전성 금속에 붕소(B)원자를 첨가한 합금을 적층함으로써 금속 배선을 형성하는 것을 특징으로 하는 반도체 디바이스의 금속 배선 방법을 제공한다.In order to achieve the above object, the present invention, after laminating an alloy added with boron (B) atoms to a conductive metal, performing a heat treatment in a predetermined temperature range or the conductive metal in the same temperature range as the heat treatment process A metal wiring method of a semiconductor device is provided, wherein a metal wiring is formed by laminating an alloy containing boron (B) atoms in it.
도 1은 일반적인 반도체 디바이스의 금속 배선 구조를 도시한 단면도,1 is a cross-sectional view showing a metal wiring structure of a general semiconductor device;
도 2는 본 발명에 따른 금속 도전층의 내부 구조를 도시한 예시도.2 is an exemplary view showing an internal structure of a metal conductive layer according to the present invention.
＜도면의 주요부분에 대한 부호의 설명＞<Description of the code | symbol about the principal part of drawing>
10 : 실리콘 기판 15 : 확산층10 silicon substrate 15 diffusion layer
20 : 절연층 30 : 접합층20: insulating layer 30: bonding layer
35 : 실리사이드 40 : 확산 장벽층35: silicide 40: diffusion barrier layer
50 : 금속 접합층 60 : 금속 도전층50: metal bonding layer 60: metal conductive layer
70 : 반사 방지막 100 : 결정립계70: antireflection film 100: grain boundary
200 : 금속 원자 300 : 붕소 원자200: metal atom 300: boron atom
400 : 보이드400: void
이하, 본 발명에 따른 반도체 디바이스의 금속 배선 방법에 대하여 첨부된 도 1 및 도 2를 참조하여 상세히 설명하면 다음과 같다.Hereinafter, a metal wiring method of a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1 and 2.
도 1은 일반적인 반도체 디바이스의 금속 배선 구조를 도시한 단면도이고, 도 2는 본 발명에 따른 금속 도전층의 내부 구조를 도시한 예시도이다.1 is a cross-sectional view showing a metal wiring structure of a general semiconductor device, and FIG. 2 is an exemplary view showing an internal structure of a metal conductive layer according to the present invention.
먼저, 도 1을 참조하면, 본 발명에 따른 금속 배선 방법이 적용되는 반도체 디바이스의 금속 배선은 접합층(30), 확산 장벽층(40), 금속 접합층(50), 금속 도전층(60), 반사 방지막(70)으로 이루어진 복합 구조를 갖는다.First, referring to FIG. 1, a metal wiring of a semiconductor device to which the metal wiring method according to the present invention is applied may include a bonding layer 30, a diffusion barrier layer 40, a metal bonding layer 50, and a metal conductive layer 60. And a composite structure made of the antireflection film 70.
즉, 실리콘 기판(10)과의 접착 특성이 좋은 티타늄 등을 적층한 접합층(30)에 의해서 실리콘 기판에 대한 금속 배선의 접착 특성을 향상시키고, 접합층(30)의 상부에 질화 티타늄(TiN) 등을 적층한 확산 장벽층(40)에 의해서 실리콘 원자가 실리콘 기판(10)으로부터 금속 도전층(60) 내로 침투하는 것을 방지하며, 질화 티타늄(TiN)의 상부에 티타늄(Ti) 등을 적층하여 금속 접합층(50)을 형성함으로써, 후속하는 공정에 의해서 형성되는 금속 도전층(60)이 확산 장벽층(40)에 양호하게 접합될 수 있도록 한다. 이후, 티타늄(Ti) 등으로 이루어진 금속 접합층(50)의 상부에 전기 전도성이 양호한 금속을 적층하여 금속 도전층(60), 즉 반도체 디바이스에서 실질적으로 전류의 흐름이 이루어지는 금속 배선이 형성되고, 그 금속 도전층(60)의 상부에 다시 질화 티타늄(TiN) 등을 적층하여 반사 방지막(70)을 형성함으로써, 금속 배선을 패터닝하기 위한 후속 공정시 금속 도전층(60)의 표면에서 광이 난반사하는 것을 방지한다.That is, the adhesion layer of the metal wiring to the silicon substrate is improved by the bonding layer 30 in which titanium or the like having good adhesion property with the silicon substrate 10 is laminated, and titanium nitride (TiN) is placed on the bonding layer 30. The diffusion barrier layer 40 stacked thereon prevents silicon atoms from penetrating into the metal conductive layer 60 from the silicon substrate 10, and by depositing titanium (Ti) or the like on top of titanium nitride (TiN) By forming the metal bonding layer 50, the metal conductive layer 60 formed by the following process can be satisfactorily bonded to the diffusion barrier layer 40. Thereafter, a metal having good electrical conductivity is laminated on the metal bonding layer 50 made of titanium (Ti) or the like to form a metal conductive layer 60, that is, a metal wiring in which a current flows substantially in the semiconductor device. Titanium nitride (TiN) or the like is further stacked on top of the metal conductive layer 60 to form an antireflection film 70 so that light is diffusely reflected on the surface of the metal conductive layer 60 during a subsequent process for patterning the metal wiring. Prevent it.
이때, 본 발명에 따른 금속 배선 방법은 실제적으로 상기 금속 도전층(60)을 형성하는 방법으로서, 특히 일정량(예를 들어, 0.01∼0.1 weight %범위 내의 일정량)의 붕소 원자를 금속 도전층(60)의 내부에 첨가하고, 그 금속 도전층(60)에 첨가된 금속 원자가 금속 도전층(60)의 결정립계에 모이도록 열공정을 수행함으로써, 금속 도전층(60) 내에서 공공이 이동하는 것을 억제하는 것에 의해 금속 배선의 신뢰성을 향상시키도록 구성한 방법이다.At this time, the metal wiring method according to the present invention is actually a method for forming the metal conductive layer 60, in particular a certain amount of boron atoms (for example, a certain amount within the range of 0.01 to 0.1 weight%) of the metal conductive layer 60. ) And suppressing the movement of the vacancy in the metal conductive layer 60 by performing a thermal process such that the metal atoms added to the metal conductive layer 60 are collected at the grain boundaries of the metal conductive layer 60. It is a method comprised so that the reliability of a metal wiring may be improved.
이하, 본 발명에 바람직한 실시예에 따라 금속 배선 방법, 즉, 금속 도전층(60)을 형성할 수 있는 방법에 대하여 상세히 설명한다.Hereinafter, a metal wiring method, that is, a method for forming the metal conductive layer 60 according to an embodiment of the present invention will be described in detail.
[실시예 1]Example 1
본 실시예에서는, 금속 도전층(60)을 화학적 기상 증착법(CVD : Chemical Vapor Deposition)에 의해서 형성하며, 이때, 본 발명에서 요구되는 열 처리공정은 동시에 수행된다.In this embodiment, the metal conductive layer 60 is formed by Chemical Vapor Deposition (CVD), wherein the heat treatment process required in the present invention is performed at the same time.
예를 들어, 석영 튜브 등으로 이루어진 반응실(도시 생략) 내에 금속 접합층(50)까지 적층한 실리콘 기판을 위치시키고, 반응실의 일측에 형성된 진공 펌프(도시 생략)를 동작시켜 반응실의 압력을 1∼2 torr 범위로 유지하며, 반응실을 둘러싼 저항 코일에 전류를 인가하여 반응실의 온도를 400∼500℃로 유지한 상태에서, 0.1∼0.5 torr 범위로 TMA(Trimethylaluminum)와 같은 알루미늄(Al) 소오스(source)를 반응실내로 유입시키고, 1∼5 mtorr 범위로 TEB((C2H5O)3B)와 같은 보론(B) 소오스를 반응실 내로 유입시킨다.For example, a silicon substrate stacked up to the metal bonding layer 50 is placed in a reaction chamber (not shown) made of a quartz tube or the like, and a vacuum pump (not shown) formed on one side of the reaction chamber is operated to pressure the reaction chamber. Is maintained in the range of 1 to 2 torr, and current is applied to the resistance coil surrounding the reaction chamber to maintain the temperature of the reaction chamber at 400 to 500 ° C., and aluminum such as TMA (Trimethylaluminum) An Al source is introduced into the reaction chamber, and a boron (B) source such as TEB ((C 2 H 5 O) 3 B) is introduced into the reaction chamber in the range of 1 to 5 mtorr.
이때, 반응실 내에 유입된 알루미늄 소오스 및 보론 소오스는 외부로부터 가해지는 에너지에 의해서 상호 반응하고, 그 반응된 화합물, 즉 붕소가 첨가된 알루미늄(Al)층(붕소 원자를 0.01∼0.3 weight % 범위 내에서 함유하는 Al-B 합금층)이 금속 접합층(50)의 상부에 형성된다.At this time, the aluminum source and the boron source introduced into the reaction chamber react with each other by energy applied from the outside, and the reacted compound, that is, the aluminum (Al) layer to which boron is added (in the range of 0.01 to 0.3 weight% of boron atoms). Al-B alloy layer to be contained in) is formed on the metal bonding layer 50.
또한, 이와 같이 형성된 Al-B 합금은 반응 온도가 높은 경우에는 별도의 열처리 공정 없이도 Al-B 합금에 형성된 붕소 원자(200)가 알루미늄(Al)의 결정립계에 양호하게 결집될 것이다. 만일 반응 온도가 낮은 경우에는 후속 열처리 공정에 의하여 동일한 결과를 얻을 수 있다.In addition, in the Al-B alloy formed as described above, if the reaction temperature is high, the boron atoms 200 formed in the Al-B alloy will be well concentrated at the grain boundaries of aluminum (Al) without a separate heat treatment process. If the reaction temperature is low, the same result can be obtained by a subsequent heat treatment process.
따라서, 도 2에 도시된 바와 같이, 붕소 원자(300)는 알루미늄 원자(200)의 결정립계(100)에 의해서 알루미늄 원자(200)와 결집되고, 그에 의해서 알루미늄 원자(200)의 이동에 따른 공공의 형성 및 보이드(400)의 성장을 억제함으로써, 금속 배선의 신뢰성을 증가시킬 수 있을 것이다.Therefore, as shown in FIG. 2, the boron atom 300 is aggregated with the aluminum atom 200 by the grain boundary 100 of the aluminum atom 200, whereby the boron atom 300 is formed by the movement of the aluminum atom 200. By suppressing the formation and growth of the voids 400, it is possible to increase the reliability of the metal wiring.
[실시예 2]Example 2
본 실시예에서는, 기형성된 금속 도전층(60)의 상부 표면에 반응성 스퍼터링(Reactive Sputtering) 공정에 의해서 붕소 원자를 첨가한 후, 열공정을 수행함으로써, 붕소 원자(300)를 알루미늄층의 결정립계(100)에 모이도록 한다.In the present embodiment, after the boron atoms are added to the upper surface of the preformed metal conductive layer 60 by a reactive sputtering process, the thermal process is performed, so that the boron atoms 300 are crystallized in the grain boundaries of the aluminum layer ( 100).
예를 들어, 스퍼터링 반응실 내에 금속 접합층(50)까지 적층시킨 웨이퍼 및 금속 접합층(50)의 상부에 금속 도전층(60)으로 형성하고자 하는 금속(예를 들어, Al, Cu)으로 이루어진 타겟(Target)에 위치시킨 후, 반응실의 압력을 3∼6 torr 범위로 유지하고, 반응실의 온도를 400∼500℃로 유지한 상태에서, 스퍼터링 시스템에 2∼5kw의 전력을 공급하고, 붕소 가스 1∼5 sccm을 0.5∼1 mtorr의 압력 범위로 반응실 내에 공급하며, 아르곤 가스 10∼20 sccm을 3∼6 mtorr 범위로 반응실 내에 공급한다. 이때, 타겟은 전기적으로 접지되어 있다.For example, a wafer made up of the metal bonding layer 50 in the sputtering reaction chamber and a metal (for example, Al and Cu) to be formed as the metal conductive layer 60 on the metal bonding layer 50. After placing the target in the target chamber, the pressure of the reaction chamber was maintained in the range of 3 to 6 torr, the temperature of the reaction chamber was maintained at 400 to 500 ° C, and power of 2 to 5 kw was supplied to the sputtering system. 1-5 sccm of boron gas is supplied into the reaction chamber in a pressure range of 0.5-1 mtorr, and 10-20 sccm of argon gas is supplied into the reaction chamber in the range of 3-6 mtorr. At this time, the target is electrically grounded.
따라서, 양전하를 띠는 아르곤(Ar+) 이온은 전기적으로 접지된 타겟으로 이동하면서 점차로 가속되고, 결국, 타겟의 표면에 부딪쳐서 타겟을 이루는 금속이온을 튕겨 나가게(Sputter)한다. 이때, 스퍼터링 반응실 내에는 붕소 가스가 주입되고 있으므로, 튕겨 나간 금속 이온은 붕소 가스와 함께 금속 접합층(50)의 상부에 적층된다. 즉, 붕소 원자가 첨가된 금속으로 금속 도전층(60)이 형성된다.Accordingly, positively charged argon (Ar + ) ions are accelerated gradually as they move to an electrically grounded target, eventually hitting the surface of the target to sputter metal ions forming the target. At this time, since boron gas is injected into the sputtering reaction chamber, the repelled metal ions are stacked on the upper portion of the metal bonding layer 50 together with the boron gas. That is, the metal conductive layer 60 is formed of the metal to which the boron atom was added.
한편, 본 실시예도 실시예 1에서와 같이, 400∼500℃의 온도 범위에서 공정이 이루어지기 때문에 별도의 열처리 공정 없이도, 도 2에서와 같이 붕소 원자(300)가 금속 원자(200)의 결정립계(100)에 잘 모여서, 금속 배선의 배선 신뢰도를 향상시킬 수 있다.On the other hand, as in Example 1, since the process is carried out in the temperature range of 400 ~ 500 ℃ as in Example 1, even without a separate heat treatment process, as shown in Figure 2 the boron atom 300 is a grain boundary of the metal atom 200 ( Gathered well), the wiring reliability of the metal wiring can be improved.
[실시예 3]Example 3
본 실시예에서는, 기형성된 금속 도전층(60)의 상부 표면에 플라즈마 여기 방법에 의해서 붕소 원자를 첨가한 후, 열공정을 수행함으로써, 붕소 원자(300)를 알루미늄층의 결정립계(100)에 모이도록 한다.In the present embodiment, the boron atoms 300 are collected at the grain boundary 100 of the aluminum layer by adding a boron atom to the upper surface of the preformed metal conductive layer 60 by a plasma excitation method and then performing a thermal process. To do that.
예를 들어, 플라즈마 반응실 내에 금속 도전층(60)까지 형성된 웨이퍼를 위치시키고, 플라즈마 반응실 내의 온도를 300∼400℃의 온도 범위에서 유지하며, 반응실 내의 압력을 1∼2 torr로 유지한 상태에서, 플라즈마 반응실 내로 붕소 가스 5∼10 sccm을 1∼2 torr 압력으로 주입하고, 플라즈마 시스템에 300∼500w의 RF 전력을 공급하면, 플라즈마는 높은 에너지를 갖게되고, 이와 같이 높은 에너지를 갖는 플라즈마는 붕소 가스에 에너지를 여기시켜, 붕소 가스를 금속 도전층(60)의 상부에 적층되도록 한다. 이때, 본 실시예에서는 금속 도전층 내의 붕소 원자를 0.01∼0.1 weight % 범위 내에서 유지하기 위해 플라즈마 처리 시간을 30∼60초 동안에 수행되는 것이 바람직할 것이다.For example, a wafer formed up to the metal conductive layer 60 is placed in the plasma reaction chamber, the temperature in the plasma reaction chamber is maintained at a temperature in the range of 300 to 400 ° C., and the pressure in the reaction chamber is maintained at 1 to 2 torr. In this state, when 5-10 sccm of boron gas is injected into the plasma reaction chamber at a pressure of 1-2 torr, and 300-500 watts of RF power is supplied to the plasma system, the plasma has high energy and thus has high energy. The plasma excites energy to the boron gas, so that the boron gas is deposited on top of the metal conductive layer 60. At this time, in this embodiment, it is preferable to perform the plasma treatment time for 30 to 60 seconds to maintain the boron atoms in the metal conductive layer within the range of 0.01 to 0.1 weight%.
이후, 얼로이 장비에서, 질소와 10% 수소의 분위기 하에서 400∼500℃로 20∼60분 동안에 걸친 열 공정을 수행함으로써, 금속 도전층(60)의 상부에 적층된 붕소 원자들을 알루미늄 내로 확산시킬 수 있을 것이다. 즉, 도 2에 도시된 바와 같이, 붕소 원자(300)를 금속 원자(200)의 결정립계(100)에 의해서 금속 원자(200)와 결집시켜, 금속 배선의 신뢰도를 향상시킬 수 있을 것이다.Then, in the alloy equipment, boron atoms deposited on top of the metal conductive layer 60 are diffused into aluminum by performing a thermal process for 20 to 60 minutes at 400 to 500 ° C. under an atmosphere of nitrogen and 10% hydrogen. Could be. That is, as shown in FIG. 2, the boron atom 300 may be aggregated with the metal atom 200 by the grain boundary 100 of the metal atom 200, thereby improving reliability of the metal wiring.
이상 상술한 실시예 1 내지 실시예 3에서는 알루미늄 또는 구리를 예로 들어 설명하고 있으나, 반도체 디바이스에서 사용되는 다른 금속 배선 재료에서도 본 발명에 의해서 동일한 효과를 얻을 수 있을 것이다.In the first to third embodiments described above, aluminum or copper is used as an example, but the same effect may be obtained by the present invention in other metal wiring materials used in the semiconductor device.
상술한 본 발명에 따르면, 붕소 원자가 금속 원자의 결정립계에 모여 공공의 이동을 억제하고, 그에 따라 보이드의 성장에 의한 금속 배선의 단선 등을 방지함으로써, 반도체 디바이스에 형성되는 금속 배선의 신뢰성을 향상시킬 수 있는 효과가 있다.According to the present invention described above, boron atoms gather at the grain boundaries of metal atoms to suppress the movement of vacancy, thereby preventing disconnection of the metal wiring due to the growth of voids, thereby improving the reliability of the metal wiring formed in the semiconductor device. It can be effective.
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