KR100261212B1 - Method for manufacturing capacitor of semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to improve the reliability of the capacitor by preventing the erosion of a high dielectric layer caused by a halogen element. CONSTITUTION: A lower electrode(140) for a capacitor is formed on a semiconductor substrate(110). A high dielectric layer(150) is formed on the resulted structure formed with the lower electrode(140). After introducing a silane gas into the high dielectric layer(150), an upper metal electrode layer(160) is formed by introducing a source gas into the high dielectric layer(150). The source gas includes a metal halogen material. Then, a doped polycrystalline silicon layer(170) is deposited on the upper metal electrode layer(160) so that an upper electrode layer is achieved. The high dielectric layer(150) includes tantalum oxide.

Description

Capacitor Manufacturing Method of Semiconductor Device

1 (a) to 1 (d) are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the prior art.

2 (a) to 2 (d) are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and more particularly, to a method of manufacturing a capacitor of a semiconductor device, in which a highly reliable capacitor can be obtained by preventing corrosion of a high-k dielectric layer by a halogen element generated in the process of forming an upper metal electrode layer. It is about.

As the DRAM (Dynamic Random Access Memory) consisting of a memory cell composed of one capacitor and one transistor is highly integrated, the area of the capacitor is gradually decreasing, and the operating voltage is also gradually decreasing. However, it is increasingly difficult to induce more than a certain amount of charge into the capacitor because the amount of charge that enables the information to be distinguished must have a certain size or more.

The charge amount Q of the capacitor is determined by the product of the capacitance C of the capacitor and the operating voltage V. That is, Q = CV. Therefore, in order to obtain a specific amount of charge or more in a state where the operating voltage is lowered, the capacitance must be increased.

The capacitance becomes larger as the effective area of the capacitor, the larger the dielectric constant of the dielectric, and the thinner the dielectric. Tantalum oxide (TaO) is one of the materials that has a higher dielectric constant than the widely used SiO ₂ film and is attracting attention as a dielectric film of a DRAM capacitor. When the tantalum oxide film is used as the dielectric film of the capacitor, the effective area of the capacitor lower electrode can be reduced or the capacity can be maintained or increased. Furthermore, the manufacturing cost can be reduced for the above reason.

1 (a) to 1 (d) are cross-sectional views illustrating a method of manufacturing a capacitor according to the prior art, and particularly, a method of manufacturing a capacitor using a cylindrical lower electrode.

FIG. 1 (a) is a cross-sectional view showing a process of forming a cylindrical lower electrode from doped polysilicon, in which the insulating layer 20 is formed on a semiconductor substrate 10 and formed with an active region of a transistor. After forming a contact hole 30 for contact, the cylindrical lower electrode 40 is formed of doped polysilicon.

FIG. 1B is a cross-sectional view illustrating a process of forming the high dielectric film 50 on the resultant product in which the cylindrical lower electrode 40 is formed. As the material of the high dielectric film 50, TaO, SrTiO ₃ or (BaSr) TiO ₃ and the like have been actively studied. The thickness of the high dielectric film 50 may be formed differently depending on the dielectric constant of the material.

FIG. 1C is a cross-sectional view illustrating a process of forming the upper metal electrode 60 on the resultant product on which the high dielectric film 50 is formed.

In general, doped polysilicon is used as the upper electrode of the high-k dielectric film for a capacitor of a semiconductor device. However, when the polysilicon is deposited, a natural oxide film is grown on the high dielectric film. When the natural oxide film is grown, capacitance is reduced because a material layer having a low dielectric constant is formed on the high dielectric film. In addition, the lower electrode of the capacitor usually has an uneven structure on its surface or increases the height of the lower electrode to increase the capacitance by increasing the surface area. In order to maintain the surface area increasing effect, step coverage of the upper electrode is shown. Should be good. Therefore, in forming the upper metal electrode layer 60, the upper metal rather than the method of depositing the doped polysilicon directly on the high-k dielectric layer 50 in order to suppress the growth of the natural oxide film and to obtain a good step coverage The method of forming an electrode layer first by chemical vapor deposition is employ | adopted. When the high dielectric film 50 is tantalum oxide (TaO), tungsten nitride (WN) is usually used for the upper metal electrode layer 60. At this time, WF ₆ and NH ₃ are used as the source gas, and the deposition is performed through chemical vapor deposition. Here, since the metal halide WF ₆ is used as the source gas, there is a problem that the high dielectric film 50 is deteriorated by a highly corrosive fluorine component during the reaction.

FIG. 1 (d) is a cross-sectional view illustrating a process of completing the upper electrode by depositing the doped polysilicon layer 70 on the resultant product on which the upper metal electrode layer 60 is formed. However, if the problem of deterioration of the high-k dielectric film 50 has already occurred before this process, a highly reliable capacitor cannot be obtained.

Accordingly, an object of the present invention is to provide a capacitor manufacturing method of a semiconductor device that can obtain a highly reliable capacitor by preventing corrosion of the high-k dielectric film by the halogen element generated in the process of forming the upper metal electrode layer for the capacitor of the semiconductor device. have.

In order to achieve the above object, the present invention, forming a lower electrode for a capacitor on a semiconductor substrate, depositing a high dielectric film on the resultant on which the lower electrode is formed, and the silane (SiH ₄ ) on the high dielectric film Flowing a gas, forming a top metal electrode layer using a source gas containing a metal halide on the high dielectric film, and depositing a doped poly silicon layer on the metal electrode layer by depositing a doped poly silicon layer. It provides a capacitor manufacturing method of a semiconductor device comprising the step of completing the upper electrode layer.

The capacitor manufacturing method may be applied to the case where the high dielectric film is made of tantalum oxide (TaO). Further, in the case where the upper metal electrode layer is tungsten nitride (WN) formed using WF ₆ and NH ₃ as the source gas, the method of manufacturing the capacitor is adapted to protect the high dielectric film from fluorine elements. It is preferable. Meanwhile, the upper metal electrode layer is formed through any one process selected from chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) so as to realize good step coverage. It is preferable.

According to the present invention described above, hydrogen halide dissociated from the silane (SiH ₄ ) gas passed through is combined with a halogen element generated from the metal halide source gas used to form the upper metal electrode layer. ) Is formed and then discharged out of the deposition apparatus to prevent corrosion of the high-k dielectric layer by the halogen element.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 (a) to 2 (d) are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the present invention.

FIG. 2 (a) is a cross-sectional view illustrating a process of forming the high dielectric film 150 on the resultant product in which the cylindrical lower electrode 140 is formed, and corresponds to the same process as that described in FIG. do.

Specifically, in this process, the insulating layer 120 is formed on the semiconductor substrate 110, the contact hole 130 for contacting the active region of the transistor is formed, and then the doped polysilicon is formed. Forming a cylindrical lower electrode 140 and forming a high dielectric film 150 on a resultant product on which the cylindrical lower electrode 140 is formed. In this embodiment, tantalum oxide (TaO) is used for the high dielectric film 150.

FIG. 2 (b) is a cross-sectional view showing a process corresponding to the center of the present invention, and shows silane (SiH ₄ ) gas 152 flowing to the surface of the resultant material on which the high dielectric film 150 is deposited. Next, tungsten nitride (WN) is deposited by applying chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) using WF ₆ and NH ₃ as the source gas. In this case, since the deposition process is a high temperature process, the silane gas 152 is dissociated into the silon atom 154 and the hydrogen atom (not shown), respectively. The silicon atom 154 is adsorbed on the surface of the high-k dielectric layer 150, and the hydrogen atom combines with the fluorine element dissociated in the WF ₆ gas to form volatile HF gas and then out of the deposition apparatus. Since it is discharged, corrosion of the high dielectric film by the fluorine element is prevented.

FIG. 2 (c) is a cross-sectional view illustrating a process of first forming the upper metal electrode 160 so that the upper electrode having good step coverage can be formed while suppressing the growth of the natural oxide film on the high dielectric film 150. . In this case, since WF ₆ and NH ₃ are used as the source gas, tungsten nitride (WN) is deposited on the upper metal electrode 160.

FIG. 2 (d) is a cross-sectional view illustrating a process of completing the upper electrode by depositing the doped polysilicon layer 170 on the resultant material on which the upper metal electrode layer 160 is formed.

Therefore, according to the embodiment of the present invention described above, since the corrosion of the high-k dielectric layer due to the fluorine element generated in the process of forming the upper metal electrode layer for the capacitor of the semiconductor device is prevented, a highly reliable capacitor can be obtained.

The present invention is not limited to the above embodiments, and it is apparent that many modifications can be made by those skilled in the art within the technical idea of the present invention.

Claims (4)

Forming a lower electrode for the capacitor on the semiconductor substrate; Depositing a high dielectric film on the resultant formed lower electrode; Flowing a silane (SiH ₄ ) gas on the high dielectric film; Forming an upper metal electrode layer as a source gas including a metal halide on the high dielectric film; And depositing a doped poly silicon layer on the metal electrode layer to complete an upper electrode layer. The method of claim 1, wherein the high dielectric film is made of tantalum oxide (TaO). The method of claim 1, wherein the upper metal electrode layer is made of tungsten nitride (WN). The method of claim 1, wherein the upper metal electrode layer is formed through any one process selected from chemical vapor deposition (CVD) and plasma chemical vapor deposition (PECVD).