KR100256495B1 - A control method of luminescence for pdp television - Google Patents

Abstract

PURPOSE: A method for adjusting a luminescence of a PDP television is provided to adjust a luminescence of a PDP television by storing vector tables according to each luminescence and contrast in a microcomputer, by outputting one value among the vector tables to a timing controller according to an external signal, and by changing a discharge sustain block according as a counter of the timing controller is controlled. CONSTITUTION: A memory unit(100), a data interface unit(110), an address driving IC(120) process a PDP gradation of digital video data under the control of a timing controller unit(130). An external signal input unit(200) inputs an adjustment signal of a luminescence or a contrast. An external input receiving unit(300) receives a signal transmitted from the external signal input unit(200). A microcomputer(400) analyzes the external input signal received, and selects data relevant to a vector table stored in a ROM. A timing controller(130) makes a period pulse outputted from the microcomputer(400) operated as an enable signal of a counter.

Description

Brightness Control Method of PDTV

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the gradation processing of a PDP television (Picture In Picture Television). A control method of luminescence for picture in picture television.

In general, luminance processing of a television using a PDP, which is a type of flat panel display, is performed by analogue signal adjustment at an AV (Audio-Video) stage.

Fig. 1 is a schematic explanatory diagram of PDP driving and luminance processing of an AC type PDP-TV. The composite video signal received through the antenna is analog-processed in the AV unit 1 and digitalized by the analog-to-digital conveter (ADC) unit 2 with constant data. This image data is again provided to the address driver IC 6 in the form of a data stream conforming to the PDP gray scale processing characteristics via the memory unit 3 and the data interface unit 4. In addition, the timing control unit 5 and the high voltage drive circuit unit 8 output the high voltage control pulses required by the sustain / scan drive IC 7, and the AC / DC change unit 9 uses the AC power as an input. Generate and supply all DC voltages required by the system.

Looking at the luminance processing of the conventional PDP-TV as follows. The AV unit 1 receives an NTSC composite signal, separates the analog R, G, and B signals from the horizontal and vertical synchronization signals, and converts an APL (Average Picture Level), an analog signal corresponding to the average value of the luminance signal (Y). Obtained and supplied to the ADC unit 2. This APL is used to improve the brightness of PDP-TV systems.

The ADC unit 2 receives an analog RGB signal as an input, converts it into a digital data, and outputs the digital data to the memory unit 3, where the digital data is converted into image data for improving the brightness of the PDP-TV system. to be. The configuration and luminance processing of the ADC section 2 will be described further.

Fig. 2 is a block diagram illustrating an example of the prior art including a brightness control section of a PDP television. An AV unit 40 which receives a composite video signal and separates an audio signal and a video signal to process an analog composite video signal, a luminance controller 80 which supplies an analog luminance control signal to the AV unit 40; PDP for digitizing the input audio and video signals and luminance control signal, and for outputting the digital signal output from the ADC unit 50 into a data format suitable for PDP gradation processing and outputting it to the PDP 70. It is characterized by consisting of a drive unit (60). However, the conventional method of adjusting the brightness of the PDP by receiving the analog brightness control signals from the AV unit 40 and the ADC unit 50 as described above has a limitation in the degree of adjustment, so that the PDP is a direct drive method to the digital signal. In the analog control method, there is a problem that is not suitable for the PDP characteristics, and even if the discharge sustain pulse is digitally controlled, the system becomes complicated due to the need of an excessive logic circuit, and thus an error occurrence problem occurs.

The present invention has been made in order to solve the problems of the conventional brightness control method according to the conventional analog method in the method of controlling the brightness of the PDP-TV, and an object of the present invention is to maintain a discharge (sustain) that is currently fixed The present invention provides a method of varying the operation of discharge maintenance using a microcomputer in order to adjust the brightness of a PDP television.

In order to achieve the above object of the present invention, when performing gradation processing by dividing one field into eight subfields in one vertical dynamic period, the discharge maintenance in the subfield is discharged in a fixed section using a counter in one vertical dynamic period. The vector table for each brightness or contrast is stored in the microcomputer, and one of the vector tables is output to the timing controller using period pulses according to an external signal, and the counter of the timing controller is controlled to maintain discharge. A method of controlling the brightness of a PDP television by varying the interval is proposed.

1 is a schematic block diagram of a PDP television;

2 is a block diagram of conventional analog luminance processing.

3 is an explanatory diagram for each operation of one subfield corresponding to the main part of the present invention;

4 is a block diagram illustrating a brightness control method of the present invention.

<Explanation of symbols for the main parts of the drawings>

1, 40: AV unit 2, 50: ADC unit

3, 100: memory section 4, 110: data interface section

5, 130: timing controller 6, 120: address driver IC

7: Hold / Scan drive IC 8: High voltage drive circuit

9 AC / DC converter 10: composite video signal processor

20: digital image data processing unit 30, 60: PDP drive unit

70: PDP 80: luminance control unit

200: external signal input unit 300: external input receiver

300: micom

Hereinafter will be described in detail the configuration and operation of the embodiment for achieving the above object of the present invention. First, in order to assist the understanding of the luminance adjusting method of the present invention, a general description of the overall configuration of a PDP television will be described. 1 described above is an overall block diagram of a PDP television.

The PDP television analog-processes a composite video signal received through an antenna and provides the analog-to-digital conversion unit (ADC unit) with an antenna, a tuner unit (not shown), an IF amplifier unit, and an AV unit (1). (10), the ADC unit (2) for digitally processing the analog composite video signal input from the composite video signal processing unit (10), and the rearrangement of the digital image data input from the ADC unit (2). A memory unit 3, a data interface unit 4 for receiving rearranged digital image data into a data stream suitable for PDP gradation processing, the memory unit 3, a data interface unit 4, Data from the digital image data processing unit 20 comprising a timing controller unit 5 for generating and supplying control signals such as a main clock and a shift signal for controlling the entire system, and data from the data interface unit 4 described above. An address driving IC 6 for receiving trim image data and supplying data to the plasma panel for gradation processing, a high voltage driving circuit 8 for providing a high voltage required to drive the PDP, and the high voltage driving circuit ( It consists of a PDP driver 30 made of a holding / scanning driving IC 7 driven at the output of 8). In order to display on a PDP television, the AV unit 1 receives an NTSC composite signal, separates an analog RGB color signal from a horizontal and vertical synchronization signal, and uses an APL (Average Picture) corresponding to an average value of the luminance signal (Y). Level) is obtained and supplied to the ADC unit 2. This APL is used to improve the brightness of PDP televisions. NTSC composite video signal is interlaced scanning method, one frame is excellent and consists of two fields of odd number, horizontal synchronous signal is about 15.73KHZ, vertical synchronous signal is about 60Hz frequency. The audio signal separated from the composite video signal is output through the audio amplifier directly to the speaker.

The ADC unit 2 receives an analog composite video signal as an input, converts it into digital data, and outputs the converted digital data to the memory unit 3. In this case, the digital video data is converted to improve the brightness of the PDP television. The ADC section 2 is divided into an amplifier section, a clock generation section, a sampling area setting section, and a data mapping section. The amplifying section in the ADC section 2 amplifies the analog RGB color signal and the APL signal to a signal level suitable for quantization, and converts the horizontal and vertical synchronization signals into a constant phase and outputs them. The clock generator must use a clock synchronized with the input synchronous signal. For this purpose, the clock generator generates clocks using phase locked loops (PLLs). The PLL outputs a clock synchronized with the input synchronization signal. If the clock synchronized to the input synchronization signal is not used, the vertical linearity of the displayed image is not guaranteed. In addition, the sampling area is set to a vertical position and a horizontal position. The vertical position section is a pulse for setting only the line with the image information among the input signals, and the horizontal position section is a pulse for setting only the time with the image information among the lines set to the vertical position. The vertical position section and the horizontal position section are the standards for sampling. At this time, a total of 480 lines are selected, each with 240 lines of even and odd fields. The horizontal position section should be the time for at least 853 sampling clocks per selected line.

The data mapping unit of the ADC unit 2 maps RGB image data output from the ADC unit to data corresponding to the brightness characteristics of the PDP. In other words, by arranging several vector tables in the ROM, selecting an optimal vector table according to the digitized APL data, and mapping the RGB image data output from the ADC unit 2 by 1: 1 mapping to the memory unit in the form of improved RGB image data. Provide to (3).

The memory unit 3 reconstructs the video data of one field into a plurality of subfields for the PDP gradation process, and then rearranges the most significant bit (MSB) to the least significant bit (LSB). In other words, the image data provided in parallel (MSB to LSB) in the ADC unit 2 is rearranged so as to store bits having the same weight in one address of the frame memory.

In order to continuously rearrange the RGB image data provided by the ADC unit 2, two first and second shift registers are provided, and they alternately load and shift. In addition, two frame memories that can store one RGB image data (853 × 3 (RGB) × 480 × 8 Bits × 10 Mbit) are also provided, and they alternately perform write and read operations in units of frames. This allows the image data to be stored and displayed continuously.

The data interface unit 4 temporarily stores RGB image data from the memory unit 3 and provides the data in the form of data required by the address driver IC 6. In order to display the screen on the PDP, the data interface unit 4 is required because it is arranged in accordance with the arrangement of the RGB pixels output from the memory unit 3 and supplied to the address driver IC 6. If the size of the display is 853 x 3 (r, g, b) x 480, the data interface unit 4 must temporarily store one line of data (853 x 3 = 2559 bits) and ensure data continuity. Since the input and output must be performed simultaneously, two lines of temporary storage (2559 x 2 = 5118 bits) are required. That is, a total of 24 bits of data each of 8 bits of the RGB image data from the memory unit 3 are sequentially inputted (107 times) into the first temporary storage area (24 bits x 107 = 2598 bits), and at the same time intervals, the second temporary data is stored. The previous one-line amount of data in the storage area is output in the form of a data stream required by the address driver IC 6. Such an input / output operation alternately occurs in the first and second temporary storage areas. That is, after the first temporary storage area operates in the input mode and the second temporary storage area operates in the output mode, the reverse operation is then repeated.

When the data interface unit 4 outputs the temporarily stored image data to the address driver IC 6, the data interface unit 1 provides one bit of data and a total of 64 bits of image data in the form of a data stream to each driver IC. In this way, when image data is input to the address driver IC in turn (40 times) and shifted in parallel, one line (64 bits x 40? 2559 bits) of image data is loaded into the address driver IC 6. This process should be the same as the input mode operation time of other temporary storage areas, so the input mode should be operated at twice the frequency of the output mode.

The high voltage driving circuit unit 8 combines the DC high voltage supplied from the AC / DC converter 9 according to the control pulses of various logic levels output from the timing controller unit 5. Create a control pulse that is needed in to allow the PDP to run. In addition, the data stream provided from the data interface section 4 to the address driving IC 6 is also raised to an appropriate voltage level to enable selective writing on the PDP panel. On the other hand, the AC / DC converter 9 generates and supplies the high voltage required to combine the electrode driving pulses with the AC power source (220V, 60Hz) and the DC voltage required by each part constituting the other PDP television. do.

Hereinafter, a method of controlling the luminance of the PDP television by adjusting the discharge holding period of the subfield of the present invention will be described in detail. 4 is a schematic block diagram for explaining a brightness control method of the present invention. PDP composed of a memory unit 100, a data interface unit 110, and an address driver IC 120 for performing PDP gradation processing on the digital image data input from the ADC unit 2 under the control of the timing controller 130. In the driving apparatus, the external signal input unit 200 such as a remote controller for inputting a control signal of brightness or contrast and the external input receiver 300 for receiving the signal transmitted from the external signal input unit 200 and the reception thereof. Analyzes the external input signal, selects the relevant data of the vector table stored in the ROM, and creates a period pulse corresponding to the variable section in each western field acting on one vertical drive according to the selected data. The microcomputer 400 generates and outputs a period pulse corresponding to the output signal, and acts as an enable signal of the counter output from the microcomputer 400. Constitute a timing controller 130.

Looking at the brightness control method of the present invention with reference to the configuration for achieving the above object of the present invention, the external signal input step sent by the user to a remote controller, etc. for adjusting the brightness or contrast, and the external signal An external input detection step of detecting a signal input at the input step, and a data output step of outputting corresponding data to a timing controller from a vector table embedded in the microcomputer ROM corresponding to the control signal indicated by the external input signal; In the operation of one subfield, the fixed section and the variable section are distinguished and a fixed period pulse is always output in the fixed section, and the variable section is variable according to the data value input in the data output step. A period pulse output step of outputting a period pulse; The two period pulses (period-static, period-variable) consist of a counter enable process that enables a counter that produces an output waveform inside the timing controller.

Hereinafter will be described in detail the operation of the brightness adjustment method of the present invention. In the present invention, the method of adjusting the brightness of the PDP television takes a method of adjusting the length of the discharge sustaining section during the operation of each subfield acting on one vertical moving mechanism. That is, for example, when there are about 20 levels of brightness required, if the user of the television inputs a command of the required brightness level to adjust the brightness, the discharge maintenance section is adjusted according to the command. However, there may be a way to implement such a method in logic, but if there are only 20 information about brightness, all 20 of them should be implemented as logic, and logic for performing this for other information, such as contrast, is also implemented. The system is complicated and there is a high risk of malfunction. Therefore, in the present invention, an embodiment for implementing the program by a method of performing an external input for the brightness adjustment described above. That is, in order to implement luminance and contrast programmatically, one field (60 Hz) operating between one vertical driving unit is divided into several subfields, and the image data corresponding to each subfield is transferred through the address driver IC of the PDP driver. The panel is written in units of lines or blocks of data, and grayscale processing is performed for the total discharge holding period. At this time, the gradation processing is performed by applying driving pulses to each electrode of the PDP panel during one vertical sync period, and repeating the operations of writing or erasing the entire screen, writing data, and maintaining the discharge. Is done.

3 is for explaining the operation in one subfield for the gradation processing of the above PDP television. The PDP is generally driven by a continuous pulse with a constant voltage, and gradation display is implemented by digital rather than analog. Therefore, the system of the PDP television is operated by the configuration and operation for processing digital data. In the driving method for grayscale processing of the PDP, it is common to read the odd-numbered line data after one line of image data stored in the memory and repeatedly read the odd-numbered line data between one vertical driving mechanism. In this case, one field is divided into a plurality of subfields (256 gray level to 8 subfields), and image data corresponding to each subfield is read in sequence and provided as a data interface. The driving method of one subfield is performed in the following driving order.

As an operation mode for discharging the discharge, the AC type PDP forms a discharge at a low voltage in a period of neutralizing the wall charge so that the wall charge is not sufficiently formed, or an erase pulse having a short pulse width is applied to the wall. Eliminate wall charges by preventing charges from reaching steady state. That is, in order to erase the wall charge remaining in the selected (discharged) pixel after the discharge sustain of the previous subfield, the wall charge is written to all the pixels for a short time which is not visible, and then all the pixels. To erase the remaining wall charges and erase all remaining wall charges, and to write and discharge the data on a line-by-line basis through the data writing electrode while shifting the scanning pulse sequentially on the line scanning electrode. The discharge is prevented by the sustain pulse of voltage lower than the selection pulse by utilizing the data writing and scan mode and the storage function characteristics of gas discharge, which are necessary for the initial discharge formation to selectively form wall charges in the pixel. Discharge sustain operation is maintained.

In the driving method of one subfield as described above, the signal processing states of the entire screen erasing section and the data writing and scanning section are fixed unchanged for each subfield. However, since the discharge sustaining section corresponds to the image display section, it functions differently for each subfield according to the length of the input data. That is, the discharge maintenance section is a variable section that gives a repetitive waveform by varying the discharge maintenance section by the weight of each digital data for gradation processing. The present invention is a method for controlling the brightness of a PDP television by programmatically varying a discharge sustain section corresponding to the variable section. To this end, in the present invention, a data table for the brightness processing corresponding to the brightness level and a vector table for contrast adjustment are created and stored in a ROM or a separate ROM of a PDP television. During the full screen write and erase (step 1), data write (step 2), and discharge sustain (step 3) operations of the subfields acting on one vertical dynamic mechanism, If there is an external input signal for brightness control by generating a pulse (period-static) corresponding to the section and the pulse (period-variable) corresponding to the section of step 3 having an operation length of which the operation section is variable by the external signal. According to the external signal, one of the corresponding vector tables is output as a period pulse. The two period pulses are used as an enable signal of a counter that generates an output waveform in a timing controller.

As described above, the present invention stores a vector table made of data related to brightness or contrast in a ROM of a microcomputer, creates a period pulse corresponding to a discharge maintenance section that is a variable section of each subfield, and has a fixed operation characteristic. By enabling the counter of the timing controller with a period pulse of, the brightness of the currently fixed PDP television can be adjusted without adding a logic circuit.

Claims (1)

An external signal input step of inputting an external signal sent by a user of the PDP television to a remote controller for adjusting brightness or contrast; An external signal input 00000 detection step for detecting a signal input in the external signal input step; A data output step of outputting the corresponding data to a timing controller in a vector table made up of data relating to brightness or contrast stored in a microcomputer ROM of a PDP television corresponding to the control signal indicated by the external input signal; In the operation of one subfield, the fixed section and the variable section are distinguished and a fixed period pulse is always output in a fixed section, and in a variable section, it is variable according to the data value input in the data output step. A period pulse output step of outputting period pulses; The luminance control method of the PDP television, characterized in that the above two period pulses (period-static, period-variable) includes a counter enabling process for enabling a counter for generating an output waveform inside the timing controller.

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