KR100255777B1 - Digital tv receiver decoder device - Google Patents

Abstract

PURPOSE: A digital TV receiving decoder is provided to improve the image quality by providing an integration IDCT which considers a luminescence and a chrominance signal and performs a sampling according to different sizes. CONSTITUTION: The first IDCT/down sampling unit(31) performs a horizontal 8*4 down sampling. The first addition unit(33) adds 8*4 data to motion compensation information. The first frame memory(35) memorizes an output of the first encoder(34). The first decoder(36) decodes the output of the first memory(35). The first up sampling unit(37) outputs the output of the first decoder(36) considering motion vector information(40) as 8*8 data. The first down sampling unit(39) performs a down sampling of an output of the first motion compensator(38). The second addition unit(43) adds 4*4 data to motion compensation information. The second frame memory(45) memorizes an output of the second encoder(44). The second decoder(46) decodes the output of the second frame memory(45). The second down sampling unit(49) performs a horizontal/vertical down sampling of the output of second motion compensator(48). The third down sampling unit(50) perform a vertical down sampling of the 8*4 output of the first decoder(36). A multiplexer(51) outputs a video signal finally decoded.

Description

Digital TV Receive Decoder Device

The present invention relates to a video decoder device of a digital TV receiver for compressing and transmitting a video signal, and decoding and displaying the transmitted compressed video signal in a decoder of the receiver.

As an embodiment, the present invention is a digital TV decoder for receiving an MPEG video signal and decoding the received video signal, wherein the decoder device is for receiving an HD video using an SDTV receiver. The present invention relates to a digital TV receiver decoder device capable of maintaining image quality at its best.

The digital TV receiver decodes the video signal compressed and transmitted in MPEG2 by the decoder and displays it on the screen.

Typically, digital TV receivers are roughly classified into HDTV class and SDTV class according to the number of pixels (pel = picture elements) taking into consideration factors affecting sharpness / image reproduction performance (quality). It has a performance of up to 1920pels / 1080lines and SDTV, for example, 640pels / 480lines.

1 shows an example of a decoder in a digital TV receiver, one pixel is represented by 8 bits, one macro block is 16 * 16pel or pixel data structure, and corresponds to each class including motion vector information. It handles a bit stream of a level.

In Figure 1, Variable Length Decoder (VLD) 1 variable length decodes the input bit stream data, IDCT 2 decodes the variable length decoded data by Inverse Discrete Cosine Transform, The adder 3 stores the reconstructed image in the frame memory 5 by using the motion compensated information of the motion estimation compensator 4 in the decoded data, and the reconstructed original image signal is output to the display means ( Video out)

Since the HDTV receiver receives and decodes HD class data, there is no obstacle in receiving and decoding SD data.

Since the SDTV receiver receives and decodes the SD level data, there is no obstacle in receiving and decoding the SD level data, but from the viewpoint of compatibility, the SDTV receiver should be able to receive and process (decode / display) the HD level data.

To this end, the decoder of the SD TV receiver performs 'data processing' for the SD reception of HD data.

This data processing process is secured through downsampling-filtering / decimation.

FIG. 2 shows a simple example of a downsampling method of a decoder device for receiving, decoding and displaying HD data in an SD TV receiver.

Figure 2 is a technique for reducing the data of 8 * 8 size to 4 * 4 size.

The 8 * 8 size data block 21 is inverse discrete cosine transformed by the IDCT / downsampler 22 and downsampled in both horizontal and vertical directions to reduce the size to 4 * 4.

The method is subsampling 402 of the image block 401 in the horizontal direction, as shown in FIG. 4, and is half a row in the horizontal direction, and again perpendicular to the image block 403 which is this horizontal line. Subsampling 404 in the direction to reduce it by 1/2 in the vertical direction to obtain the downsampled image block 405.

In FIG. 2, downsampled image data was obtained by selecting 16 pixels and rearranging them to 4 * 4 as indicated by black dots from the upper end of the data block 21. In FIG.

Discarded pels except selected pels are shown as white dots (blanks).

The number of pixels selected here is not necessarily 16, and there are various other methods for selecting the pixels.

The image data downsampled to 4 * 4 is stored in the frame memory 24 via the adder 23 (or may be a field memory).

The image data of the frame memory 24 is upsampled to 8 * 8 by the upsampler 25 and upsampled by the upsampler 25 for motion vector information processing adapted to the down sampled image data. The data is motion compensated by the motion vector in the motion compensation predictor 26. Since the compensated information is 8 * 8 size, downsampling in the horizontal / vertical direction is performed in the downsampler 27 again in 4 * 4 size. Then, this 4 * 4 downsampling motion processing information is added to the adder 23, and finally -8 * 8 we want to obtain and output the video downsampled to 4 * 4.

The decoder of the conventional digital TV receiver has the following problems.

Degradation of image quality is inevitable because it simply downsamples HD data to SD data.

This is because MPEG2 downsamples horizontally and vertically without considering I, P, and B pictures.

That is, uniform downsampling is performed in the horizontal and vertical directions without considering the picture having a great influence on the image quality of the reproduced image and the picture that is not.

Downsampling in the horizontal and vertical directions results in a total decoding process for the noise component, causing a problem called error drifting.

This is because an I picture or a P picture which has the greatest influence on image reproduction and a B picture that are not, are downsampled with the same weight, and the color signal (chominance) and the luminance signal (luminance) are downsampled with the same weight.

The present invention provides a digital TV receiver decoder for downsampling to different sizes in consideration of both color signals and luminance signals together with I, P, and B pictures as a factor that affects the image quality of a reproduced image.

According to the present invention, by performing downsampling with different sizes in consideration of a picture and a color signal / luminance signal, a high quality improvement is achieved in the SDTV.

The present invention performs downsampling with different sizes in consideration of a picture and a color signal / luminance signal, and performs bit reduction encoding considering a correlation between adjacent pixels for storing downsampled image data. High image quality while reducing memory size.

1 is a block diagram of a digital TV receiver decoder

2 illustrates a conventional downsampling technique in a digital TV receiver decoder.

3 is a block diagram of a digital TV receiver decoder according to the present invention.

4 illustrates a method for subsampling 2D image data.

5 is a diagram illustrating a filtering / decimation method in a vertical or horizontal direction.

6 is a diagram illustrating a vertical filtering / decimation method of interlaced scanning image data.

7 is a diagram illustrating a filtering / decimation method that does not distinguish a top field from a bottom field.

8 is a diagram illustrating a filtering / decimation method for distinguishing a top field from a bottom field.

The digital TV receiving decoder device of the present invention divides the input block data into a first group of data and a second group of data except for the first group, and performs a first downsampling on the first group of data. Downsampling means, second downsampling means for performing a second downsampling different from a first downsampling size for the second group of data, and motion compensation processing means for performing motion compensation for the downsampled image data And storage means for storing and outputting the downsampled and motion compensated data, and output means for outputting the downsampled first group of data and the second group of data.

The digital TV receiver decoder according to the present invention comprises: first processing means for performing a first downsampling smaller than a second downsampling size with respect to data of a first group selected from among input block data; First storage means for storing downsampled data to a first downsampling size by the processing means, and upsampling with one data for motion compensation of the data processed to the first downsampling size and then compensating for motion First motion vector processing means for downsampling to a first downsampling magnitude to output data that compensates for the motion of the first downsampled data;

Second processing means for performing a second downsampling larger than a first downsampling size on the second group of data except the first group selected from the input block unit data; Second storage means for storing downsampled data with a downsampling size of two; and second downsampling after upsampling with one data for motion compensation of the data processed with the second downsampling size; Second motion vector processing means for downsampling to a size and outputting data that compensates for the motion of the second downsampled data;

And output means for outputting the motion compensated final data as decoded data.

At this time, the processing is separated into the first data group processing and the second data group processing for convenience of description.

This can be easily performed by those skilled in the art that one process route (route) in the signal processing process without departing from the scope of the present invention.

In the present invention, the first downsampling is M * N, the second downsampling is K * L, where M * N > K * L.

In the present invention, the first data group and the second data group are considered as follows for the luminance signal Y, the color signal C, I, P, and B pictures.

If the first data group is Y, the second data group is C.

If the first data group is IY, PY, the second data group is IC, PC, BY, BC.

Fig. 3 is an embodiment of the digital TV receiver decoder of the present invention, in which downsampling of luminance signals I and P pictures by 8 * 4 and downsampling of luminance signal B pictures and color signals by 4 * 4.

Hereinafter, the operation of the digital TV reception decoder device according to the present invention will be described.

The configuration will be described first.

First IDCT / downsampling means 31 for performing IDCT and 8 * 4 downsampling in the horizontal direction with respect to IY and PY 32 by inputting the DCT coefficient 30, and the 8 * 4 data and motion compensation. A first adding means 33 for adding and outputting information, a first encoder 34 for performing 8 * 4 data bit reduction encoding output from the first adding means 33, and the first encoder output. A first frame memory (35) for storing the data, a first decoder (36) for decoding the output of the first frame memory (35), and an output of the first decoder (36) for motion vector information (40). 1) Upsampling means 37 for horizontally upsampling and outputting 8 * 8 data, and the output of the first upsampling means 37 in consideration of the motion vector information 40. The first motion compensator 38 and the output of the first motion compensator 38 are downsampled to 8 * 4 for the addition. First downsampling means (39) for inputting to the apparatus 33 as motion compensation processing information;

A second IDCT / downsampling means 41 for performing IDCT and 4 * 4 downsampling in the vertical / horizontal direction with respect to the BY, IC, PC, BC 42 by inputting the DCT coefficient 30; A second adding means 43 for adding and outputting * 4 data and motion compensation information, and a second encoder 44 for performing bit reduction encoding of 4 * 4 data output from the second adding means 43; A second frame memory 45 for storing the second encoder output, a second decoder 46 for decoding the output of the second frame memory 45, and an output of the second decoder 46; Second upsampling means 47 for upsampling horizontally and vertically in consideration of the motion vector information 40 and outputting the data as 8 * 8 data, and outputting the output of the second upsampling means 47 to the motion vector information ( Considering 40), the second motion compensator 48 performs the motion compensation prediction process and the output of the second motion compensator 48 is 4 * 4 horizontally / vertically. Operating sampled by the second down sampling means (49) for inputting a motion compensation processing information to said adder (43) and;

Third downsampling means 50 for vertical downsampling the 8 * 4 output of the first decoder 36 to 4 * 4, the output of the second downsampling means 50 and the second decoder ( A multiplexer 51 for outputting the output of 46 as a final decoded video signal;

It is configured to include.

3 to 8, the operation of the present invention will be described.

The first IDCT / downsampling means 31 performs inverse discrete cosine conversion of the input DCT coefficient 30 and performs downsampling in the horizontal direction to reduce the size of 8 * 8 to 8 * 4.

Here, downsampling is performed on the luminance I picture IY and the luminance P picture PY and inputs this 8 * 4 data to the first adder 33.

There are many ways to downsample to M * N.

4 illustrates a process of downsampling an 8 * 8 image block in a horizontal direction and then downsampling again in a vertical direction to form a 4 * 4 image block as described above.

Fig. 5 performs filtering processing of adjacent pixels among the vertical components 5a and 5b of the original macro block to produce eight pixels 5c, which are filtered / decimated. It shows the process of producing the downsampling macroblock 5d of (same for the horizontal direction).

6 shows a process of performing downsampling in the vertical direction in the case of interlaced scanning data.

The field DCT macroblock 6a is reconstructed into a top field (black spot) and a bottom field (white point) (6b), and 1/2 is down for each of the top field 6c and the bottom field 6d. Sampling was performed (in which the top field considers the extended pixel), and this is reconstructed into two fields (6e) to perform downsampling through vertical filtering / decimation.

Fig. 7 shows a case in which the frame DCT macroblock 7a is made into a macroblock 7b filtered / decimated without a top / bottom field distinction and then reconstructed into 2 fields (7c). Fig. 8 shows a frame DCT macroblock ( This is the case where 8a) is divided into two fields by dividing it into a top field and a bottom field.

In addition to the methods described with reference to FIGS. 4 to 8, horizontal downsampling, vertical downsampling, and horizontal / vertical downsampling in consideration of horizontal or vertical directions or both directions may be performed through various known methods. DCT macroblock data or DCT macroblock on a field basis can also be used, and top field and bottom field can be distinguished.

The result of performing 8 * 4 horizontal downsampling on the 8 * 8 IY, PY macroblocks as described above is applied to the first adder 33.

The output of the first adder 33 is input to the first encoder 34 performing bit reduction encoding to reduce the amount of bits by using the correlation of adjacent pixels in consideration of the capacity limitation of the first frame memory 35.

The bit amount is reduced to 14 bits by removing 2 samples in consideration of the correlation of adjacent pixels in the horizontal (or vertical) direction based on 8 * 4.

An example of a method of reducing the number of bits is DPCM.

The downsampling data is encoded with horizontal (or vertical) pixels x1, x2 with values of x1 and x2-x1, where x1 is encoded as an 8-bit value, x2-x1 is encoded as a 6-bit value, or x1 is As an 8-bit value, x2-x1 encodes a 6-bit non-uniformly quantized value.

This process may be similarly performed for the second encoder 44.

The bit-reduced data by the DPCM technique as described above is stored in the first frame memory 35 and decoded by the first decoder 36 through an inverse process of the decoding for image restoration (reproduction).

The decoded 8 * 4 data is upsampled in the horizontal direction by the first sampling means 37 which receives the motion vector information 40 for motion compensation and output as 8 * 8 data.

The upsampled 8 * 8 data is input to the first motion compensator 38 and motion compensated by the motion vector information 40, and the motion compensated information is 8 * 8 in size to the first downsampling means 39. Is entered.

The first downsampling means 39 horizontally downsamples the input 8 * 8 motion compensation information into 8 * 4 and supplies it to the first adder 33, whereby the first IDCT / downsampling means 31 makes the 8 * 8 motion compensation information. A motion compensated I, P picture luminance signal corresponding to IY and PY data (size) downsampled to 4 is outputted.

By repeating the above process, IY and PY data processing is performed, and 8 * 4 data bit-decoded from the first frame memory 35 is vertically downsampled to 4 * 4 size while passing through the third downsampling means 50. And matched to multiplexer 51 (to match BY, IC, PC, BC downsampled to 4 * 4).

The second IDCT / downsampling means 41 performs inverse discrete cosine conversion of the input DCT coefficient 40 and downsamples the horizontal / vertical direction to reduce the size of 8 * 8 to 4 * 4.

Here, downsampling is performed on the luminance B picture BY and the color signals IC, PC, BC and inputs this 4 * 4 data to the second adder 43.

Downsampling with K * L is the same as in FIGS. 4 to 8.

As a result of performing the 4 * 4 horizontal and vertical downsampling on the 8 * 8 BY, IC, PC, BC macroblocks, the second adder 43 is applied.

The output of the second adder 43 is input to the second encoder 44 which performs bit reduction encoding by the DPCM technique, and takes into account the bit amount by using the correlation of adjacent pixels in consideration of the capacity limitation of the second frame memory 45. Reduce

The bit-reduced data by the DPCM technique as described above is stored in the second frame memory 45, and decoded by the second decoder 46 through the reverse process of the decoding for image restoration (reproduction).

The decoded 4 * 4 data is upsampled in the horizontal / vertical direction by the second sampling means 47 which receives the motion vector information 40 for motion compensation, and is output as 8 * 8 data.

The upsampled 8 * 8 data is input to the second motion compensator 48 and motion compensated by the motion vector information 40, and the motion compensated information is 8 * 8 in size to the second downsampling means 49. Is entered.

The second downsampling means 49 supplies the second adder 43 by horizontally / vertically downsampling the input 8 * 8 motion compensation information 4 * 4 to the second adder 43, whereby the second IDCT / downsampling means 41 Outputs motion compensated BY, IC, PC, and BC data down to 4 * 4 downsampled data (size).

By repeating the above process, BY, IC, PC, BC data processing is performed, 4 * 4 data bit-decoded from the second frame memory 45 is input to the multiplexer 51, the third downsampling means ( Reconstructed together with the IY and PY data outputted at 50), the video is finally output as a down sampled 4 * 4 video signal (video out).

According to the present invention, when a HDTV image is received and processed by an SDTV receiver using MPEG2, it is possible to downsample a picture of high importance affecting the image quality of the reproduced image to include more information than a picture that is not. High quality images can be reproduced.

In addition, by adopting a bit reduction technique, it is possible to provide an SDTV with a reduced image size and improved image quality.

Claims (8)

First downsampling means for performing first downsampling on the data of the first group by dividing the input block data into data of the first group and data of the second group except this; Second downsampling means for performing a second downsampling different from the first downsampling size with respect to the motion compensation processing means for performing motion compensation on the downsampled image data, the downsampled and motion compensated data; And a storage means for storing and outputting the digital TV receiver. 2. The digital receiver decoder of claim 1, wherein the first downsampling size is M * N and the second downsampling size is K * L, M * N > K * L. The digital TV receiver decoder of claim 1, wherein the first and second downsampling means are selectively performed by one downsampling means. The digital receive decoder apparatus of claim 2, wherein 8 * 4 downsampling is performed on the data of the first group and 4 * 4 downsampling is performed on the data of the second group. The digital TV receiver decoder according to any one of claims 1 to 4, wherein the data of the first group is a luminance signal and the data of the second group are color signals. 5. The data of any one of claims 1 to 4, wherein the data of the first group are luminance signals of I, P pictures, and the data of the second group are color signals of I, P pictures, and luminance and color signals of B pictures. Digital TV reception decoder device. 5. The digital receive decoder according to any one of claims 1 to 4, wherein the data of the first group is a luminance and color signal of an I, P picture, and the data of the second group is a luminance and a color signal of a B picture. Device. 2. The apparatus of claim 1, further comprising a bit reduction encoder for reducing the number of bits in consideration of the correlation of adjacent pixels before storing the motion compensated data in the storage means, and a bit decoder corresponding to the bit reduction encoding when thrust from the storage means. And a digital TV receive decoder device.

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