KR100232179B1 - Liquid crystal display device and its manufacturing method - Google Patents

Abstract

The present invention relates to a liquid crystal display device, and to provide a liquid crystal display device and a method of manufacturing the same, which are suitable for preventing a short circuit caused by a narrow gap between pixel electrodes in accordance with the trend of high opening ratio.

The liquid crystal display device of the present invention for this purpose is a liquid crystal display device having a plurality of thin film transistors and pixel electrodes, a trench formed between the substrate, the pixel electrodes of the adjacent portion of the plurality of pixel electrodes formed on the substrate. The manufacturing method of the liquid crystal display device of the present invention includes a plurality of first bus lines, second bus lines, and pixel electrodes, wherein the plurality of first bus lines are formed on an insulating substrate. Forming an upper electrode of the plurality of second bus lines and the storage capacitor, forming a passivation layer on the front surface including the upper electrodes of the second bus line and the storage capacitor, patterning the passivation layer to form contact holes and trenches. Forming a pixel electrode material on the entire surface including the contact hole and the trench, and then forming at least the width of the trench. And forming a pixel electrode by patterning the substrate to have a separation distance as much as possible.

Description

Liquid crystal display and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method for manufacturing the same, which are suitable for preventing short circuits between pixels.

In general, a liquid crystal display device has two glass substrates facing each other and liquid crystal is interposed therebetween, and a bottom plate has a data line and a gate line arranged on a matrix, and a thin film transistor and a pixel electrode disposed at each intersection point. The top plate includes a common electrode and color filter layers of R (red), G (green), and B (blue).

The liquid crystal is injected between the upper plate and the lower plate and inserted into the polarizer to inject white light into a transmissive liquid crystal display.

Here, the lower plate will be described in detail. That is, a plurality of gate lines are formed in one direction with a predetermined interval on a transparent substrate such as glass or quartz, and a plurality of data lines are formed with a predetermined interval in a direction perpendicular to the gate line.

A pixel electrode is formed in each pixel region, and a thin film transistor for applying a signal of the data line to the pixel electrode according to the signal of the gate line is formed in each pixel region using the gate line as the gate electrode and the data line as the source electrode. .

As one of the methods for improving the aperture ratio in such a liquid crystal display, a POD (Polimer on Data) structure has been proposed.

The POD structure is a structure in which pixel electrodes overlap on a data bus line, and the gaps between each pixel and the pixel are very close to each other.

Hereinafter, a conventional liquid crystal display and a manufacturing method thereof will be described with reference to the accompanying drawings.

FIG. 1 is a layout diagram of a conventional liquid crystal display, and FIG. 2 is a cross sectional view taken along line A-A'B-B 'of FIG.

First, as shown in FIG. 2, each pixel electrode is formed at regular intervals on the passivation layer.

The manufacturing process of the conventional liquid crystal display device thus formed is as follows.

3 (a) to 3 (d) are cross-sectional views of a manufacturing process of a conventional liquid crystal display device, as shown in FIG. 3 (a), a gate to be used as a lower electrode of a storage capacitor in a predetermined region on an insulating substrate 31. As shown in FIG. After forming the line 32, the surface of the gate line 32 is anodized to form a first anodization layer 33.

The gate insulating layer 34 is formed on the entire surface of the substrate 31 including the first anodization layer 33 and has a width smaller than the width of the data line under the data line (not shown) to be formed in a later process. Dummy lines are formed of the semiconductor layer 35.

Subsequently, as illustrated in FIG. 3B, the data line 36 is formed to sufficiently include the semiconductor layer 35.

At the same time, a source / drain layer 37 to be used as an upper electrode of the storage capacitor is formed in a predetermined region on the gate insulating layer 34 above the gate line 32 used as the lower electrode of the storage capacitor.

In this case, the source / drain layer 37 uses the same material as the material of the data line 36.

Subsequently, a passivation layer 38 is formed on the entire surface including the source / drain layer 37 and the data line 36, and then passivation on the source / drain layer 37 is illustrated in FIG. The layer 38 is selectively removed to form contact holes.

Subsequently, the ITO layer 39 is formed on the entire surface, and then patterned to form a pixel electrode.

In this case, the ITO layer 39 is patterned so as to overlap the data line 36 at a predetermined interval on the data line 36, and the patterning is performed so that the pixel electrodes have a constant separation distance from each other.

3 (d) is a cross-sectional view showing another conventional embodiment in which the passivation layer 38 is directly deposited without completing a data line on the semiconductor layer 35 to complete the process.

For reference, FIG. 4 is a cross-sectional view taken along the line CC ′ of FIG. 1.

However, in the conventional liquid crystal display device as described above, the pixel electrodes overlap with the data lines due to the high opening ratio, resulting in a narrow space between the pixel electrodes, which causes a short circuit between the pixel electrodes.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a liquid crystal display device and a method for manufacturing the same, which are suitable for preventing a short circuit between pixels by ensuring an isolation distance between each pixel to the maximum.

1 is a layout diagram of a conventional liquid crystal display.

2 is a cross-sectional view taken along the line A-A ', B-B' of FIG.

3 (a) to 3 (b) are layout views of a conventional liquid crystal display.

4 is a cross-sectional view taken along the line C-C 'of FIG.

5 is a layout diagram of a liquid crystal display of the present invention.

6 is a cross-sectional view taken along the line A-A'B-B 'of FIG.

7 (a) to 7 (b) are cross-sectional views of a liquid crystal display device according to a first embodiment of the present invention.

8 is a cross-sectional view taken along the line C-C 'of FIG.

9 is a cross-sectional view of a liquid crystal display according to a second embodiment of the present invention.

10 (a) to 10 (c) are cross-sectional views of a liquid crystal display device according to a second embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

51 substrate 52 gate electrode

53: first anode oxide film 54: gate insulating layer

55 semiconductor layer 56 data line

57 source / drain layer 58 passivation layer

59 pixel electrode

The liquid crystal display device of the present invention for achieving the above object is a liquid crystal display device having a plurality of thin film transistor and a pixel electrode, the pixel electrode of the portion adjacent to each other among the plurality of pixel electrodes formed on the substrate; In the liquid crystal display device including a trench formed therebetween and having a plurality of first bus lines, second bus lines, and pixel electrodes, the plurality of first bus lines may include: Forming a plurality of upper electrodes of the plurality of second bus lines and the storage capacitor on the formed insulating substrate, forming a passivation layer on the entire surface including the upper electrodes of the second bus line and the storage capacitor, and patterning the passivation layer. Forming a contact hole and a trench, and forming a pixel electrode material on the entire surface including the contact hole and the trench And forming a pixel electrode by patterning at least the separation distance of the trench width.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to the present invention will be described with reference to the accompanying drawings.

FIG. 5 is a layout diagram of a liquid crystal display according to a first embodiment of the present invention, and FIG. 6 is a cross-sectional view of the liquid crystal display along the line A-A'B-B 'of FIG.

First, as shown in FIG. 6, the liquid crystal display according to the first exemplary embodiment of the present invention has a structure in which trenches are formed at portions where pixel electrodes are adjacent to each other in order to maximize the separation distance between pixel electrodes adjacent to each other. Has

That is, in a liquid crystal display device having a plurality of thin film transistors and pixel electrodes, the semiconductor layer 55 and the semiconductor layer 55 formed with the insulating layer interposed therebetween in a predetermined region on the substrate. A passivation layer 58 formed on the entire surface including the metal layer 57 and the semiconductor layer 55 and the metal layer 57, the contact hole exposing the surface of the metal layer 57 and the trench having a predetermined width. ) And a pixel electrode 59 formed on the passivation layer 58 including the exposed metal layer 57 at least a distance corresponding to the length of the trench inner surface.

In this case, the metal layer 57 is used as a source / drain electrode of the thin film transistor and is also used as an upper electrode of the capacitor.

The passivation layer 58 may be implemented as one layer or a plurality of layers.

A method of manufacturing a liquid crystal display device according to a first embodiment of the present invention having such a structure is as follows.

7 (a) to 7 (c) are cross-sectional views of the manufacturing process of the liquid crystal display device according to the first embodiment of the present invention.

That is, as shown in FIG. 7A, a gate line 52 to be used as a lower electrode of the storage capacitor is formed in a predetermined region on the insulating substrate 51, and then the surface of the gate line 52 is anodized. 1 anodization film 53 is formed.

The gate insulating layer 54 is formed on the entire surface of the substrate 51 including the first anodization layer 53 so as to have a width smaller than the width of the data line below the data line (not shown) to be formed in a later process. Dummy lines are formed of the semiconductor layer 55.

Subsequently, as illustrated in FIG. 7B, the data line 56 is formed to sufficiently include the semiconductor layer 55.

At the same time, a metal layer 57 to be used as the upper electrode of the storage capacitor is formed in a predetermined region on the gate insulating layer 54 above the gate line 52 used as the lower electrode of the storage capacitor.

In this case, the metal layer 57 uses the same material as the material of the data line 56.

Subsequently, after forming the passivation layer 58 on the front surface including the metal layer 57 and the data line 56, the passivation layer 58 on the metal layer 57 is selectively formed as shown in FIG. It is removed to pattern the exposed surface of the metal layer 57 to form a contact hole. At the same time, a trench is formed by selectively removing the passivation layer 58 of the portion of the pixel electrodes to be formed in a later process to be adjacent to each other.

Subsequently, the ITO layer is formed on the entire surface and then patterned to form the pixel electrode 59.

In this case, the ITO layer is patterned so as to overlap the data line 56 at a predetermined interval on the data line 56, and the pixel electrode 59 is patterned to have a constant separation distance from each other.

In this case, the separation distance between the ITO layers formed at a predetermined interval on the data line 56 is increased by the trench formed in the passivation layer 58.

That is, at least the separation distance of the inner surface of the trench is at least.

In this case, the trenches and the ITO layer formed on the passivation layer 58 may be formed by sequentially forming the passivation layer 58 and the ITO layer and then etching the respective etchant.

For reference, FIG. 8 is a cross-sectional view taken along the line C-C 'of FIG. 5 and is the same as the conventional cross-sectional view, and thus a detailed description thereof will be omitted.

9 is a cross-sectional view of the liquid crystal display according to the second exemplary embodiment of the present invention, which is taken along lines A-A 'and B-B' of FIG.

First, in the liquid crystal display according to the second embodiment of the present invention, as shown in FIG. 9, the passivation layer under the pixel electrode is stacked in two layers, and the passivation layer is disposed to maximize the separation distance between the pixel electrodes. The trench is formed.

A manufacturing process of the liquid crystal display according to the second exemplary embodiment of the present invention having such a structure is as follows.

10 (a) to 10 (c) are cross-sectional views of a manufacturing process of a liquid crystal display device according to a second embodiment of the present invention.

As shown in FIG. 10 (a), after forming a gate line 62 to be used as a lower electrode of a storage capacitor in a predetermined region on the insulating substrate 61, the surface of the gate line 62 is anodized to form a first anode. An oxide film 63 is formed.

The gate insulating layer 64 is formed on the entire surface of the substrate 61 including the first anodization layer 63 so as to have a width smaller than the width of the data line below the data line (not shown) to be formed in a later process. Dummy lines are formed from the semiconductor layer 65.

Subsequently, as illustrated in FIG. 10B, the data line 66 is formed to sufficiently include the semiconductor layer 65.

At the same time, a metal layer 67 to be used as the upper electrode of the storage capacitor is formed in a predetermined region on the gate insulating layer 64 above the gate line 62 used as the lower electrode of the storage capacitor.

In this case, the metal layer 67 uses the same material as the material of the data line 66.

Subsequently, the first passivation layer 68 and the second passivation layer 68a are sequentially formed on the entire surface including the metal layer 67 and the data line 66, and then patterned by photolithography to form trenches and contact holes.

Here, a plurality of passivation layers may be formed in addition to the first and second passivation layers 68 and 68a.

Subsequently, as shown in FIG. 10 (c), if the ITO layer 69 is formed on the front surface and patterned so that only a portion of the pixel region and the upper portion of the gate line remain, the separation distance between the adjacent ITO layers 69 is increased by the trench. Lose.

As described above, the liquid crystal display and the manufacturing method thereof according to the present invention have the following effects.

In other words, by forming a trench in one or more passivation layers, the pixel electrodes are prevented from being shorted to each other by ensuring maximum separation distance between pixel electrodes which are close to each other according to the trend of high opening ratio, thereby improving reliability of the device. have.

Claims (8)

A liquid crystal display comprising a plurality of thin film transistors including a gate electrode, a gate insulating film, a semiconductor layer, and a source / drain electrode, and pixel electrodes electrically connected to any one of the source / drain electrodes. And a trench formed between pixel electrodes of adjacent portions of the plurality of pixel electrodes formed on the substrate. The liquid crystal display device according to claim 1, wherein a passivation layer is interposed between the thin film transistor and the pixel electrode, and the trench is formed by selectively removing the passivation layer formed under the pixel electrode. In a liquid crystal display device having a plurality of first bus lines, second bus lines, and pixel electrodes, a dummy pattern and a dummy pattern formed with an insulating layer interposed in a predetermined region on an insulating substrate on which the plurality of first bus lines are formed. A second bus line formed to sufficiently surround the second bus line; A metal layer formed on the first bus line with the insulating layer therebetween and having a smaller width than the first bus line; A passivation layer formed on the front surface including the second bus line and the metal layer, the passivation layer having a contact hole and a trench having a predetermined width exposed to the surface of the metal layer; And a pixel electrode formed on the passivation layer including the exposed metal layer at least a distance corresponding to the length of the trench inner surface. The liquid crystal display device of claim 3, wherein the metal layer is used as an upper electrode of a capacitor. The liquid crystal display of claim 3, wherein the passivation layer is one layer or a plurality of layers. A liquid crystal display device having a plurality of first bus lines, second bus lines, and pixel electrodes, wherein the upper electrodes of the plurality of second bus lines and storage capacitors are formed on an insulating substrate on which the plurality of first bus lines are formed. Step to do; Forming a passivation layer on an entire surface including an upper electrode of the second bus line and a storage capacitor; Patterning the passivation layer to form contact holes and trenches; And forming a pixel electrode by forming a pixel electrode material on the entire surface including the contact hole and the trench, and then patterning the pixel electrode to have a distance of at least the width of the trench to form the pixel electrode. The method of claim 6, wherein the passivation layer is formed of one layer or a plurality of layers. The method of claim 6, wherein in the patterning of the pixel electrode, a passivation layer and a pixel electrode material are sequentially formed and then patterned.