KR100236025B1 - Liquid crystal display device and its manufacturing method - Google Patents

Abstract

The present invention relates to a liquid crystal display device and to provide a liquid crystal display device suitable for improving the capacity of a storage capacitor per unit area and a method of manufacturing the same.

According to an exemplary embodiment of the present invention, a liquid crystal display including a plurality of thin film transistors and pixel electrodes includes a substrate, an insulating film having at least one contact hole between the capacitor electrode formed on the substrate and the pixel electrode. And a storage capacitor formed by inserting up to two dielectric layers, and the method of manufacturing the same includes forming a first electrode in a predetermined region on a substrate, and forming a first insulating layer on a surface of the first electrode. Forming a second insulating layer on the substrate including the edge of the first insulating layer, forming a third insulating layer on the entire surface including the exposed first insulating layer, And a second electrode formed wider than the first electrode on the third insulating layer.

Description

LCD and its manufacturing method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same, which are suitable for improving the capacity and opening ratio of a storage capacitor per unit area.

In general, a liquid crystal display device has two glass substrates facing each other and liquid crystal is interposed therebetween, and a bottom plate has a data line and a gate line arranged on a matrix, and a thin film transistor and a pixel electrode disposed at each intersection point. The top plate includes a common electrode and color filter layers of R (red), G (green), and B (blue).

The liquid crystal is injected between the upper plate and the lower plate and inserted into the polarizer to inject white light into a transmissive liquid crystal display.

Here, the lower plate will be described in detail. That is, a plurality of gate lines are formed in one direction with a predetermined interval on a transparent substrate such as glass or quartz, and a plurality of data lines are formed with a predetermined interval in a direction perpendicular to the gate line.

A pixel electrode is formed in each pixel region, and a thin film transistor for applying a signal of the data line to the pixel electrode according to the signal of the gate line is formed for each pixel region using the gate line as the gate electrode and the data line as the source electrode. .

Hereinafter, a conventional liquid crystal display and a manufacturing method thereof will be described with reference to the accompanying drawings.

FIG. 1 is a layout diagram of a conventional liquid crystal display, and FIG. 2 is a structural cross-sectional view taken along line AA ′ of FIG. 1.

First, as shown in FIG. 2, the gate electrode 22 and the capacitor 22a are formed on the insulating substrate 21, and the anodic oxide film 23 is formed on the gate electrode 22 and the capacitor electrode 22a. .

The gate insulating film 24 is formed on the remaining insulating substrate 21 including the anodization film 23.

The ia-Si layer 25 and the n ⁺ -a-Si layer 26 are laminated on the gate insulating film 24.

The source electrode 27 and the drain electrode 27a are formed separately on the n ⁺ -a-Si layer 26 at a predetermined interval.

The exposed n ⁺ -a-si layer 26 is removed using the source / drain electrodes 27 and 27a as masks.

In this case, the source electrode 27 and the drain electrode 27 are formed of the same material as the data bus line material.

As described above, the thin film transistor is formed by including the gate electrode 22, the gate insulating film 24, the source electrode 27, and the drain electrode 27a.

In this case, an end of the drain electrode 27a is formed to extend to the gate insulating film 24.

The pixel electrode 29 is formed on the passivation layer 30 and is in electrical contact with the drain electrode 27a through the contact hole formed in the passivation layer 30.

As described above, a dielectric layer having a three-layer structure of the anodization layer 23, the gate insulating layer 24, and the passivation layer 30 is present between the pixel electrode 29 and the capacitor lower electrode.

The storage capacitor is thus formed by these two electrodes and three dielectric layers.

The manufacturing process of the conventional liquid crystal display device having such a structure is as follows.

3A to 3D are cross-sectional views of a conventional liquid crystal display device.

First, as shown in FIG. 3A, a thin metal such as Ta, Al, Ti, or the like is deposited on an insulating substrate 31 such as glass to have a thickness of 1000 to 5000 mW by sputtering or electron beam deposition.

The thin metal is patterned by a photolithography process to form the gate electrode 32 and the capacitor electrode 32a.

The surface of the gate electrode 32 and the capacitor electrode 32a are anodized to form an anodic oxide film 33.

At this time, the thickness of the anodic oxide film 33 shall be 200-3000 GPa.

Subsequently, a silicon nitride film is deposited by a CVD technique to form a gate insulating film 34 having a thickness of 1000 to 5000 GPa.

As a result, two layers of dielectric layers are formed primarily by the anodization film 33 and the gate insulating film 34.

Subsequently, as illustrated in FIG. 3B, the first semiconductor layer 35 is formed by depositing a-Si on the entire surface and patterning the photonic photolithography process.

After the silicon nitride film is deposited on the entire surface including the first semiconductor layer 35, the silicon nitride film layer 36 is formed in the same process as the first semiconductor layer 35 is formed.

Next, as illustrated in FIG. 3C, n ⁺ -a-Si for the source electrode and the drain electrode is deposited on the entire surface including the silicon nitride layer 36, and then patterned by a photolithography process to form a second semiconductor layer 37. .

Subsequently, a metal such as Ti, Mo, or W is deposited on the entire surface including the second semiconductor layer 37 by sputtering or electron beam deposition, and then the metal is patterned to expose a predetermined portion of the surface of the silicon nitride layer 36. The source electrode 38 and the drain electrode 38a are formed.

When the exposed second semiconductor layer 37 is removed using the source / drain electrodes 38 and 38a as a mask, a predetermined portion of the surface of the silicon nitride layer 36 is exposed.

Until this time, only the anodic oxide film 33 and the gate insulating film 34 are formed on the capacitor electrode 32a.

Next, as shown in FIG. 3D, the passivation layer 39 is formed on the entire surface including the exposed silicon nitride layer 36, and then the passivation layer 39 is exposed to a predetermined portion of the surface of the drain electrode 38a by a photolithography process. Patterning to form contact holes.

At this time, the passivation layer 39 is deposited to have a thickness of 1000 to 6000 mW by the plasma CVD technique.

Subsequently, the common electrode material is deposited on the entire surface including the contact hole by sputtering or electron beam deposition, thereby forming the pixel electrode 40 in electrical contact with the drain electrode 38a through the contact hole.

Through this process, three dielectric layers including the anodization layer 33, the gate insulating layer 34, and the passivation layer 39 are formed between the capacitor electrode 32a and the pixel electrode 40 to form a storage capacitor. .

However, the conventional liquid crystal display device as described above has a problem that the dielectric layer has a three-layer structure, so that the capacity of the storage capacitor per unit area becomes small and at the same time, the aperture ratio decreases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and its object is to improve the capacity of a capacitor per unit area by configuring three dielectric layers up to two layers. Another object is to improve the aperture ratio.

1 is a layout of a conventional liquid crystal display device

FIG. 2 is a cross-sectional view of the liquid crystal display device taken along the line AA ′ of FIG. 1.

3A to 3D are cross-sectional views of a manufacturing process of a conventional liquid crystal display device.

4 is a cross-sectional view of a liquid crystal display according to a first embodiment of the present invention.

5A through 5C are cross-sectional views illustrating a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

6 is a cross-sectional view of a liquid crystal display according to a second embodiment of the present invention.

7A to 7C are cross-sectional views illustrating a manufacturing process of a liquid crystal display according to a second exemplary embodiment of the present invention.

8 is a cross-sectional view of a liquid crystal display according to a third embodiment of the present invention.

9A to 9C are cross-sectional views illustrating a manufacturing process of a liquid crystal display according to a third exemplary embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

51,61,91: insulated substrate 52,72,92: capacitor lower electrode

53,73a, 93a anodization 54,74,94 gate insulating film

55,75,95 passivation layer 56,76,96 pixel electrode

The liquid crystal display device of the present invention for achieving the above object is a liquid crystal display device having a plurality of thin film transistor and a pixel electrode, the liquid crystal display device, at least one contact between the substrate, the capacitor electrode formed on the substrate and the pixel electrode And a storage capacitor formed by inserting a dielectric layer of up to two layers including an insulating film having holes. The manufacturing method includes the steps of: forming a first electrode in a predetermined region on a substrate; Forming a first insulating layer, forming a second insulating layer on the substrate including edges and both sides of the first insulating layer, and forming a third insulating layer on the entire surface including the exposed first insulating layer. And a second electrode formed wider than the first electrode on the third insulating layer on the first electrode.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to the present invention will be described with reference to the accompanying drawings.

4 is a cross-sectional view of a liquid crystal display according to a first embodiment of the present invention, and FIGS. 5A to 5C are cross-sectional views of a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

First, as shown in FIG. 4, the storage capacitor includes two dielectric layers including an anodizing film 53 and a passivation layer 55 between the capacitor lower electrode 52 and the pixel electrode 56 used as the capacitor upper electrode. Has a formed structure.

Accordingly, the manufacturing process of the liquid crystal display device of the present invention is as follows.

As shown in FIG. 5A, a gate electrode (not shown) of a thin film transistor and a lower electrode 52 of a storage capacitor having a predetermined distance from each other are formed on an insulating substrate 51 such as glass.

The surface of the gate electrode of the thin film transistor and the lower electrode 52 of the capacitor is anodized to form an anodization film 53 on the surface thereof.

Subsequently, as shown in FIG. 5B, a silicon nitride film is deposited on the entire surface of the insulating substrate 51 including the anodization film 53 to form a gate insulating film 54.

Thereafter, the gate insulating layer 54 is patterned by a photolithography process so that the gate insulating layer 54 remains on the substrate 51 including the edge of the anodization layer 53.

Subsequently, as shown in FIG. 5C, the passivation layer 55 is formed on the gate insulating layer 54 including the exposed anodization layer 53, and then a pixel electrode material is deposited on the passivation layer 55 and patterned. The pixel electrode 56 is formed.

In this case, the pixel electrode 56 is used as an upper electrode of the storage capacitor.

6 is a structural cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention, and FIGS. 7A to 7C are cross-sectional views of a liquid crystal display according to a second exemplary embodiment of the present invention.

First, in the liquid crystal display according to the second exemplary embodiment of the present invention, as shown in FIG. 6, the gate insulating film 74 and the passivation layer 75 are interposed between the capacitor lower electrode 72 and the pixel electrode 76. It is provided including the dielectric layer which consists of two layers.

The manufacturing process according to this is as follows.

As shown in FIG. 7A, a gate electrode (not shown) of a thin film transistor and a lower electrode 72 of a capacitor are formed on an insulating substrate 71 such as glass with a predetermined distance from each other.

When the anodization film 73 is patterned by a photolithography process on a portion of the surface of the gate electrode of the thin film transistor and the lower electrode 72 of the capacitor where the anodization film is not to be formed, anodization is performed as shown in FIG. 7B. Only the edge portion of the capacitor lower electrode 72 selectively forms the anodization film 73a.

After removing the anodization film 73, a silicon nitride film is deposited on the entire surface including the lower electrode 72 of the exposed capacitor to form a gate insulating film 74. The passivation layer 75 is formed on the gate insulating film 74. To form.

Subsequently, as illustrated in FIG. 7C, the pixel electrode material is deposited on the passivation layer 75 and then patterned to form the pixel electrode 76.

In this case, the pixel electrode 76 is used as an upper electrode of the storage capacitor, and the storage capacitor is realized due to the two-layer dielectric layer formed by the gate insulating layer 74 and the passivation layer 75.

8 is a structural cross-sectional view of the liquid crystal display according to the third embodiment of the present invention, and FIGS. 9A to 9C are cross-sectional views of the process according to the third embodiment.

First, according to the third exemplary embodiment of the present invention, a storage capacitor is implemented using the passivation layer 95 as a dielectric layer between the capacitor lower electrode 92 and the pixel electrode 96.

The manufacturing process of the liquid crystal display according to this is as follows.

As shown in FIG. 9A, the gate electrode (not shown) of the thin film transistor and the lower electrode 92 of the storage capacitor are formed on the insulating substrate 91 at a predetermined interval from each other.

Subsequently, anodization film 93 is patterned on a portion of the surface of the gate electrode of the thin film transistor and the lower electrode 92 of the storage capacitor that will not form the anodization film, and then anodized. As shown in FIG. The anodic oxide film is not formed on the surface of the capacitor lower electrode 92 on which the 93 is formed, and the anodic oxide film 93a is formed only at other portions.

Thereafter, as shown in FIG. 9C, the anodization prevention layer 93 is removed, the gate insulation layer 94 is formed on the substrate including the anodization layer 93a, and then the gate insulation layer 94 is formed using a photolithography process. The surface of the capacitor lower electrode 92 is partially exposed by selectively removing the capacitor.

Subsequently, a passivation layer 95 is formed on the gate insulating layer 94 including the exposed capacitor lower electrode 92, a pixel electrode material is deposited on the passivation layer 95, and then patterned to form a pixel electrode 96. .

In this case, the pixel electrode 96 is used as an upper electrode of the storage capacitor, and the storage capacitor is implemented using the passivation layer 95 formed between the capacitor lower electrode 92 and the pixel electrode 96 as a dielectric layer.

As described above, the liquid crystal display of the present invention and a manufacturing method thereof have the following effects.

In other words, by implementing the dielectric layer of the storage capacitor to a minimum layer, it is effective to secure the maximum capacity of the capacitor occupying the unit area and to improve the aperture ratio.

Claims (22)

A liquid crystal display comprising a thin film transistor having a gate electrode source / drain electrode and a pixel electrode, comprising: a substrate, a capacitor lower electrode formed on the substrate and made of the same material as the gate electrode; And a storage capacitor formed through at least two dielectric layers, including an insulating layer having at least one contact hole between the pixel electrodes. A liquid crystal display device having a plurality of thin film transistors and pixel electrodes, comprising: a substrate; A capacitor lower electrode formed at a predetermined portion on the substrate; A first insulating layer formed to cover both side surfaces and top surfaces of the capacitor lower electrode; A second insulating layer having an upper surface of the first insulating layer formed on a substrate including an edge and both sides; A third insulating layer formed on the exposed first insulating layer including the second insulating layer; And a capacitor upper electrode formed on the third insulating layer above the capacitor lower electrode and patterned wider than the capacitor lower electrode. The liquid crystal display of claim 2, wherein the first insulating layer is an anodized film. The liquid crystal display of claim 2, wherein the second insulating layer is a gate insulating layer and the third insulating layer is a passivation layer. The liquid crystal display of claim 2, wherein the capacitor upper electrode is implemented as a pixel electrode. A liquid crystal display comprising a plurality of thin film transistors and pixel electrodes, comprising: a substrate; A capacitor lower electrode formed in a predetermined region on the substrate; A first insulating layer formed on an edge of the capacitor lower electrode surface and both sides thereof; A second insulating layer formed on the entire surface including the first insulating layer; And an upper electrode of the capacitor formed on the second insulating layer, the third insulating layer being formed on the third insulating layer above the capacitor lower electrode, and wider than the capacitor lower electrode. The liquid crystal display of claim 6, wherein the first insulating layer is an anodized film. 7. The liquid crystal display device according to claim 6, wherein the second insulating layer is a gate insulating film and the third insulating layer is a passivation layer. The liquid crystal display of claim 6, wherein the capacitor upper electrode is implemented as a pixel electrode. A liquid crystal display comprising a plurality of thin film transistors and pixel electrodes, comprising: a substrate; A capacitor lower electrode formed in a predetermined region on the substrate; A first insulating layer formed on an edge of the capacitor lower electrode surface and both sides thereof; A second insulating layer formed on the substrate including the first insulating layer; A third insulating layer formed on the second insulating layer including the capacitor lower electrode; And an upper electrode of the capacitor patterned wider than the capacitor lower electrode on the third insulating layer above the capacitor lower electrode. The liquid crystal display of claim 10, wherein the first insulating layer is an anodized film. The liquid crystal display device according to claim 10, wherein the second insulating layer is a gate insulating film and the third insulating layer is a passivation layer. The liquid crystal display of claim 10, wherein the capacitor upper electrode is implemented as a pixel electrode. Forming a first electrode in a predetermined region on the substrate; Forming a first insulating layer to cover both side surfaces and top surfaces of the first electrode; Forming a second insulating layer on the substrate including both edges and both sides of the first insulating layer; Forming a third insulating layer on the entire surface including the exposed first insulating layer; And forming a second electrode on the third insulating layer above the first electrode, the second electrode being wider than the first electrode. 15. The method of claim 14, wherein the first insulating layer is an anodized film, the second insulating layer is a gate insulating film, and the third insulating layer is a passivation layer. 15. The method of claim 14, wherein the second electrode is a pixel electrode and is used as a capacitor upper electrode. Forming a first electrode in a predetermined region on the substrate; Forming a first insulating layer on the surface of the first electrode and patterning the first insulating layer to remain only on a substrate including an edge and both sides of the first electrode; Sequentially forming a second insulating layer and a third insulating layer on the entire surface including the exposed first electrode; And forming a second electrode wider than the first electrode on the third insulating layer on the upper side of the first electrode. 18. The method of claim 17, wherein the first insulating layer is an anodized film, the second insulating layer is a gate insulating film, and the third insulating layer is a passivation layer. 18. The method of claim 17, wherein the second electrode is a pixel electrode and is used as a capacitor upper electrode. Forming a first electrode in a predetermined region on the (correction) substrate; Forming a first insulating layer on the surface of the first electrode and patterning the first insulating layer so that only the edge and both sides of the first electrode remain; Forming a second insulating layer on the substrate including the first insulating layer; Forming a third insulating layer on the entire surface including the exposed first electrode; And forming a second electrode wider than the first electrode on the third insulating layer on the upper side of the first electrode. 21. The method of claim 20, wherein the first insulating layer is an anodized film, the second insulating layer is a gate insulating film, and the third insulating layer is a passivation layer. 21. The method of claim 20, wherein the second electrode is a pixel electrode and is used as a capacitor upper electrode.