KR100208471B1 - Molding method of bga package with a heat sink - Google Patents
Molding method of bga package with a heat sink Download PDFInfo
- Publication number
- KR100208471B1 KR100208471B1 KR1019960022903A KR19960022903A KR100208471B1 KR 100208471 B1 KR100208471 B1 KR 100208471B1 KR 1019960022903 A KR1019960022903 A KR 1019960022903A KR 19960022903 A KR19960022903 A KR 19960022903A KR 100208471 B1 KR100208471 B1 KR 100208471B1
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- South Korea
- Prior art keywords
- cavity
- pcb substrate
- molding
- clamping area
- heat sink
- Prior art date
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- 238000000465 moulding Methods 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims description 31
- 229910000679 solder Inorganic materials 0.000 claims description 15
- 239000008393 encapsulating agent Substances 0.000 claims description 13
- 239000004642 Polyimide Substances 0.000 claims description 7
- 229920001721 polyimide Polymers 0.000 claims description 7
- 238000007599 discharging Methods 0.000 claims 1
- SXHLTVKPNQVZGL-UHFFFAOYSA-N 1,2-dichloro-3-(3-chlorophenyl)benzene Chemical compound ClC1=CC=CC(C=2C(=C(Cl)C=CC=2)Cl)=C1 SXHLTVKPNQVZGL-UHFFFAOYSA-N 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 6
- 239000007788 liquid Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000002459 sustained effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
본 발명은 방열판이 부착된 BGA패키지의 몰딩방법에 관한 것으로, 방열판(Heat Sink)을 포함하는 BGA패키지에 몰딩할 때 게이트와 다수의 에어벤트가 형성된 몰딩금형을 사용하여 일반적인 봉지제로 몰딩함으로서 패키지의 가격을 절감시키고, 몰딩작업을 용이하게 하여 생산성을 향상시킬 수 있도록 된 것이다.The present invention relates to a method of molding a BGA package having a heat sink, and in which a molding die having a gate and a plurality of air vents formed therein is used for molding in a BGA package including a heat sink, The cost can be reduced, the molding work can be facilitated, and the productivity can be improved.
Description
본 발명은 방열판이 부착된 BGA패키지의 몰딩방법에 관한 것으로, 더욱 상세하게는 방열판(Heat Sink)을 포함하는 BGA패키지에 몰딩할때 몰딩금형을 사용하여 일반적인 봉지제로 몰딩함으로서 가격을 절감시키고, 몰딩작업을 용이하게 하여 생산성을 향상시킬 수 있도록 된 것이다.The present invention relates to a method of molding a BGA package having a heat sink, and more particularly, to a method of molding a BGA package having a heat sink, and more particularly, to a method of molding a BGA package including a heat sink, Thereby facilitating the work and improving the productivity.
일반적으로 방열판이 부착된 BGA패키지의 구조는 제1도에 도시된 바와 같이 중앙부가 관통된 PCB기판(20')의 저면에 방열판(21')이 부착되고, 상기 PCB기판(20')의 관통구를 통하여 방열판(21')의 상면에 반도체칩(30')이 접착제(31')에 의해 부착되며, 상기 반도체칩(30')의 입/출력패드와 PCB기판(20')과는 와이어(27')로 본딩되고, 상기 PCB기판(20')의 상면으로는 다수의 솔더볼(26')이 융착되며, 상기의 반도체칩(30')등을 외부환경으로부터 보호하기 위하여 액상봉지제(28a)로 몰딩된 구조를 하고 있다.Generally, as shown in FIG. 1, a BGA package having a heat sink is mounted with a heat sink 21 'attached to a bottom surface of a PCB 20' The input / output pads of the semiconductor chip 30 'and the PCB substrate 20' are connected to the upper surface of the heat sink 21 ' A plurality of solder balls 26 'are fused to the upper surface of the PCB substrate 20' and a liquid encapsulant (not shown) is formed to protect the semiconductor chip 30 ' 28a, respectively.
상기 PCB기판(20')은 상면에 회로패턴(22')이 형성되고, 그 위에 솔더마스크(23')가 도포되어 회로패턴(22')을 보호하며 반도체칩(30')의 입/출력패드가 와이어(27')에 의해 PCB기판(20')의 회로패턴(22')에 본딩되는 것이다.A circuit pattern 22 'is formed on the upper surface of the PCB substrate 20' and a solder mask 23 'is applied thereon to protect the circuit pattern 22' The pad is bonded to the circuit pattern 22 'of the PCB substrate 20' by the wire 27 '.
또한, 상기 PCB기판(20')은 관통구의 외측 상면으로 다수의 솔더볼(26')이 리플로우 되어 융착될 수 있도록 솔더볼랜드(24' : Solder Ball Land)가 형성되어 있고, 저면으로는 반도체칩(30')의 회로동작시 발생되는 열을 효율적으로 방출시키기 위하여 방열판(21')이 부착되는 것이다.The PCB substrate 20 'has a solder ball land 24' so that a plurality of solder balls 26 'can be reflowed and fused to the outer upper surface of the through-hole, The heat sink 21 'is attached in order to efficiently discharge the heat generated during the circuit operation of the heat sink 30'.
이와같이 PCB기판(20')의 저면에 방열판이 부착되는 BGA패키지에 몰딩금형을 사용하여 몰딩할 경우에는 PCB기판(20') 상에 런너, 게이트 및 에어벤트를 형성하여야 함으로 상당수의 솔더볼랜드(24')를 제거해야 되는 문제점이 있었고, 또한 PCB기판(20') 상면에 몰딩금형을 안착하게 되면 그 압력으로 PCB기판(20')이 파손되기 때문에 PCB기판(20') 상면에 몰딩금형을 안착해서 몰딩 하기에는 많은 어려움이 있었던 것이다.When a molding die is used to mold a BGA package having a heat sink on the bottom of the PCB substrate 20 ', a runner, a gate and an air vent must be formed on the PCB substrate 20', so that a considerable number of solder ball lands 24 In addition, when the molding die is mounted on the upper surface of the PCB substrate 20 ', the PCB substrate 20' is damaged due to the pressure, so that the molding die is seated on the upper surface of the PCB substrate 20 ' There was a lot of difficulty in molding.
따라서, 저면에 방열판(21')이 부착된 BGA패키지에 몰딩하기 위해서는 PCB기판(20')의 중앙부에 형성된 관통구의 주위로 댐(28b)을 형성한 후, 상부에서 액상봉지(28a)를 도포하여 경화시키는 방법에 의해 몰딩을 하였던 것이다.Accordingly, in order to mold the BGA package having the heat sink 21 'on the bottom surface, a dam 28b is formed around the through hole formed in the central portion of the PCB substrate 20', and then the liquid bag 28a is coated And then hardened.
그러나, 이와같이 액상봉지제(28a)를 사용하여 몰딩하는 방법은 액상봉지제(28a)가 흘러 넘치지 않도록 PCB기판(20') 상면에 댐(28b)을 형성하여야 함으로 공정이 복잡하고, 액상봉지제(28a)가 경화되는 시간이 길어 장시간 작업을 요함으로 생산성이 떨어지고, 몰딩된 부위가 외관상 지저분하게 되는 등의 문제점이 있었던 것이다. 뿐만 아니라, 상기 액상봉지제의 가격은 일반봉지제의 가격보다 대략 30배 정도 비싼 고가임으로 BGA패키지의 가격을 상승시키는 주요인으로 작용하였던 것이다.However, the method of molding using the liquid encapsulant 28a in this way requires a complicated process because the dam 28b must be formed on the upper surface of the PCB substrate 20 'so that the liquid encapsulant 28a does not overflow, The time required for curing the resin layer 28a is long, which requires a long working time, resulting in poor productivity, and the molded part becomes dirty in appearance. In addition, the price of the liquid encapsulant was about 30 times higher than the price of a general encapsulant, which was a major factor in raising the price of the BGA package.
본 발명은 이러한 문제점을 해결하기 위해 발명된 것으로, 몰딩금형을 사용하여 일반적인 봉지제로 몰딩함으로서 가격을 절감시키고, 몰딩작업을 용이하게 하여 생산성을 향상시킬 수 있도록 된 방열판이 부착된 BGA패키지의 몰딩방법을 제공함에 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide a molding method of a BGA package having a heat sink for improving productivity by facilitating a molding operation by reducing molding costs by molding with a general encapsulating material using a molding die The present invention has been made in view of the above problems.
제1도는 종래의 방열판이 부착된 BGA패키지의 구조를 보인 단면도.FIG. 1 is a sectional view showing the structure of a conventional BGA package with a heat sink.
제2도는 본 발명에 의한 BGA패키지의 구조를 나타낸 단면도.FIG. 2 is a cross-sectional view showing a structure of a BGA package according to the present invention; FIG.
제3도는 제2도의 A부 확대도.3 is an enlarged view of part A of FIG. 2;
제4a도는 본 발명에 사용되는 몰딩금형의 평면도.Figure 4a is a plan view of the molding die used in the present invention.
제4b도는 제4a도의 B-B선 단면도.4b is a cross-sectional view taken along line B-B of Fig. 4a.
제4c도는 본 발명에 사용되는 몰딩금형의 저면도.Figure 4c is a bottom view of the molding die used in the present invention.
제5도는 본 발명에 의한 PCB기판의 평면도.5 is a plan view of a PCB substrate according to the present invention.
제6도는 본 발명의 몰딩방법을 나타낸 단면도.6 is a sectional view showing the molding method of the present invention.
* 도면의 주요부분에 대한 부호의 설명DESCRIPTION OF THE REFERENCE NUMERALS
10 : 몰딩금형 11 : 캐비티10: Molding mold 11: Cavity
12 : 홈 13 : 게이트12: Home 13: Gate
14 : 에어벤트 20 : PCB기판14: Air vent 20: PCB substrate
21 : 방열판 22 : 회로패턴21: heat sink 22: circuit pattern
23 : 솔더마스크 24 : 솔더볼랜드23: Solder mask 24: Solder ball land
25 : 폴리이미드 테이프 26 : 솔더볼25: polyimide tape 26: solder ball
27 : 와이어 28 : 일반봉지제27: wire 28: general encapsulant
30 : 반도체칩 40 : 로딩다이30: semiconductor chip 40: loading die
상기의 목적을 달성하기 위한 본 발명은 게이트와 다수의 에어벤트가 형성된 몰딩금형을 PCB기판의 상면에서 클램핑시켜 일반봉지제로 몰딩하는 것으로, 이를 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다.In order to accomplish the above object, the present invention provides a molding die having a gate and a plurality of air vents formed thereon by clamping the upper surface of the PCB substrate with a general encapsulation material, which will be described in detail with reference to the accompanying drawings.
제2도는 본 발명에 의한 방열판이 부착된 BGA패키지의 구조를 나타낸 단면도로서, 중앙부가 관통된 PCB기판(20)의 저면에 방열판(21)이 부착되고, 상기 PCB기판(20)의 관통구를 통하여 방열판(21)의 상면에 반도체칩(30)이 접착제(31)에 의해 부착되며, 상기 반도체칩(30)의 입/출력패드와 PCB기판(20)과는 와이어(27)로 본딩되고, PCB기판(20)의 상면으로는 다수의 솔더볼(26)이 융착되며, 상기의 반도체칩(30)을 외부환경으로부터 보호하기 위하여 일반봉지제(28)로 몰딩된다.FIG. 2 is a cross-sectional view showing the structure of a BGA package with a heat sink according to the present invention. The heat sink 21 is attached to the bottom of a PCB 20, The semiconductor chip 30 is attached to the upper surface of the heat sink 21 by the adhesive 31. The input / output pads of the semiconductor chip 30 and the PCB substrate 20 are bonded to the wires 27, A plurality of solder balls 26 are fused to the upper surface of the PCB substrate 20 and molded into a general encapsulant 28 to protect the semiconductor chip 30 from the external environment.
이와같이 방열판(21)이 부착된 BGA패키지에 일반봉지제를 사용하여 몰딩하기 위해서는 제4a도 내지 제4c도에 도시된 바와 같은 몰딩금형(10)을 사용하여 몰딩하는 것으로, 이러한 몰딩금형(10)은 일반봉지제(28)가 몰딩되는 영역인 캐비티(11)가 형성되고, 상기 캐비티(11)의 외측부로는 PCB기판(20)에 형성된 솔더볼랜드(24)를 보호할 수 있는 홈(12)이 형성되며, 상기 캐비티(11)와 홈(12) 사이에는 PCB기판(20)의 상면에 접촉되는 캐비티 클램핑 에리어(15)가 형성되고, 상기 홈(12)의 외측으로는 사이드 클램핑 에리어(16)가 형성되며, 상기 캐비티(11)의 상면 일측에는 일방봉지제(28)가 유입되는 게이트(13)가 형성되고, 이 게이트(13)의 반대측에는 몰딩시 캐비티(11) 안의 공기를 밖으로 배출시키기 위한 에어벤트(14)가 다수개 형성된다.In order to mold the BGA package to which the heat sink 21 is attached by using a general encapsulant, molding is performed using the molding die 10 as shown in FIGS. 4A to 4C. In this molding die 10, A groove 12 for protecting the solder ball land 24 formed on the PCB 20 is formed at the outer side of the cavity 11. The cavity 11 is formed in the cavity 11, A cavity clamping area 15 is formed between the cavity 11 and the groove 12 so as to contact the upper surface of the PCB substrate 20 and a side clamping area 16 A gate 13 is formed at one side of the upper surface of the cavity 11 so as to introduce the one-side encapsulant 28. At the opposite side of the gate 13, air in the cavity 11 is discharged A plurality of air vents 14 are formed.
상기 에어벤트(14)는 캐비티(11)의 저면이 PCB기판(20)의 상면에 접촉되는 캐비티 클램핑 에리어(15)에 형성됨과 동시에, PCB기판(20)의 사이즈를 일정하게 잡아 주기 위해 스트립에 접촉되는 양측의 사이드 클램핑 에리어(16)의 전후측에 각각 다수개 형성된다.The air vent 14 is formed in the cavity clamping area 15 where the bottom surface of the cavity 11 is in contact with the upper surface of the PCB substrate 20 and at the same time, On the front side and the rear side of the side clamping area 16 on both sides to be contacted.
상기 캐비티 클램핑 에리어(15)에 형성된 에어벤트(14)는 몰딩시 캐비티(11)안에 있는 공기가 빠져나갈 수 있는 것이고, 사이드 클램핑 에리어(16)에 형성된 에어벤트(14)는 PCB기판(20) 위의 공기를 빼내기 위해 형성된 것이다.The air vent 14 formed in the cavity clamping area 15 can escape the air in the cavity 11 during molding and the air vent 14 formed in the side clamping area 16 can be removed from the PCB substrate 20, It is formed to extract the air above.
또한, 상기 몰딩금형(10)에 형성된 캐비티(11)의 저면 즉, 캐비티 클램핑 에리어(15)의 폭을 최대한 줄여줌으로서 몰딩시 발생되는 플래쉬를 방지할 수 있다.In addition, by minimizing the width of the bottom surface of the cavity 11 formed in the molding die 10, that is, the width of the cavity clamping area 15, it is possible to prevent the flash generated during molding.
상기와 같은 몰딩금형(10)을 사용하여 몰딩하기 위해서는 몰딩금형(10)의 캐비티 클램핑 에리어(15)가 접촉되는 PCB기판(20)의 상면에 솔더마스크(23)를 제거하고 그 위에 폴리이미드 테이프(25)를 부착한다. 상기 폴리이미드 테이프(25)는 몰딩시 PCB기판(20)에 가해지는 압력을 지탱하여 PCB기판(20)의 회로패턴(22)을 보호하는 것으로, 폴리이미드 테이프(25)의 높이는 솔더마스크(23)의 높이보다 낮게 형성되는 것이다.In order to mold by using the molding die 10 as described above, the solder mask 23 is removed from the upper surface of the PCB substrate 20 where the cavity clamping area 15 of the molding die 10 is in contact with the polyimide tape 10, (25). The polyimide tape 25 protects the circuit pattern 22 of the PCB 20 by supporting the pressure applied to the PCB 20 when molding the polyimide tape 25, As shown in FIG.
제6도는 본 발명의 몰딩방법을 설명하기 위한 도면으로서, 저면에 방열판(21)이 부착되고, 상부로 반도체칩(30)이 부착되어 와이어 본딩된 PCB기판(20)의 하부에 로딩다이(40)가 위치되고, PCB기판(20)의 상부로는 몰딩금형(10)이 안착된 상태에서 일반봉지제(28)를 게이트(13)를 통해 유입하여 몰딩하면 된다. 이때, 상기 일반봉지제(28)의 유입에 의하여 캐비티(11) 안에 있는 공기는 다수의 에어벤트(14)를 통하여 외부로 빠져나와 보이드를 방지하는 것이며, 상기 PCB기판(20)의 저면에 위치되는 로딩다이(40)의 상부로는 PCB기판(20) 로딩용 핀(41)이 형성되어 PCB기판(20)에 형성된 로딩용 홀(29)에 끼워진다.6 is a view for explaining the molding method of the present invention. A heat sink 21 is attached to the bottom surface of the PCB 20 and a loading die 40 And the common encapsulant 28 is introduced into the upper portion of the PCB 20 through the gate 13 in a state where the molding die 10 is seated. At this time, the air in the cavity 11 flows out through the plurality of air vents 14 due to the inflow of the common encapsulant 28 to prevent voids, A pin 41 for loading a PCB substrate 20 is formed on an upper portion of the loading die 40 to be inserted into a loading hole 29 formed in the PCB substrate 20.
이와같이 PCB기판(20)의 상면에 안착되는 몰딩금형(10)의 캐비티(11) 저면, 즉 캐비티 클램핑 에리어(15)가 접착되는 PCB기판(20)의 상면에는 솔더마스크(23)가 제거되고, 폴리이미드 테이프(25)가 부착되어 있음으로서 몰딩금형(10)의 클램핑 압을 양호하게 견딜 수 있어 회로패턴을 보호한다.The solder mask 23 is removed from the upper surface of the PCB substrate 20 to which the cavity clamping area 15 is adhered, that is, the bottom surface of the cavity 11 of the molding metal mold 10, Since the polyimide tape 25 is attached, the clamping pressure of the molding die 10 can be satisfactorily sustained, thereby protecting the circuit pattern.
이상의 설명에서와 같은 본 발명의 방열판이 부착된 BGA패키지의 몰딩방법에 의하면, 몰딩금형을 사용하여 일반봉지제로 몰딩함으로서 패키지의 단가를 절감시키고, 작업 공정수를 줄여 생산성을 향상시키며, 제품의 신뢰성을 향상 시킨다.According to the molding method of the BGA package with the heat sink of the present invention as described above, the molding cost is reduced by using the molding die to mold the package with a general encapsulating material, the number of working steps is reduced to improve the productivity, .
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960022903A KR100208471B1 (en) | 1996-06-21 | 1996-06-21 | Molding method of bga package with a heat sink |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960022903A KR100208471B1 (en) | 1996-06-21 | 1996-06-21 | Molding method of bga package with a heat sink |
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| Publication Number | Publication Date |
|---|---|
| KR980007939A KR980007939A (en) | 1998-03-30 |
| KR100208471B1 true KR100208471B1 (en) | 1999-07-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019960022903A KR100208471B1 (en) | 1996-06-21 | 1996-06-21 | Molding method of bga package with a heat sink |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20030073701A (en) * | 2002-03-12 | 2003-09-19 | 김선문 | Control method of breast massage device and device therefor |
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| KR100583496B1 (en) * | 2000-08-14 | 2006-05-24 | 앰코 테크놀로지 코리아 주식회사 | Circuit board for semiconductor package |
| KR100401147B1 (en) * | 2001-01-03 | 2003-10-10 | 앰코 테크놀로지 코리아 주식회사 | Substrate for manufacturing semiconductor package and method for manufacturing semiconductor package using the same |
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1996
- 1996-06-21 KR KR1019960022903A patent/KR100208471B1/en not_active IP Right Cessation
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20030073701A (en) * | 2002-03-12 | 2003-09-19 | 김선문 | Control method of breast massage device and device therefor |
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| KR980007939A (en) | 1998-03-30 |
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