KR100208262B1 - Apparatus for loop-back test in switch - Google Patents

Abstract

The present invention relates to an apparatus in the device (1) for selectively receiving information applied from the switch (2) for each channel through the sub-highway (SHW0, SHW2) for the loop back test, in the sub-highway (SHW1, SHW2) Channel channel designation data (d0 to d6) for channel designation, enable data (d7) for informing the operation of the loop back test, and data (d6) for designating the sub highway are selectively selected according to the loop back channel signal (Loop-ch). A latch unit (1) having a latch (11) for latching and outputting the inverter and inverters (I1 to I6) for inverting and outputting the data (d0 to d5) of the latch unit; A coefficient controller (3) for delaying outputting the frame synchronizing signal (fs) in synchronization with a predetermined clock signal (4Mhz); The channel designation signal Loop- which loads the data d0 to d5 according to the output of the coefficient control unit 2, and counts a predetermined clock 500 Khz corresponding to the data d0 to d5 to designate a corresponding channel. a counting unit 2 for outputting ch2); Input the data d7 as a loop back enable signal Loop-en and the data d6 as a sub highway designation signal Loop-shw, and specify the channel designation signal Loop-ch and sub highway. The signal Loop-shw and the inverted loop back enable signal Loop-en are ORed to output a signal Loop-0 controlling the channel input from the sub highway SHW0, and the sub highway designation is performed. A signal for controlling the channel input from the sub highway SHW1 by ORing the signal Loop-shw and the inverted loop back enable signal Loop-en and the inverted channel designation signal Loop-ch. And a sub highway designation section 4 for outputting Loop-1).

Accordingly, the present invention has an effect that the device can select and receive a sub highway for the loop back test and a channel of the sub highway among data applied from the switch.

Description

In-device Input Control Unit of Electronic Switching System for Loop Back Test

1 is a diagram illustrating a connection state between a device and a switch for a back test in the related art.

2 is a diagram illustrating a connection state between a device and a switch for a loop back test according to the present invention.

3 is a block diagram of an in-device input control apparatus of an all-electronic exchange for a loop back test according to the present invention.

4 is a main partial waveform diagram of FIG.

5 is a circuit diagram of a receiver configured in an input control device in a device of an all-electronic exchange for a loop back test according to the present invention.

* Explanation of symbols for main parts of the drawings

100: device 200: slot switch

1 latch portion 2 counter portion

3: coefficient control part 4: sub highway designating part

The present invention relates to an electronic switch, and more particularly, a loop back that allows a device to select and input per channel in a sub highway during a loop back test between a switch and a telephony device. An input control device in a device of an electrical exchanger for testing.

In the electronic switchboard, it is necessary to check whether there is an abnormality in the transmission path between the telephony devices and the switches, and a loopback test method is performed according to this need.

The conventional loop back test method of devices and switches applies predetermined information from the device 100 to the switch 200 through the sub highways as shown in FIG. 1, and the switch 200 transmits this information. The method of applying to the device 100 again was adopted. That is, the conventional method has been to determine whether or not an abnormality in the call path by judging whether the information applied to the switch 200 through the device 100 is correctly applied to the device 100 and the separate confirmation information.

However, this conventional method may cause a case in which the information initially output by the device 100 is incorrect or a case in which the information to be confirmed is wrong, and in this case, there is a problem that the call path is determined to be abnormal.

This problem is added between the device 100 and the switch 200 by adding a method of applying information from the switch 200 to the device 100 and applying the information applied to the device 100 to the switch 200 again. You will be able to accurately diagnose the channel.

However, in this case, the switch 200 may enhance the efficiency by transmitting information using a channel not used in the sub highway connected to the device 100, and thus the device 100 may receive only the corresponding channel. A separate device is required.

SUMMARY OF THE INVENTION The present invention has been made in view of this point, and an object of the present invention is to provide an input control device in a device of an electronic switchboard for a loop back test that can input data applied through a sub highway from a switch to each sub highway channel. To provide.

The device-to-switch self-diagnosis apparatus according to the present invention comprises: an in-device apparatus for selectively receiving information applied from a switch on a channel-by-channel basis through a first and a second sub highway for a loop back test; A latch for selectively latching and outputting the channel designation data for channel designation in the first and second sub highways, enable data informing the driving of the loop back test, and data designating the sub highways (loop back channel signal); A latch portion having an inverter for inverting and outputting channel designation data of the latch; A coefficient controller for delaying outputting the frame synchronization signal in synchronization with a predetermined clock signal; A counting unit for loading channel designation data according to an output of the coefficient control unit, counting a predetermined clock corresponding to the channel designation data, and outputting a channel designation signal for designating a corresponding channel; Input the enable data as the loop back enable signal and the sub highway designation data as the sub highway designation signal, and the channel designation signal, the sub highway designation signal, and the inverted loop back enable signal are ORed from the first sub highway; A sub highway that outputs a signal for controlling a channel input, and outputs a signal for controlling a channel input from a second sub highway by ORing the sub highway designation signal, the inverted loop back enable signal and the inverted channel designation signal; It comprises a designation part.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a block diagram of a device and a switch self-diagnosis apparatus of an electronic switch according to the present invention, in which the device 100 and the switch 200 are connected to each other as in FIG. However, in the present invention, the switch 200 applies predetermined information to the device 100 through a predetermined channel in the sub-highway, and the device 100 receives the information of this channel and applies it to the switch 200 again. Have

3 is a block diagram for receiving information of a predetermined channel applied by the device 100 from the switch 200. As shown in the drawing, the latch unit 1, the counter 2, the counter 3, and the sub highway designating unit 4 are configured.

Here, the latch unit 1 includes a latch 11, and the latch 11 is configured to latch out a signal input to the terminals D1 to D8 in synchronization with a signal applied to the clock terminal CLK. It is.

Predetermined information is applied to the terminals D1 to D8 of the latch 11, where the information d7 is an enable signal for informing the driving of the loop back test, and the information d6 is a signal for designating a sub highway. That is, since the information d6 designating the sub highway is composed of 1 bit, it can be seen that the sub highway is composed of two (SHW0, SHW1).

The other information d5 to d0 is for designating a channel in the sub highway, and it can be seen that there are two to ^six channels in this embodiment. These data d0 to d7 are applied to the device 100 from a processor (not shown).

On the other hand, the loop channel signal Loop-ch is applied to the terminal CLK of the latch 11, which is used to load and output the data d0 to d7 to the counter 11 as described above. .

The outputs of the counter 11 are output to the terminals Q1 to Q8, and the data d0 to d7 output to the terminals Q1 to Q6 are counters 21 of the counter 2 through the inverters I1 to I6. Are applied to terminals A, B, C, and D, respectively.

On the other hand, the counter 11 counts the clock 500Khz of the terminal CLK (which uses the same channel-specific period of the sub highway) when the low signal is applied to the three terminals LDN. LDN) is connected to the D flip-flop (DFF). The D flip-flop DFF causes the counters 11 and 12 to output the frame synchronization signal fs (the sub highway synchronization signal) inverted by the inverter I10 in synchronization with a clock of 4 MHz. The data d0 to d6 are loaded in synchronization with fs. On the other hand, the data d5 to d0 are inverted by the inverters I0 to I5, and the counters 21 and 22 count the clock CLK from the input data so that the predetermined values 2 ⁴ and 2 ² count. When the high level logic is output to the terminal RCO, the output of the terminal RCO is inverted by the inverter I11. Accordingly, the inverter I11 outputs a logic low level output at a time corresponding to the channel of the sub highway designated by the data d0 to d5. In the present embodiment, the output of the inverter I11 is designated as the designated signal Loop-ch2.

The sub highway designation unit 4 generates a signal that is enabled only for a time corresponding to the corresponding sub highways SHW1 and SHW2 using the channel designation signals Loop-ch2 and the data d6 and d7. You can.

Here, the data d6 is a signal Loop-shw which designates a sub highway which substantially loops back, and the data d7 is an enable signal Loop-en which causes loop back. The sub highway designation section 4 inverts the loop back enable signal Loop-en to the inverter I13, and returns the output and signals Loop-shw and Loop-ch2 of the inverter I13. Since the gate OR1 performs the OR (Loop-0), the OR gate OR1 has the sub highway SHW0 and the loop back is enabled, and the low gate state is only low for the time corresponding to the designated channel. Further, the sub highway designation section 4 inverts the signal Loop-shw to the inverter I14, and logically sums the outputs of the inverters I13 and I14 and the signal Loop-ch2 at the oragate OR2. (Loop-1) By ORing at OR2, (Loop-1) OR2 has a sub-highway (SHW1), loop back enabled and low level only for the time corresponding to the specified channel. Becomes

4 shows a timing diagram when the channel 00000 is designated by the data d0 to d6 and the sub highway SHW0 is designated.

On the other hand, the receiving unit for receiving data by the oragate (OR1, OR2) can be configured as shown in FIG. That is, since two sub highways SHW1 and SHW2 are configured, two tri-state buffers B1 and B2 are connected to each of the sub highways SHW0 and SHW2, and the buffers B1 and B2 are connected to the signal Loop-0. In order to be driven by the Loop-1, the device 1 can receive only the information of the corresponding channel of the sub highway designated by the processor.

Accordingly, the present invention has an effect that the device can select and receive a sub highway for the loop back test and a channel of the sub highway among the data applied from the switch.

Claims (3)

An apparatus in the device (1) for selectively receiving information applied from the switch (2) for each channel through the sub highways SHW0 and SHW2 for loop back test; Channel channel designation data (d0 to d6) for channel designation in the sub highways (SHW1 and SHW2), enable data (d7) for notifying the operation of the loop back test, and data (d6) for designating the sub highway are loop back channel signals. A latch unit (1) having a latch (11) for selectively latching and outputting the loop-ch and inverters (I1 to I6) for inverting and outputting the data (d0 to d5) of the latch unit; A coefficient controller (3) which delays and outputs the frame simultaneous signal (fs) in synchronization with a predetermined clock signal (4Mhz); The channel designation signal Loop- which loads the data d0 to d5 according to the output of the coefficient control unit 2, and counts a predetermined clock 500 Khz corresponding to the data d0 to d5 to designate a corresponding channel. a counting unit 2 for outputting ch2); Input the data d7 as a loop back enable signal Loop-en and the data d6 as a sub highway designation signal Loop-shw, and specify the channel designation signal Loop-ch and sub highway. The signal Loop-shw and the inverted loop back enable signal Loop-en are ORed to output a signal Loop-0 controlling the channel input from the sub highway SHW0, and the sub highway designation is performed. A signal for controlling the channel input from the sub highway SHW1 by ORing the signal Loop-shw and the inverted loop back enable signal Loop-en and the inverted channel designation signal Loop-ch. An in-device input control device of an electronic switchboard for loop back testing, comprising a sub-highway designation section (4) for outputting Loop-1). 3. The tri-state buffer of claim 1, configured in the device 1 and connected to the sub highway SHW0 to selectively receive channel data of the sub highway SHW0 according to the signal Loop-0. In-device input control apparatus of an electronic switch for loop back testing with B1). The device of claim 1 or 2, configured in the device 1, connected to the sub highway SHW1 to selectively receive channel data of the sub highway SHW1 according to the signal Loop-0. In-device input control apparatus of an electronic switch for loop back testing with a tri-state buffer (B2).