KR100207520B1 - A making method of soi substrate - Google Patents

Abstract

A method of manufacturing an SOI substrate is disclosed. This method includes forming a trench in the substrate to form a protrusion of the substrate, forming a polysilicon layer of a thin film on the front surface of the substrate, forming an anti-oxidation insulating layer filling the inside of the trench in which the polysilicon layer is formed on the front surface of the substrate, and preventing oxidation. Forming an anti-oxidation insulating film pattern having a predetermined thickness only under the trench by performing an isotropic etching process on the entire surface of the insulating film, oxidizing the anti-oxidation insulating film pattern to form a strained silicon oxide film and an anti-oxidation polysilicon layer pattern, And separating the protruding upper portion of the substrate supported by the substrate body and the silicon oxide film, and filling a space separating the protruding upper portion of the substrate from the substrate body and flattening the top surface. As a result, while easily manufacturing the SOI substrate, defects generated in the substrate during the manufacturing process can be suppressed, so that the electrical reliability of the SOI substrate can be improved, and thus the yield of the overall semiconductor manufacturing process can be improved.

Description

Manufacturing Method of SOI Substrate

The present invention relates to a method of manufacturing an SOI substrate, and more particularly, to a process of combining various processes used in a conventional semiconductor manufacturing process, and more easily, and to a method of manufacturing a high quality SOI substrate having improved reliability. .

A typical device isolation technique realized on a conventional substrate forms the junction of different regions of mutual conductivity, such as a PN junction, so that the conductivity is good in one direction while the conductivity of the latter is almost insignificant. Junction isolation techniques have been used to realize device isolation between regions.

However, the PN junction separation method has a problem in that it is difficult to maintain separation characteristics, which will be described with reference to FIG. 1. 1 is a cross-sectional view illustrating a conventional device isolation technique using a PN junction.

In the PN junction separation method, first, an element isolation layer 14 for defining an element active region is formed on a substrate 10, for example, a silicon substrate, and then a predetermined depth is formed in an element active region defined by the element isolation layer 14. The first dopant well 12 is formed by doping the first impurity. Subsequently, the region 16 doped with the second impurity is formed to include the second impurity having a conductivity type opposite to that of the first impurity in the formed well 12. In this case, an interface between the second impurity doped region 16 and the well 12 forms a PN junction. Therefore, when using the inherent rectifying characteristics of the PN junction in the semiconductor material, it is desirable to use the ideal case where there is no conduction characteristic of the current due to the reverse bias characteristic between the second impurity doped region 16 and the well 16. This is the key to PN junction separation.

However, the silicon oxide film and the substrate, which is an element isolation film 14 formed on the side of the PN junction region by inducing negative charges on the silicon substrate due to defects or defects occurring during trench etching using plasma, and positive charges naturally contained in the silicon oxide film. A significant amount of leakage current 18 is generated at the boundary between the active regions of. As a result, the occurrence of the leakage current 18 causes the separation characteristic of device isolation due to the PN junction to be weakened, and a breakdown occurs between the second impurity doping 16 and the well 12 region. In this case, there is a problem that the semiconductor element is destroyed internally.

In order to solve the problem of such a junction isolation method, a device isolation technology has emerged to manufacture a silicon on insulator (SOI) substrate on an insulator, thereby forming a silicon oxide layer around the active region where a semiconductor device is formed. Forming to define the active region.

The key to this SOI technology is the manufacture of SOI substrates. On the other hand, there are two methods of manufacturing a conventional SOI substrate. The first is a method of bonding two different substrates to each other, and the second is a method of injecting oxygen into a predetermined depth of a silicon substrate (also referred to as SIMOX method).

References to such conventional SOI substrate manufacturing methods include silicon processing for the VLSI era (Vol. II, p70-80, published by Lattice Publishing, 1990, S. Wolf).

Hereinafter, two methods of manufacturing a conventional SOI substrate will be described with reference to the accompanying drawings, and the problems thereof will be described.

First, a method of manufacturing an SOI substrate using a conventional bonding method will be described. 2 is a cross-sectional view for explaining a method of manufacturing a SOI substrate by a conventional substrate bonding method.

This is because the upper substrate and the lower substrate 20 of the SOI substrate divided into upper and lower portions by left and right arrows A and B respectively undergo a separate manufacturing process, and then both substrates are integrally manufactured by bonding. .

First, the upper substrate forms a V-shaped trench (also referred to as a V-groove) on the upper surface of the substrate, and then fills an insulator therein and fills the front surface of the device active region 24 of the substrate defined by the V-groove. A device isolation film 22 having a predetermined thickness is formed on the substrate.

Thereafter, after bonding the back surface of the prepared upper substrate onto the lower substrate 20 prepared in advance, the process of polishing the back surface of the bonding surface of the upper substrate until the device isolation layer 22 is exposed. do. At this time, the polishing process proceeds until the inverted shape of the V-shaped groove is polished and flattened. As a result, the device active region 24 is prepared with an SOI substrate formed like an island separated from the lower and side surfaces of the insulating material layer 22.

However, when the upper substrate and the lower substrate 20 are bonded to each other, the yield of the product is lowered due to problems such as bubbles generated at the interface, and thus, it is not an economically effective method of manufacturing an SOI substrate. In addition, as the process of polishing the back surface of the upper substrate progresses, it is very difficult to determine the exposure range of the device isolation film 22, that is, the end point of polishing, and the line width of the device isolation film 22 exposed by polishing There is a problem that it is difficult to form a uniformly.

On the other hand, the SIMOX method is mentioned as another method of manufacturing a conventional SOI substrate. 3 is a cross-sectional view for explaining a method of manufacturing a SOI substrate by a conventional SIMOX method.

This is because the device isolation layer 34 is formed at a predetermined depth of the substrate 30 by ion implantation of oxygen in the direction of the arrow 33 on the upper surface of the substrate 30 to be separated into the upper substrate 36 and the lower substrate 32. do.

While the SIMOX method is simple in principle, in order to actually manufacture an SOI substrate using the method, an expensive and relatively large-scale ion implantation apparatus must be provided, and oxygen is required to proceed with such a process. The amount of ion implantation should be about 1 × 10 17 to 1 × 10 18 pieces / cm 2. For reference, it can be seen that the oxygen ion implantation amount is relatively large compared to the example in which the ion implantation amount for forming the source / drain of the actual NMOS transistor is only about 5 × 10 15. As the amount of oxygen ion implanted in this way increases the cost of the process, the method of manufacturing the SOI substrate by the SIMOX method does not coincide with the economic cost reduction for the purpose of mass production. In addition, the SIMOX method has a problem of causing defects in the substrate, particularly the upper substrate, during ion implantation. When the semiconductor manufacturing process is performed using the SOI substrate having such a defect, the problem of deteriorating the reliability of the completed semiconductor device occurs.

The SOI substrate manufacturing method using the conventional method described above can be seen that there is much room for improvement in the economic efficiency of the manufacturing process in terms of the electrical characteristics of the substrate.

The technical problem to be solved by the present invention is to simultaneously and maximally solve the problems of the conventional methods of manufacturing the SOI substrate as described above, and to provide a method of manufacturing the SOI substrate that can achieve the technical problem. It is an object of the present invention to provide.

1 is a cross-sectional view illustrating a conventional device isolation technique using a PN junction.

2 is a cross-sectional view for explaining a method of manufacturing a SOI substrate by a conventional substrate bonding method.

3 is a cross-sectional view for explaining a method of manufacturing a SOI substrate by a conventional SIMOX method.

4A to 4H are cross-sectional views illustrating a method of manufacturing an SOI substrate according to the present invention.

In order to achieve the object of the present invention, a method of manufacturing an SOI substrate includes (1) using an etch stop layer pattern formed by sequentially laminating a pad insulating film and an etch stop layer on a substrate and patterning the etch stop layer as an etch mask. Etching the pad insulating film and the substrate to form a pad insulating film pattern through which the pad insulating film penetrates, forming a trench in the substrate to form a substrate protrusion, and (2) a front surface of the substrate on which the trench is formed. Forming a polysilicon layer of a thin film, (3) forming an anti-oxidation insulating film which is a thick film filling the inside of the trench in which the polysilicon layer of the thin film is formed, and (4) on the entire surface of the antioxidant insulating film Forming an anti-oxidation insulating layer pattern only on the lower portion of the trench by performing an isotropic etching process, (5) Oxidizing the polysilicon layer of the thin film exposed by the anti-oxidation insulating film pattern to form a silicon oxide film, and forming a polysilicon layer pattern that is oxidized by the antioxidant insulating film pattern, (6) During the oxidation process of the polysilicon layer, after removing the capping oxide film formed on the antioxidant insulating film pattern, and removing the antioxidant insulating film pattern to expose the polysilicon layer pattern of the thin film remaining in the lower portion of the trench, the exposed Removing the polysilicon layer pattern, and then removing the protruding lower portion of the substrate in a horizontal direction so that the protruding upper portion of the substrate supported by the silicon oxide film is separated from the substrate body by performing an etching process on the exposed substrate. (7) separating the protruding top of the substrate from the substrate body Filling an insulating material for forming an isolation layer in the space through the trench inlet, and (8) performing a planarization process on the upper surface of the substrate on which the isolation layer is formed so that the protruding upper portion of the substrate is exposed. do.

One object of the present invention can be preferably achieved by the following.

That is, the capping oxide film of the (6) step is preferably removed using hydrogen fluoride, the antioxidant insulating film is preferably formed using a nitride material, the oxidation prevention insulating film pattern of the (6) step is It is preferable to remove using a phosphoric acid solution, and it is preferable to form the device isolation film of step (7) using spin on glass (SOG), and after forming the device isolation film of step (7), Preferably, the device isolation membrane further includes a densification process, and the densification process is preferably performed for about one hour in an inert gas atmosphere and a temperature condition of 1000 ° C. Finally, the planarization process uses a CMP method. It is preferable to proceed by.

Hereinafter, an embodiment according to the present invention will be described in detail with reference to the accompanying drawings in order to describe the present invention in more detail.

4A to 4H are cross-sectional views illustrating a method of manufacturing an SOI substrate according to the present invention.

4A illustrates a cross-sectional structure in which a pad insulating layer pattern 115 and an etch stop layer pattern 120 are formed in a protrusion on a substrate 110 protruding by a trench.

This is because the first step of sequentially stacking the pad insulating film and the etch stop layer on the substrate 110 and the photolithography process on the etch stop layer to expose a predetermined portion of the substrate 110 and the pad insulating film After the pattern 115 is formed, a second process of forming a trench having a predetermined depth is performed by performing an etching process using the formed etch stop layer pattern 120 as a mask. In this case, the photoresist used in the photolithography process of the second process may be removed by ashing, and the etch stop layer pattern 120 may be formed using a nitride film.

4B illustrates a cross-sectional structure in which a polysilicon layer 115 of a thin film formed on the entire surface of the trench 110 and an anti-oxidation insulating layer 135 are formed on the polysilicon layer 115.

This is a first process of forming a polysilicon layer of a thin film on the entire surface of the substrate 110 on which the trench is formed, filling the inside of the trench in which the polysilicon layer 115 is formed, and forming an anti-oxidation insulating film of a thick film on the entire surface of the substrate 110. A second process of forming 135 is performed.

FIG. 4C illustrates a cross-sectional structure in which an anti-oxidation insulating layer pattern 135a is formed under the trench using a material having strong oxidation resistance.

By performing an isotropic etching process on the entire surface of the antioxidant insulating film (135 of FIG. 4B), the antioxidant insulating film pattern 135a is formed in a predetermined portion under the trench. In this case, nitride may be used as the material having strong oxidation resistance, and the isotropic etching process may be performed using a phosphoric acid solution. The etch stop layer pattern 120 formed to define the active region of the device by the isotropic etching process is protected by the formed polysilicon layer 115, and only the anti-oxidation insulating layer 135 formed on the top of the substrate (135 in FIG. 4B) is formed. The etch process is performed slowly due to the geometry of the anti-oxidation insulating layer (135 of FIG. 4B) in the trench, thereby forming an anti-oxidation insulating layer pattern 135a under the trench.

4D illustrates a cross-sectional structure in which the silicon oxide layer 140 in which the polysilicon layer 130 of FIG. 4C is oxidized is formed.

A process of oxidizing the exposed polysilicon layer (130 of FIG. 4C) is performed to transform the polysilicon layer 140 into a silicon oxide layer 140, and the polysilicon layer pattern 130a is oxidized by the anti-oxidation insulating layer pattern 135a. ) Is formed at the bottom of the trench. In this case, the oxidation process may proceed with the oxidation process in oxygen or steam atmosphere.

4E illustrates a cross-sectional structure in which the antioxidant insulating film pattern (135a in FIG. 4D) is removed.

This is the first process of removing the capping oxide film (not shown) formed on the anti-oxidation insulating film pattern (135a of FIG. 4D) in the oxidation process of the polysilicon layer (130 of FIG. 4C) described in FIG. 4D and the The second process of exposing the polysilicon layer pattern 130a is performed by removing the anti-oxidation insulating film pattern 135a of FIG. 4D. At this time, if the process of removing the capping oxide film (not shown) is excessively proceeded, the hydrogen fluoride (HF) solution used as an etchant may remove the silicon oxide film 140 formed on the protruding upper portion of the substrate. The etch stop layer pattern 120 defining the device active region may be exposed. In this case, during the process of removing the anti-oxidation insulating layer pattern (135a of FIG. 4D), a predetermined portion of the exposed etch stop layer pattern 120 is also removed, thereby protruding the upper portion of the substrate defined by the semiconductor device active region below it. 110b) of 4f is damaged. Therefore, care must be taken not to proceed excessively with the capping oxide film removal process.

4F illustrates a cross-sectional structure in which the projecting upper portion 110b of the substrate 110 by the trench is separated from the body of the substrate.

This is a first process of removing the polysilicon layer pattern 130a and a substrate supported by the body 110 of the substrate and the silicon oxide layer 140 by removing the protruding lower portion of the substrate 110 in a horizontal direction. It is formed by performing an etching process of separating the protruding upper portion (110b).

4G illustrates a cross-sectional structure in which the trench and the device isolation layer 145 separating the substrate body 110 and the protruding upper portion 110b of the substrate are formed.

The first step of filling the insulating material through the inlet of the trench in a space where the body 110 of the substrate and the protruding upper portion 110b of the substrate is separated from the upper surface of the substrate and the anti-oxidation insulating layer pattern ( The device isolation layer 145 is formed by performing a second process of planarizing the exposed portion 120a. In this case, the upper part 110b of the substrate having predetermined patterns 115 and 120 formed thereon is formed to have a structure floating on an insulating material as an island by the device isolation layer 145.

Meanwhile, the process of filling the insulating material is performed using a material having excellent filling ability, for example, spin on glass (hereinafter, referred to as SOG).

On the other hand, after the filling process may further include a step of densifying the device isolation layer 140. At this time, the densification process is preferably performed for about one hour in an inert gas atmosphere and temperature conditions of 1000 ℃. The densification process is a process for lowering the high etching rate of the filling material itself in a process of wet etching the subsequent etching prevention insulating film pattern 120a (to be described later with reference to FIG. 4H), that is, the device isolation layer ( 145) to improve the etching resistance.

4H illustrates a cross-sectional structure in which the top surface of the SOI substrate on which the device isolation layer 145 is formed is planarized.

This is because the wet etching process using a phosphate solution or the like is removed by removing the planarized etch stop insulating layer pattern (120a of FIG. 4G) formed on the protrusion 110b of the substrate and the pad insulating layer pattern 115. A second process of removing hydrogen fluoride or the like is performed to manufacture an SOI substrate including the upper substrate 110b that is completely insulated and separated from the device isolation layer 145 on the substrate 110.

The present invention is not limited to the above embodiments, and it is apparent that more modifications are possible by those skilled in the art within the technical idea of the present invention.

According to the present invention, it is possible to manufacture the SOI substrate more easily by proceeding the application process by combining the processes used in the conventional semiconductor manufacturing process, it is possible to improve the reliability of the manufactured SOI substrate. On the other hand, when manufacturing a conventional SOI substrate, in particular, the production of SOI substrate by oxygen ion implantation, expensive ion implantation equipment is required, while the SOI substrate manufacturing method provided by the present invention is efficient operation and cost reduction of the manufacturing equipment Has an economic advantage. In addition, compared to the conventional method, since defects occur in the SOI substrate manufactured according to the present invention, since the reliability of the semiconductor device using the same can be improved, the yield of the semiconductor manufacturing process can be improved.

Claims (8)

(1) The pad insulating film penetrates the pad insulating film and the substrate by sequentially laminating a pad insulating film and an etching prevention film on the substrate, and performing an etching process on the pad insulating film and the substrate using an etching prevention film pattern formed by patterning the etching prevention film as an etching mask. Forming a deformed pad insulating layer pattern, and forming a trench in the substrate to form a substrate protrusion; (2) forming a thin polysilicon layer on the entire surface of the substrate on which the trench is formed; (3) forming an anti-oxidation insulating film on the entire surface of the substrate, which is a thick film filling the inside of the trench in which the polysilicon layer of the thin film is formed; (4) forming an oxide insulating film pattern only on the lower portion of the trench by performing an isotropic etching process on the entire surface of the antioxidant insulating film; (5) oxidizing the polysilicon layer of the thin film exposed by the antioxidant insulating film pattern to form a silicon oxide film, and forming a polysilicon layer pattern that is oxidized by the antioxidant insulating film pattern; (6) During the oxidation process of the polysilicon layer of the exposed thin film, after removing the capping oxide film formed on the anti-oxidation insulating film pattern, the polysilicon layer of the thin film remaining in the lower portion of the trench by removing the anti-oxidation insulating film pattern Exposing the pattern and removing the exposed polysilicon layer pattern to perform an etching process on the exposed substrate so that the projected upper portion of the substrate is separated from the substrate body so that the projected upper portion of the substrate supported by the silicon oxide film is separated from the substrate body. Removing in the horizontal direction; (7) filling an insulating material for forming an isolation layer through the trench inlet in a space separating the protruding upper portion of the substrate from the substrate body; And And (8) performing a planarization process on the upper surface of the substrate on which the device isolation film is formed so that the protruding upper portion of the substrate is exposed. According to claim 1, And capping oxide film of step (6) is removed using hydrogen fluoride. According to claim 1, And the oxidation preventing insulating film is formed using a nitride material. The method of claim 3, wherein The method of manufacturing an SOI substrate, wherein the anti-oxidation insulating film pattern of step (6) is removed using a phosphoric acid solution. According to claim 1, The method of manufacturing an SOI substrate, wherein the device isolation layer of step (7) is formed by using spin on glass (SOG). The method of claim 5, And after forming the device isolation film of step (7), further comprising a densification process for the device isolation film. The method of claim 6, The densification process is an SOI substrate manufacturing method characterized in that for about one hour in an inert gas atmosphere and 1000 ℃ temperature conditions. According to claim 1, And the planarization step is performed using a CMP method.