KR100206377B1 - 공정단축이 가능한 다층 인쇄회로기판의 적층방법 - Google Patents
공정단축이 가능한 다층 인쇄회로기판의 적층방법 Download PDFInfo
- Publication number
- KR100206377B1 KR100206377B1 KR1019960024636A KR19960024636A KR100206377B1 KR 100206377 B1 KR100206377 B1 KR 100206377B1 KR 1019960024636 A KR1019960024636 A KR 1019960024636A KR 19960024636 A KR19960024636 A KR 19960024636A KR 100206377 B1 KR100206377 B1 KR 100206377B1
- Authority
- KR
- South Korea
- Prior art keywords
- printed circuit
- circuit board
- laminated
- placing
- lamination
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 51
- 238000003475 lamination Methods 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 32
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 13
- 239000011889 copper foil Substances 0.000 claims abstract description 8
- 238000004904 shortening Methods 0.000 claims abstract description 5
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 claims description 6
- 238000010030 laminating Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (2)
- 다층인쇄회로기판의 제조방법에 있어서, 하측으로부터 프리플랙, 동박적층판 및 프리플랙의 순서로 프리플랙과 동박적층판을 순차적으로 적치한 후, 이를 리베팅하고 리벳으로 고정된 적층기판의 상하 양측에 다시 동박의 위치시키는 예비적층단계; 상기와 같은 여러번의 예비적층공정을 통해 다수의 적층기판을 마련하는 단계; 및 상기 예비적층된 각 적층기판을 이송하는 캐리어판에 하측으로부터 쿠션지, 지지판 및 다수개의 예비적층기판을 적치한 다음, 다시 쿠션지 및 지지판을 올려놓고 그 최상부에는 카바를 적치하는 단계; 를 포함하여 구성됨을 특징으로 하는 공정단축이 가능한 다층인쇄회로기판의 적층방법.
- 제1항에 있어서, 상기 예비적층된 적층기판은 6층이상의 인쇄회로기판임을 특징으로 하는 적층방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960024636A KR100206377B1 (ko) | 1996-06-27 | 1996-06-27 | 공정단축이 가능한 다층 인쇄회로기판의 적층방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960024636A KR100206377B1 (ko) | 1996-06-27 | 1996-06-27 | 공정단축이 가능한 다층 인쇄회로기판의 적층방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR980007901A KR980007901A (ko) | 1998-03-30 |
KR100206377B1 true KR100206377B1 (ko) | 1999-07-01 |
Family
ID=19463965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960024636A KR100206377B1 (ko) | 1996-06-27 | 1996-06-27 | 공정단축이 가능한 다층 인쇄회로기판의 적층방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100206377B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030048283A (ko) * | 2001-12-11 | 2003-06-19 | 파이어니어 테크놀로지 엔지니어링 컴퍼니 리미티드 | 동박 적층판의 제조 방법 |
KR20030048281A (ko) * | 2001-12-11 | 2003-06-19 | 파이어니어 테크놀로지 엔지니어링 컴퍼니 리미티드 | 동박 적층판의 제조 방법 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030010312A (ko) * | 2001-07-26 | 2003-02-05 | 삼성전기주식회사 | 리벳을 이용한 고다층 패키지 기판의 제조방법 |
-
1996
- 1996-06-27 KR KR1019960024636A patent/KR100206377B1/ko not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030048283A (ko) * | 2001-12-11 | 2003-06-19 | 파이어니어 테크놀로지 엔지니어링 컴퍼니 리미티드 | 동박 적층판의 제조 방법 |
KR20030048281A (ko) * | 2001-12-11 | 2003-06-19 | 파이어니어 테크놀로지 엔지니어링 컴퍼니 리미티드 | 동박 적층판의 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
KR980007901A (ko) | 1998-03-30 |
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