KR100197658B1 - Electrochemical static capacitance-voltage measuring method - Google Patents
Electrochemical static capacitance-voltage measuring method Download PDFInfo
- Publication number
- KR100197658B1 KR100197658B1 KR1019950066136A KR19950066136A KR100197658B1 KR 100197658 B1 KR100197658 B1 KR 100197658B1 KR 1019950066136 A KR1019950066136 A KR 1019950066136A KR 19950066136 A KR19950066136 A KR 19950066136A KR 100197658 B1 KR100197658 B1 KR 100197658B1
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- capacitance
- light
- contact
- voltage
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
본 발명은 반도체소자에서 전기화학적 정전용량-전압 방법에 관한 것으로, 레이저 다이오드와 포토 다이오드와 광소자에서 웨이퍼 상에 플리이미드 패턴을 구비시켜서 웨이퍼에 O-RING이 직접 접촉되지 않도록 함으로써 원하지 않는 영역의 웨이퍼가 식각용액에 접촉되지 않도록 하는 것이다. 그로 인하여 전기화학적 정전용량-전압 측정 결과에 신뢰성을 향상시킬 수가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrochemical capacitance-voltage method in a semiconductor device, and has a plasmid pattern on a wafer in a laser diode, a photodiode, and an optical device so that the O-ring does not directly contact the wafer. The wafer is not in contact with the etching solution. This can improve the reliability of the electrochemical capacitance-voltage measurement results.
Description
제1도 및 제2도는 본 발명에 의해 웨이퍼 상부에 폴리이미드 패턴을 형성하는 공정을 도시한 단면도.1 and 2 are cross-sectional views showing a process for forming a polyimide pattern on the wafer according to the present invention.
제3도는 폴리이미드 패턴이 형성된 웨이퍼에 빛을 조사하면서 전기화학적 정전용량-전압 측정 장치에서 C-V를 측정하는 것을 도시한 도면.3 is a diagram illustrating measuring C-V in an electrochemical capacitance-voltage measuring device while irradiating light onto a wafer on which a polyimide pattern is formed.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 웨이퍼 2 : 폴리이미드1: wafer 2: polyimide
4 : 마스크 5 : 식각용액4: mask 5: etching solution
6 : 투명용기 8 : 광 소오스6: transparent container 8: light source
10 : O-RING10: O-RING
본 발명은 반도체소자에서 전기화학적 정전용량-전압 측정 방법에 관한 것으로, 특히 레이저 다이오드와 포토 다이오드와 광소자에서 웨이퍼 상에 폴리이미드 패턴을 구비시켜서 전기화학적 정전용량-전압 측정 결과에 신뢰성을 향상시키는 방법에 관한 것이다. 본 발명은 전기화학적 정전용량-전압 측정 장치의 반도체와 용액 접촉면 보다 작고 크기가 균일한 식각패턴을 제작하여 균일한 식각형태를 얻으므로써 정확한 도핑량을 측정할 수 있다. 전기화학적 정전용량-전압 측정 장치는 웨이퍼 시료를 전도성 용액에 담그고 빛이 조사되는 부분이 식각되도록 하면서 웨이퍼 시료에 인가되는 전압에 따라 정전용량을 측정함으로써 반도체의 도핑량을 계산하는 장치로 시료의 면을 식각하여 깊이에 따라 도핑량의 변화를 관찰할 수 있는 장치이다. 그러나, 상기의 전기화학적 정전용량-전압 측정 장치에서 시료를 전도성 용액에 담그고 빛이 조사되는 부분의 웨이퍼가 식각되도록 하는데 반도체 면에서 빛의 조사량이 일정하게 분포하기 어려운 구조로 되어 있어 식각 깊이에 따라 도핑량의 변화가 일정치가 않다. 전기화학적 정전용량-전압 측정 장치는 인가 전압에 따라 정전용량을 측정함으로써 반도체의 도핑량을 계산하는 장치로 n-형 반도체의 경우는 빛을 쪼이면서 식각하는데 기존의 장치는 반도체와 식각용액 접촉면에서 빛의 조사량이 일정하게 분포하기 어려운 구조로 되어 있어 식각된 모양의 빛의 조사량에 따르며 균일하지 못하여 식각 깊이에 따라 도핑량의 변화가 일정치가 않고 O-RING으로 반도체면에 접촉되어 있어 식각용액이 O-RING의 불균일한 형태를 따라 식각되므로 식각된 모양이 균일하지 못하다. 그로 인하여 식각 깊이에 따라 도핑량의 변화가 일정치가 않다. 즉, 웨이퍼의 상부면에 빛이 조사되는 부분만 노출되도록 O-RING이 접촉되는데 O-RING의 개구부를 정확하게 조절하기가 용이하지 않고 빛이 조사되면서 O-RING의 접촉된 부분의 웨이퍼가 식각되어 또다른 문제를 야기 시키게 된다. 기존의 측정방식으로는 매 측정시 식각된 면의 넓이를 계산하여 측정후 보정해 주어야 하는 불편이 따르며 O-RING으로 반도체면에 접촉되어 있어 식각용액이 O-RING의 불균일한 형태를 따라 식각되므로 식각된 모양이 균일하지 못하다. 따라서, 본 발명은 전기화학적 정전용량-전압 측정 장치에서 사용되는 O-RING이 웨이퍼의 상부면에 직접 접촉되지 않도록 하고, 전도성 용액이 접촉되는 웨이퍼의 접촉면이 빛이 조사되는 면보다 작도록 하기 위하여 웨이퍼의 상부면에 개구를 갖는 패턴을 구비하는 반도체소자 제조 방법을 제공하는데 그 목적이 있다. 상기한 본 발명에 의하면 식각용액과 반도체 접촉면이 빛이 조사되는 면보다 작도록 되는 패턴을 빛이 일정하게 조사되는 부분에 위치하도록 하면 균일한 빛의 조사로 인하여 균일한 식각패턴을 얻을 수 있다. 이때 패턴 형성에 사용하는 물질은 불투명하고 식각용액에 식각되지 않는 특성을 지녀야 한다. 이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명하기로 한다. 제1도는 광소자 등이 구비된 웨이퍼(1) 상부에 폴리이미드(Polyimide)(2)를 증착하고, 마스크(4)를 이용한 노광공정으로 노광시킨 단면도이다. 참고로, 상기 노광영역은 사각형 또는 원형으로 형성된다. 제2도는 상기 노광된 폴리이미드(2)을 현상공정으로 제거하여 폴리이미드 패턴(2)을 형성한 도면도이다. 제3도는 본 발명에 의해 폴리이미드 패턴(2')이 구비된 웨이퍼(1)에 O-RING(10)이 상기 폴리이미드 패턴(2')의 상부에 접촉시켜서 식각부분 외에는 웨이퍼(1)가 식각용액(5)에 접촉되지 않도록 상기 웨이퍼(1)를 넣고 광 소오스(8)로부터 빛을 웨이퍼(1)의 접촉면으로 조사하는 것을 도시한 것이다. 상기 빛이 조사되면 식각용액(5)이 웨이퍼(1)를 식각하게 된다. 아울러 정전용량-전압 측정 장치에서는 웨이퍼에 인가되는 전압에 따라 정전 용량을 측정하는데 웨이퍼의 접촉면이 식각되면서 정전 용량이 달라지는 것을 측정하여 이러한 변수들을 이용하여 웨이퍼의 도핑량을 구할 수 있는 것이다. 상기 폴리이미드 패턴은 불투명하고 식각용액에 반응하지 않는 물질이다. 상기한 본발명은 식각용액과 반도체 접촉며을 빛이 조사되는 면보다 작은 개구(사각 또는 원형)를 갖는 폴리이미드 패턴을 반도체 표면에 형성하여 빛의 조사량이 일정한 부분에 노출된 반도체 면을 위치시키면 균일하게 식각되며 식각면적이 일정하므로 정전용량을 더욱 정확하게 구할 수가 있으므로 웨이퍼의 도핑량을 정확히 얻을 수 있다. 그러므로 면적을 알고 있는 균일한 식각패턴을 이용하면 빛이 조사되는 영역중 빛의 강도가 일정한 영역에서 식각을 할 수 있어 균일한 식각형태를 얻을 수 있으므로 깊이에 따른 정확한 농도를 얻을 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring electrochemical capacitance-voltage in a semiconductor device. In particular, a polyimide pattern is provided on a wafer in a laser diode, a photodiode, and an optical device to improve reliability in an electrochemical capacitance-voltage measurement result. It is about a method. According to the present invention, an accurate doping amount can be measured by fabricating an etching pattern smaller than the semiconductor and solution contact surface of the electrochemical capacitance-voltage measuring device to obtain a uniform etching form. Electrochemical capacitance-voltage measuring device is a device that calculates the amount of semiconductor doping by measuring the capacitance according to the voltage applied to the wafer sample while immersing the wafer sample in the conductive solution and etching the portion irradiated with light. It is a device that can observe the change of doping amount according to the depth by etching. However, in the electrochemical capacitance-voltage measuring apparatus, the sample is immersed in the conductive solution and the wafer of the portion to which the light is irradiated is etched. The change in doping amount is not constant. Electrochemical capacitance-voltage measuring device calculates doping amount of semiconductor by measuring capacitance according to applied voltage. In case of n-type semiconductor, light is etched by etching. Since the irradiation dose of light is hard to be distributed uniformly, it depends on the irradiation dose of the etched shape and it is not uniform.The change of doping amount is not constant according to the etching depth. The etched shape is not uniform because it is etched along the uneven shape of the O-ring. Therefore, the change of doping amount is not constant according to the etching depth. That is, the O-ring is contacted so that only the portion of the upper surface of the wafer is exposed to light is not easy to adjust the opening of the O-ring accurately, and the wafer of the contacted portion of the O-ring is etched while the light is irradiated. It causes another problem. Conventional measurement methods incur the inconvenience of calculating the area of the etched surface at each measurement and correcting it after measurement.In addition, the etching solution is etched along the non-uniform shape of the O-ring because it is in contact with the semiconductor surface with O-RING. The etched shape is not uniform. Accordingly, the present invention is to ensure that the O-ring used in the electrochemical capacitance-voltage measuring apparatus does not directly contact the upper surface of the wafer, and that the contact surface of the wafer to which the conductive solution is contacted is smaller than the surface to which light is irradiated. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a pattern having an opening on an upper surface thereof. According to the present invention described above, if the etching solution and the semiconductor contact surface are positioned smaller than the surface to which the light is irradiated, the pattern may be positioned at a portion where the light is constantly irradiated, thereby obtaining a uniform etching pattern due to uniform light irradiation. At this time, the material used to form the pattern should be opaque and have a property of not being etched in the etching solution. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view in which a polyimide 2 is deposited on an upper surface of a wafer 1 equipped with an optical device and the like, and exposed by an exposure process using a mask 4. For reference, the exposure area is formed in a rectangle or a circle. FIG. 2 is a diagram showing the polyimide pattern 2 formed by removing the exposed polyimide 2 by a developing step. 3 shows that the O-ring 10 contacts the upper portion of the polyimide pattern 2 'to the wafer 1 provided with the polyimide pattern 2' according to the present invention. The wafer 1 is placed so as not to contact the etching solution 5 and the light is emitted from the light source 8 to the contact surface of the wafer 1. When the light is irradiated, the etching solution 5 etches the wafer 1. In addition, in the capacitance-voltage measuring device, the capacitance is measured according to the voltage applied to the wafer. By measuring that the capacitance changes as the contact surface of the wafer is etched, the doping amount of the wafer can be obtained using these variables. The polyimide pattern is a material that is opaque and does not react with the etching solution. The present invention is to form a polyimide pattern having an opening (square or circle) having an opening (square or circle) smaller than the surface irradiated with the etching solution and the semiconductor contact to place the semiconductor surface exposed to a constant portion of the light irradiation Since the etching and the etching area are constant, the capacitance can be obtained more accurately, so that the amount of doping of the wafer can be obtained accurately. Therefore, by using a uniform etching pattern having a known area, it is possible to etch in a region where light intensity is constant in the region to which light is irradiated, so that a uniform etching form can be obtained, thereby obtaining accurate concentration according to depth.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950066136A KR100197658B1 (en) | 1995-12-29 | 1995-12-29 | Electrochemical static capacitance-voltage measuring method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950066136A KR100197658B1 (en) | 1995-12-29 | 1995-12-29 | Electrochemical static capacitance-voltage measuring method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970048596A KR970048596A (en) | 1997-07-29 |
KR100197658B1 true KR100197658B1 (en) | 1999-06-15 |
Family
ID=19447255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950066136A KR100197658B1 (en) | 1995-12-29 | 1995-12-29 | Electrochemical static capacitance-voltage measuring method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100197658B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101253090B1 (en) * | 2010-08-12 | 2013-04-10 | 이엘케이 주식회사 | Method for inspecting etching state of transparent conductor |
-
1995
- 1995-12-29 KR KR1019950066136A patent/KR100197658B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101253090B1 (en) * | 2010-08-12 | 2013-04-10 | 이엘케이 주식회사 | Method for inspecting etching state of transparent conductor |
Also Published As
Publication number | Publication date |
---|---|
KR970048596A (en) | 1997-07-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4377028A (en) | Method for registering a mask pattern in a photo-etching apparatus for semiconductor devices | |
US4473795A (en) | System for resist defect measurement | |
EP0162681A2 (en) | Method and apparatus for evaluating surface conditions of a sample | |
KR100197658B1 (en) | Electrochemical static capacitance-voltage measuring method | |
KR960039259A (en) | Method of measuring impurity concentration profile | |
KR930005569B1 (en) | Method for recognizing pattern | |
JP3670051B2 (en) | Method and apparatus for measuring lifetime of carrier of semiconductor sample | |
US4774158A (en) | Method of determining an exposure dose of a photosensitive lacquer layer | |
KR20040002702A (en) | Method and device for determining backgate characteristic | |
US5086013A (en) | Method for fine patterning | |
JPH07243814A (en) | Measuring method of line width | |
JPS5650515A (en) | Endpoint detecting method | |
JPH0653552A (en) | Formation of optical characteristics measuring groove | |
JPS5534430A (en) | Positioning method in electron beam exposure | |
US20050112853A1 (en) | System and method for non-destructive implantation characterization of quiescent material | |
EP1194814A1 (en) | Mask manufacturing methods comprising patterns to control corner rounding | |
US20060114478A1 (en) | Evaluating effects of tilt angle in ion implantation | |
KR100278920B1 (en) | Method of measuring pollution level of photosensitive material | |
JPH01179315A (en) | Laser annealer | |
JPS6473726A (en) | Etching and manufacture of semiconductor device | |
KR0156104B1 (en) | Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film | |
KR100192433B1 (en) | Method of measuring focus to fabricate semiconductor device | |
JPS5650516A (en) | Endpoint detecting method | |
KR890002571B1 (en) | The method for measuring width of sensitive film | |
Komatsu et al. | Novel Automatic measuring system for resistivity profiles in silicon wafers |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130122 Year of fee payment: 15 |
|
FPAY | Annual fee payment |
Payment date: 20140116 Year of fee payment: 16 |
|
LAPS | Lapse due to unpaid annual fee |