KR100189979B1 - Method for manufacturing capacitor of semiconductor device - Google Patents
Method for manufacturing capacitor of semiconductor device Download PDFInfo
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- KR100189979B1 KR100189979B1 KR1019950042346A KR19950042346A KR100189979B1 KR 100189979 B1 KR100189979 B1 KR 100189979B1 KR 1019950042346 A KR1019950042346 A KR 1019950042346A KR 19950042346 A KR19950042346 A KR 19950042346A KR 100189979 B1 KR100189979 B1 KR 100189979B1
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- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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Abstract
실리콘질화막과 이산화실리콘막(NO)의 복합막을 유전막으로 사용하는 커패시터의 제조방법이 개시된다. 본 발명에 의한 NO 유전막 형성방법에 의하면 오존이나 UV-O3의 사용에 의해 화학반응에 필요한 온도를 낮추고 이를 H2O 기화기와 결합시켜 저온에서의 여기산소(O*)와 수소를 동시에 공급함으로써, Si3N4를 저온화 및 단축시킬 수 있다. 그 결과 고집적화의 고질적 문제점인 Si3N4산화시의 온도 및 시간에 따른 하지막들과의 열화 현상을 방지할 수 있을 뿐만아니라 커패시터의 누설전류 밀도를 저하시킬 수 있는 효과를 발휘한다.A method of manufacturing a capacitor using a composite film of a silicon nitride film and a silicon dioxide film (NO) as a dielectric film is disclosed. According to the method for forming a NO dielectric film according to the present invention, by using ozone or UV-O 3 , a temperature required for a chemical reaction is lowered and combined with an H 2 O vaporizer to simultaneously supply excitation oxygen (O * ) and hydrogen at low temperature. , Si 3 N 4 can be lowered and shortened. As a result, it is possible to prevent degradation of the underlayers due to temperature and time during the Si 3 N 4 oxidation, which is a problem of high integration, and to reduce the leakage current density of the capacitor.
Description
제1도는 본 발명에 의해 제조된 축적 캐패시터의 구조를 도시한 단면도.1 is a cross-sectional view showing the structure of an accumulation capacitor manufactured according to the present invention.
제2도는 본 발명의 NO 유전막 형성을 위해 사용된 질화막 산화장치의 구성을 도시한 개략도.2 is a schematic diagram showing the configuration of a nitride film oxidizer used for forming the NO dielectric film of the present invention.
본 발명은 반도체장치의 커패시터 제조방법에 관한 것으로, 특히 실리콘질화막과 이산화실리콘막의 복합막을 유전체막으로서 사용하는 커패시터의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor in a semiconductor device, and more particularly, to a method of manufacturing a capacitor using a composite film of a silicon nitride film and a silicon dioxide film as a dielectric film.
DRAM(Dynamic Random Access Memory) 장치의 집적도가 증가함에 따라, 제한된 셀 면적내에서 커패시턴스를 증가시키기 위한 많은 방법들이 제안되고 있는데, 이중에서도 커패시터의 유전체막을 실리콘질화막(Si3N4)과 이산화실리콘막(SiO22)의 복합막으로 형성함으로써 유전체막을 박막학하여 커패시턴스를 증가시키는 방법이 널리 사용되고 있다.As the density of DRAM (Dynamic Random Access Memory) devices increases, many methods have been proposed to increase the capacitance within a limited cell area. Among them, the dielectric film of the capacitor is a silicon nitride film (Si 3 N 4 ) and a silicon dioxide film. A method of increasing capacitance by thin film dielectric film by forming a composite film of (SiO 2 2) is widely used.
통상적으로, 실리콘질화막은 저압화학기상중착(Low Pressure Chemical Vapor Deposition ; 이하 LPCVD''라 한다) 방범으로 형성되며, 그 하지막의 특성에 따라 인큐베이션(incubation) 시간의 차이에 의한 막두께의 차이가 발생되는 현상이 보고되어 있다 (참조문헌 : IEEE Transactions on Electron Devices, Vo1. 41, No. 5, pp704, 1994, Silicon Nitride Thin-Fi1m Deposition by LPCVD with In Situ HF Vapor Cleaning and Its Application to Stacked DRAM Capacitor Fabrication).Typically, the silicon nitride film is formed by Low Pressure Chemical Vapor Deposition (hereinafter referred to as LPCVD) prevention, and the difference in film thickness due to the difference in incubation time depends on the characteristics of the underlying film. It is reported (see: IEEE Transactions on Electron Devices, Vo1.41, No. 5, pp704, 1994, Silicon Nitride Thin-Fi1m Deposition by LPCVD with In Situ HF Vapor Cleaning and Its Application to Stacked DRAM Capacitor) Fabrication).
여기서, 상기 이산화실리콘막(SiO2)은 상기 실리콘질화막을 습식 산화시켜 만들어 주고 있다.Here, the silicon dioxide film (SiO 2 ) is made by wet oxidation of the silicon nitride film.
그러나, 반도체 장치의 집적도가 높아짐에 따라 상기 질화막의 산학방법은 다음과 같은 문제점을 나타낸다. 즉, 이산화실리콘막은 상기 질화막을 800℃ 이상의 고온에서 30분 이상의 장시간 동안의 습식 산화공정에 의해 제작됨으로써, 생산성이 저하되고소자의 접합(junction) 깊이가 깊어져 고집적화의 커다란 문제점의 하나로 되고있다.However, as the degree of integration of semiconductor devices increases, the method for academia of the nitride film exhibits the following problems. That is, the silicon dioxide film is manufactured by the wet oxidation process for a long time of 30 minutes or more at a high temperature of 800 ° C. or higher, thereby reducing productivity and deepening the junction depth of the device, which is one of the problems of high integration.
단순하게, 상기 실리콘질화막(Si3N4)의 습식 산화온도를 낮추거나 시간을 줄일 경우에는 이산화실리콘막(SiO2)의 박막화를 초래하며, 이는 오히려 NO(Si3N4/SiO2) 유전막의 누설전류 밀도를 기하 급수적으로 증가시키는 결과를 초래한다(참고문헌 : J. Electrochem. Soc. Vo1. 139, No. 6, 1992, pp. 1693-1699, Dielectric Breakdown and Current Conduction of O/N/O Multi-Layer Structures'' ).For simplicity, lowering the wet oxidation temperature of the silicon nitride film (Si 3 N 4 ) or reducing the time results in the thinning of the silicon dioxide film (SiO 2 ), which is rather a NO (Si 3 N 4 / SiO 2 ) dielectric film. Results in an exponential increase in the leakage current density (see J. Electrochem. Soc. Vo 1.139, No. 6, 1992, pp. 1693-1699, Dielectric Breakdown and Current Conduction of O / N /). O Multi-Layer Structures '').
따라서, 본 발명의 목적은 NO(Si3N4/SiO2) 복합 유전막의 제조를 위한 질화막 산화방법을 개선하여 동일한 두께의 NO 복합막을 저온에서 단시간내에 산화시켜 누설전류 밀도를 감소시킬 수 있는 반도체장치의 커패시터 제조방법을 제공하는데 있다.Accordingly, an object of the present invention is to improve the oxidation method of the nitride film for the production of the NO (Si 3 N 4 / SiO 2 ) composite dielectric film to oxidize the NO composite film of the same thickness in a short time at low temperature to reduce the leakage current density The present invention provides a method of manufacturing a capacitor of a device.
상기 목적을 달성하기 의하여 본 발명은, 하부전극, NO(Si3N4/SiO2)복합 유전막, 및 상부전극으로 이루어지는 반도체장치의 커패시터를 제조하는 방법에 있어서, 상기 하부전극이 형성된 반도체 기판상의 자연산화막을 제거하기 의한 제1공정과, 상기 결과물에 제l유전막인 실리콘질화막을 형성하는 제2공정과, 상기 실리콘질화막 상에 여기산소(Activated Oxygen)와 수소를 동시에 공급시키는 제3공정과, 상기 여기산소와 수소가 공급된 상태에서 상기 제1유전막을 800℃ 이하의 저온에서 수분간의 급속 산화공정을 통하여 제2유전막인 이산화 실리콘막을 형성하는 제4공정을 포함하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a method of manufacturing a capacitor of a semiconductor device comprising a lower electrode, a NO (Si 3 N 4 / SiO 2 ) composite dielectric film, and an upper electrode, wherein the lower electrode is formed on a semiconductor substrate. A first step of removing a natural oxide film, a second step of forming a silicon nitride film as a first dielectric film in the resultant, a third step of simultaneously supplying excited oxygen and hydrogen to the silicon nitride film; And a fourth step of forming the silicon dioxide film as the second dielectric film through a rapid oxidation process of the first dielectric film for several minutes at a low temperature of 800 ° C. or less while the excitation oxygen and hydrogen are supplied.
바람직하게, 상기 자연산화막 제거를 의한 제1공정은 이 약 780℃, 3O분, NH3분위기 하에서의 질화(Nitridation) 공정 또는 약850∼900℃에서 1분간의 급속 열질화방법으로 수행하는 것을 특징으로 한다.Preferably, the first step by removing the native oxide film is performed by nitriding at about 780 ° C., 30 minutes, or NH 3 atmosphere, or by rapid thermal nitriding at about 850 to 900 ° C. for 1 minute. do.
또한, 상기 자연산화막 제거를 위한 제1공정으로 수소(H2) 베이크 및 HF Vapor cleanning 중의 어느 한 공정으로 수행할 수 있다.In addition, the first process for removing the natural oxide film may be performed by any one of hydrogen (H 2 ) baking and HF vapor cleaning.
바람직하게, 상기 제3공정은 오존 발생기와 H2O 기화기(Vaporizer)에 의해 생성된 O3+H2O에 UV(ultraviolet) 광에 조사시키는 공정에 의해 여기산소와 수소를 공급시키는 것을 특징으로 한다.Preferably, the third step is to supply the excitation oxygen and hydrogen by the step of irradiating UV (ultraviolet) light to O 3 + H 2 O generated by the ozone generator and H 2 O vaporizer (Vaporizer). do.
본 발명의 바람직한 실시예에 의하면, 오존이나 UV-O3의 사용에 의해 화학반응에 필요한 온도를 낮추고 이를 H2O 기화기와 결합시켜 저온에서의 여기산소(O*)와 수소를 동시에 공급함으로써, Si3N4산학를 저온화 및 단축시킬 수 있다. 그 결과, 고집적화의 고질적 문제점인 Si3N4산화시의 온도 및 시간에 따른 하지막들과의 열화 현상을 방지할 수 있다.According to a preferred embodiment of the present invention, by lowering the temperature required for the chemical reaction by the use of ozone or UV-O 3 and combined with the H 2 O vaporizer by supplying excitation oxygen (O * ) and hydrogen at low temperature, Si 3 N 4 Industry can be lowered and shortened. As a result, it is possible to prevent deterioration of the underlying films with temperature and time during Si 3 N 4 oxidation, which is a problem of high integration.
이하, 첨부한 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
일반적으로, 실리콘질화막(Si3N4)의 습식산화는 하기 식(1)∼(5)의 반응식에 따른다(Thermal Oxidation of Silicon Nitride and Silicon 0xynitride Films, J. Vac. Sci. Tech. B7(3), pp. 455-465, 1989 참조).Generally, the wet oxidation of the silicon nitride film (Si 3 N 4 ) is according to the reaction formulas of the following formulas (1) to (5) (Thermal Oxidation of Silicon Nitride and Silicon 0xynitride Films, J. Vac. Sci.Tech.B7 (3). ), pp. 455-465, 1989).
상기의 화학반응을 통하여, NO 유전막 형성을 의한 실리콘질화막(Si3N4)의 습식산화에 있어서 수소의 존재는 필수적임을 알 수 있다.Through the above chemical reaction, it can be seen that the presence of hydrogen is essential in the wet oxidation of the silicon nitride film (Si 3 N 4 ) by the formation of the NO dielectric film.
그러므로, 300℃의 저온에서 O3+ H2O를 UV(Ultraviolet) 램프로 빛을 쪼여 여기산소와 수소를 실리콘질화막에 조사한 후, 상기 식(5) 반응의 에너지 원으로 800℃ 이하의 온도에서 약1분 이내로 급속 열처리를 실시함으로써, 종래의 800℃ 이상, 약 30분 동안의 습식 산화시와 동등한 두께의 이산화실리콘막을 갖는 NO 유전막을 얻을 수 있다.Therefore, at a low temperature of 300 ° C., O 3 + H 2 O is irradiated with a UV (Ultraviolet) lamp to irradiate excitated oxygen and hydrogen to the silicon nitride film, and then at a temperature of 800 ° C. or lower as an energy source of the reaction of Formula (5). By carrying out the rapid heat treatment within about 1 minute, a NO dielectric film having a silicon dioxide film having a thickness equivalent to that of conventional wet oxidation for 800 minutes or more and about 30 minutes can be obtained.
제1도는 본 발명에 의해 제조된 축적 캐패시터의 단면 구조를 나타낸 것이다.1 shows a cross-sectional structure of an accumulation capacitor manufactured according to the present invention.
제1도에서, 참조부호 11은 반도체 기판을 나타내며, 12는 소자분리를 의한 필드 산학막을, 13은 접합영역을, 14는 게이트를 각각 나타낸다.In FIG. 1, reference numeral 11 denotes a semiconductor substrate, 12 denotes a field-thick film formed by device isolation, 13 denotes a junction region, and 14 denotes a gate.
이러한 트랜지스터가 형성된 반도체 기판(11)의 전면에 절연 및 평탄화하기 의한 층간절연막(15)을 형성한다. 이어, 상기 층간 절연막(15)의 소정부위를 식각하여 접촉 홀을 형성한다.An interlayer insulating film 15 is formed on the entire surface of the semiconductor substrate 11 on which such a transistor is formed to insulate and planarize. Subsequently, a predetermined portion of the interlayer insulating layer 15 is etched to form contact holes.
상기 노출된 접합영역(13)과의 접속을 위한 하부전극으로 분순물이 도핑된 폴리실리콘을 저입화학기상증착법(LPCVD)으로 증착한 후 패터닝하여 스토리지 노드(16)를 형성한다. 여기까지는 통상의 공정을 따른다.A storage node 16 is formed by depositing polysilicon doped with impurities into the lower electrode for connection with the exposed junction region 13 by low-CVD chemical vapor deposition (LPCVD) and then patterning the polysilicon. Up to this point, a usual process is followed.
이어, 상기 하부전극(16)이 형성된 반도체 기판(11)상의 자연산학막(native oxide)을 제거하기 의하여, 약 780℃, 30분, NH3분위기 하에서의 질학(Nitridation) 공정을 수행한다.Subsequently, by removing the native oxide on the semiconductor substrate 11 on which the lower electrode 16 is formed, a nitriding process is performed at about 780 ° C. for 30 minutes in an NH 3 atmosphere.
이때, 상기 질화공정을 850∼900℃의 온도 범위에서 1분간의 급속 열처리방법으로 수행할 수 있다. 또한, 상기 자연산화막 제거를 위한 질학공정 대신에 수소(H2) 베이크 또는 HF Vapor cleaning 공정을 이용할 수도 있다.At this time, the nitriding process may be performed by a rapid heat treatment method of 1 minute in the temperature range of 850 ~ 900 ℃. In addition, a hydrogen (H 2 ) bake or HF Vapor cleaning process may be used in place of the nitrification process for removing the natural oxide film.
상기 결과물에 제1유전막인 실리콘질화막(17)을 LPCVD 방법으로 약40∼100Å 정도의 두께로 적충한다. 이때, 상기 실리콘질화막(17)의 두께는 커패시터의 용량에 따라 결정된다.The silicon nitride film 17, which is the first dielectric film, is loaded into the resultant with a thickness of about 40 to 100 mW by the LPCVD method. At this time, the thickness of the silicon nitride film 17 is determined according to the capacity of the capacitor.
연이어, 상기 제1유전막(17) 상에 여기산소(Activated Oxygen)와 수소를 동시에 공급시키면서 제1유전막을 800℃ 이하의 저온에서 수분간의 급속 산화공정을 실시하여 제2유전막(18)인 이산화실리콘막을 형성한다.Subsequently, the first dielectric film is subjected to a rapid oxidation process for several minutes at a low temperature of 800 ° C. or less while simultaneously supplying excited oxygen and hydrogen to the first dielectric film 17, thereby obtaining silicon dioxide as the second dielectric film 18. To form a film.
제2도는 본 발명의 NO 유전막 형성을 위해 사용된 질화막산화장치의 구성을 개략적으로 도시한 도면으로서, 참조부호 27은웨이퍼를, 29는 상기 제1유전막(Si3N4)(29)이 형성된 웨이퍼(27)를 적재 및 지지하기 위한 서셉터(susceptor)(29)를, 25는 UV 광을 조사하기 위한 UV 램프를, 23은 오존 발생기(ozone generator)를, 21은 H2O 기화기(vaporizer)를 각각 나티낸다.2 is a view schematically showing the structure of the nitride oxide device used to form the NO dielectric film of the present invention, wherein reference numeral 27 denotes a wafer and 29 denotes a first dielectric layer (Si 3 N 4 ) 29. A susceptor 29 for loading and supporting the wafer 27, 25 a UV lamp for irradiating UV light, 23 an ozone generator, 21 a H 2 O vaporizer ).
이러한 구성을 갖는 산화장치를 이용하여, 185nm와 254nm의 파장을 갖는 UV 광을 상기 오존 발생기(23)와 H2O 기화기(21)를 통하여 유입된 O3+H2O에 조사하면 하기와 같은 반응식 (6)∼(7)에 따라 상기 실리콘질화막(17)에 여기산소(O*)와 수소를 공급한다.Using an oxidizer having such a configuration, UV light having a wavelength of 185 nm and 254 nm is irradiated to O 3 + H 2 O introduced through the ozone generator 23 and the H 2 O vaporizer 21 as follows. Excited oxygen (O * ) and hydrogen are supplied to the silicon nitride film 17 according to Schemes (6) to (7).
O3→ O2+O (6)O 3 → O 2 + O (6)
H2O → H+OH (7)H 2 O → H + OH (7)
상기 반응은 약 300℃의 저온에서 실시하게 된다. 즉, 300℃의 저온에서 O*와 수소(H)를 제1유전막(17)에 공급할 수 있다. 이때, 상기 수소 공급을 수소 플라즈마 방법을 통해 수행할 수 있다.The reaction is carried out at a low temperature of about 300 ℃. That is, O * and hydrogen (H) can be supplied to the first dielectric film 17 at a low temperature of 300 ° C. In this case, the hydrogen supply may be performed through a hydrogen plasma method.
이어, 상기 O*와 수소, 그리고 Si3N4와의 산화반응을 촉진시키기 위하여 600∼800℃의 저온에서 1분간의 급속 열처리공정을 수행하여 이산화실리콘막(18)을 형성한다.Subsequently, in order to promote the oxidation reaction between O * , hydrogen, and Si 3 N 4 , a rapid heat treatment process is performed at a low temperature of 600 to 800 ° C. for 1 minute to form the silicon dioxide film 18.
이와 같이, 본 발명은 종래의 800℃ 이상의 고온 및 30분 이상의 장시간 하에서의 습식 산화시와 동일한 두께의 Si3N4/SiO2유전막을 800℃ 이하의 저온에서 60초 이내의 단시간 내에 형성시킴으로써 커패시터의 누설전류 밀도를 저하시킬 수 있다.As described above, the present invention provides a method of forming a capacitor by forming a Si 3 N 4 / SiO 2 dielectric film having the same thickness as a conventional wet oxidation under a high temperature of 800 ° C or higher and a long time of 30 minutes or less within a short time within 60 seconds at a temperature of 800 ° C or lower. The leakage current density can be reduced.
이상 설명한 바와 같이 본 발명에 의한 NO 유전막 형성방법에 의하면, 오존이나 UV-O3의 사용에 의해 화학반응에 필요한 온도를 낮추고 이를 H2O 기화기와 결합시켜 저온에서의 여기산소(O*)와 수소를 동시에 공급함으로써, Si3N4산화를 저온화 및 단축시킬 수 있다. 그 결과, 고집적화의 고질적 문제점인 Si3N4산화시의 온도 및 시간에 따른 하지막들과의 열화 현상을 방지할 수 있을 뿐만아니라 커패시터의 누설전류 밀도를 저하시킬 수 있는 효과를 발휘한다.As described above, according to the method of forming the NO dielectric film according to the present invention, by using ozone or UV-O 3 , the temperature required for a chemical reaction is lowered and combined with an H 2 O vaporizer to excite oxygen (O * ) at low temperature. By simultaneously supplying hydrogen, the Si 3 N 4 oxidation can be lowered and shortened. As a result, it is possible to prevent deterioration of the underlying films with temperature and time during the Si 3 N 4 oxidation, which is a problem of high integration, and to reduce the leakage current density of the capacitor.
본 발명은 상기 실시예에 한정되지 않으며, 많은 변형이 본 발명의 기술적 사상내에서 당분야에서 통상의 지식을 가진 자에 의하여 가능함은 명백하다.The present invention is not limited to the above embodiments, and it is apparent that many modifications are possible by one of ordinary skill in the art within the technical idea of the present invention.
Claims (7)
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| KR1019950042346A KR100189979B1 (en) | 1995-11-20 | 1995-11-20 | Method for manufacturing capacitor of semiconductor device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100586540B1 (en) * | 1999-12-30 | 2006-06-07 | 주식회사 하이닉스반도체 | Method of forming capacitor of semiconductor device |
| KR100574476B1 (en) * | 1998-12-31 | 2006-08-23 | 주식회사 하이닉스반도체 | Method of forming barrier oxide layer of capacitor |
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1995
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100574476B1 (en) * | 1998-12-31 | 2006-08-23 | 주식회사 하이닉스반도체 | Method of forming barrier oxide layer of capacitor |
| KR100586540B1 (en) * | 1999-12-30 | 2006-06-07 | 주식회사 하이닉스반도체 | Method of forming capacitor of semiconductor device |
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