KR0167575B1 - Remote packet automatically filtering bridge logic circuit - Google Patents

Abstract

The present invention relates to a bridge logic circuit for automatically filtering packet exchange between two segments in a bridge environment of a 10BASE-T Ethernet network using address extraction, buffer switching and address lock tables.

In the prior art, the size of the memory is inevitably increased because the entire size of the Ethernet signal needs to be stored in the memory and then filtered by the central processing unit. As a result of the processing speed, the Ethernet signal from the Ethernet segment is used for the memory. After input to the main program and compared by the program, the final filtering is performed, which leads to a decrease in performance, and also manages the address table for nodes existing in the segment in software. There was a problem. In order to solve such a conventional problem, the present invention is capable of automatically filtering packets using an address extraction technique, a buffer switching technique, and an address lock table.

Description

Bridge logic circuitry to automatically filter remote packets

1 is a block diagram of a conventional bridge logic circuit.

2 is a block diagram of a bridge logic circuit according to the present invention.

3 is a signal timing chart in packet delivery from segment A to segment B,

(a) is the input remote packet.

(b) if the input packet is not a remote packet.

4 is a signal timing chart in packet forwarding from segment B to segment A,

(a) if the input packet is a remote packet.

(b) if the input packet is not a remote packet.

5 is a block diagram of an embodiment in case of delivering a packet from segment A to segment B according to the present invention.

6 is a block diagram of an embodiment in case of packet delivery from segment (B) to segment (A) according to the present invention.

* Explanation of symbols for main parts of the drawings

11: memory 12,16: buffer

13,15: Ethernet Controller 14: Central Processing Unit (CPU)

17, 21: signal buffer switching unit 18, 20: address extraction unit

22, 24: address comparison unit 23: address table

The present invention relates to a bridge logic circuit for automatically filtering packet exchange between two segments in a bridge environment of a 10BAST-T Ethernet network using an address extraction technique, a buffer switching technique, and an address lock table. Conventional bridge logic circuits have Ethernet controllers (2) and (4) and Ethernet controllers for receiving the Ethernet signals from the Ethernet segments (A) and (B) and converting them into a general data format, as shown in FIG. A memory (1) for storing data by (2) and (4), a central processing unit (3) for processing the stored data, and a main pyrom programmed to perform a series of operations of the central processing unit (3). (5) and address tables (6) and (7) necessary for filtering by the program of the main pyrom. The conventional apparatus configured as described above filters the address of the Ethernet signal by software, and its operation is as follows.

First, when an Ethernet signal is input from the Ethernet segment A, the Ethernet controller 2 stores in the memory 1 whether the input Ethernet packet is a remote packet or not. The Ethernet controller 2 then sends an interrupt signal for processing the data stored in the memory 1 to the central processing unit 3, and the central processing unit 3 receiving the signal receives the data from the memory 1; And then filter using the address table 6 for the nodes of the segment A according to the procedure programmed in the main pyramid 5.

Therefore, if the packet coming from the Ethernet segment A is a remote packet to go to the Ethernet segment B, the CPU 3 instructs the Ethernet controller 4 to export the packet as the segment B, Otherwise the packet is discarded. The operation transferred from the Ethernet segment (B) to the Ethernet segment (A) changes from the previous Ethernet controller (2) to the Ethernet controller (4), and only from the address table (6) to the address table (7). The rest is the same.

However, such a prior art first of all knows whether the Ethernet signal is a remote packet coming from the Ethernet segment due to the memory size. Therefore, all the Ethernet signals must be stored in memory and then filtered by the central processing unit. The memory size is bound to grow.

Second, due to the problem of processing speed, the Ethernet signal from the Ethernet segment is input to the main program through the memory, compared by the program, and the final filtering is performed, which takes a considerable amount of time and degrades performance.

Third, since the management of the address tables 6 and 7 for the nodes existing in the segment is also handled in software, there is a problem that the processing time is long and the performance is considerably degraded.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and is intended to automatically filter remote packets using an address extraction technique, a buffer switching technique, and an address fixing table to improve performance. . DETAILED DESCRIPTION OF THE INVENTION The present invention for achieving this object will be described in detail according to the accompanying drawings.

As shown in FIG. 2, the present invention receives an Ethernet signal from an Ethernet segment (A) or (B) and transmits the Ethernet signal to the Ethernet controllers (13) and (15). And a memory 11 for storing data by the Ethernet controllers 13 and 15, and a central processing unit 14 for processing data stored in the memory 11 according to the main program 19. Address extractors 18 and 20 for extracting addresses for automatically filtering remote packets from Ethernet signals, an address table 23 necessary for the node of the set segment A, and the address table ( 23) address comparators 22 and 24 which generate buffer control signals in comparison with data to control the operation of the signal buffer switching units 17 and 21, and the address comparators 22 and 24. Signal buffer leveling unit 17, 21 for controlling the operation of the Ethernet signal buffers 12, 16 according to the output state of 겻 is composed of

Referring to the operation and effect of the present invention configured as described above are as follows. First, when an Ethernet signal from the Ethernet segment A is input to the Ethernet signal buffer 12, the signal is applied to the Ethernet controller 13, and the Ethernet controller 13 converts the signal into a general data format. To store in the memory 11.

At this time, the Ethernet signal is applied from the Ethernet signal buffer 12 to the address extractor 18 to extract the address, input the address to the address comparator 22, and the address table 23 for the node of the segment A that was first set. By comparing whether or not the same address is present, the controller generates a buffer control signal and adjusts the signal buffer switching unit 17 to automatically filter the remote packet without processing the software program.

In this way, if the packet coming from the Ethernet segment A is a remote packet to go to the Ethernet segment B, the central processing unit 14 sends the remote packet stored in the memory 11 to the Ethernet controller 15 as the segment B. Instruct to export. Referring to the operation transferred from the Ethernet segment (B) to the Ethernet segment (A) as follows. When first inputted from the Ethernet segment B into the Ethernet signal buffer 16, this signal is passed to the Ethernet controller 15, and the Ethernet controller 15 converts the signal into a general data format so that the memory 11 Store in At this time, the Ethernet signal is passed from the Ethernet signal buffer 16 to the address extraction section 20, and the address is extracted and input to the address comparison section 24. Compared with the address table 23 for the node of the segment A set first, it is judged whether there is the same address, generates a buffer control signal, and adjusts the signal buffer switching unit 21 to automatically process the software program without processing. It will filter remote packets.

In this way, if the packet coming from the Ethernet segment B is a remote packet to go to the Ethernet segment A, the central processing unit 14 sends the remote packet stored in the memory 11 to the Ethernet controller 13 as the segment A. Instruct to export. Here, timing in the operation of transferring the remote packet from the segment A to the segment B is as shown in FIG. First, CRSIA is a signal indicating the presence of an Ethernet signal from the Ethernet segment A, and BUFENA represents an enable signal of the signal buffer switching unit 17. If the packet inputted by this BUFENA signal is not a remote packet, the buffer 12 is blocked during packet input to cancel the packet storing in the memory. CRS2A is a signal indicating the presence of an Ethernet signal after passing through the buffer 12, and RXC2A and RXD2A represent the clock and data of the Ethernet signal after passing through the buffer 12. The COMPA signal is an output that compares the address of the packet input on the Ethernet segment A with the address set on the address table 23, and outputs the signal buffer switching signal by combining the output signal with the CRSIA signal. When a remote packet enters a segment, the signal buffer 12 is opened and the packet is stored in the memory 11 for processing by the central processing unit 14, and the packet entering the Ethernet segment A is stored in the remote packet. Otherwise, the buffer 12 is blocked to cancel the process of storing the input packet in the memory 11, and a filtering operation is performed to extract only the remote packet at the original position. In addition, typing in the operation of transferring a remote packet from segment B to segment A is as shown in FIG. First, the CRSIB is a signal indicating the existence of the Ethernet signal from the Ethernet segment B, and the BUFENB represents the enable signal of the signal buffer switching unit 21. If the packet inputted by this BUFENB signal is not a remote packet, the buffer 16 is blocked during packet input, and the packet is canceled from being stored in the memory. CRS2B indicates the presence of an Ethernet signal after passing through the buffer 16, and RXC2B and RXD2B represent clock data of the Ethernet signal after passing through the buffer 16. The COMPB signal is an output that compares the address of the packet input on the Ethernet segment B with the address set on the address table 23, and outputs the signal buffer switching signal by combining the output signal with the CRSIB signal. When a remote packet enters a segment, the signal buffer 16 is opened and the packet is stored in the memory 11 for processing by the central processing unit 14, and the packet entering the Ethernet segment B is stored in the remote packet. Otherwise, the process of blocking the buffer 16 to cancel the process of storing the input packet in the memory 11 and performing a filtering operation to extract only the remote packet at the original position.

(A) and (b) of FIG. 3 are signal timing charts when transferring a packet from segment (A) to segment (B), and (a) shows a case where an input packet is a remote packet, and (b) shows an input packet. It shows the case that the packet is not a remote packet.

(A) and (b) of FIG. 4 are signal timing charts when transferring a packet from segment (B) to segment (A), and (a) indicates a case where an input packet is a remote packet, and (b) indicates an input packet. This case is not the remote packet.

The circuit configuration of the embodiment for generating the lower diagram shown in FIG. 3 is the same as FIG. 5, and the circuit configuration for the embodiment for generating the waveform diagram shown in FIG. 4 is the same as FIG. As described above, the present invention relates to a memory size. As a result, only remote packets among packets input from the Ethernet segment are automatically filtered and stored in the memory, thereby significantly reducing the memory size than general software filtering. Second, due to the problem of processing speed, the Ethernet signal from the Ethernet segment is stored in the memory and at the same time, it is controlled by the address comparator and controlled to be stored in the memory. It reduces the processing time of non-compliance, resulting in improved performance. Third, address table management for the nodes existing in the segment is also fixed in hardware, thereby reducing the processing time.

Claims (1)

Ethernet signal buffers 12 and 16 which receive Ethernet signals from the Ethernet segments A and B and transmit them to the Ethernet controllers 13 and 15, and the Ethernet controller 13 A memory 11 for storing data by (15), a central processing unit (14) for processing the data stored in the memory (11) according to the main program (19), and a remote packet in an Ethernet signal An address extractor 18, 20 for extracting an address for filtering with a buffer, an address table 23 necessary for a node of the set segment A, and a buffer control signal in comparison with the address table 23 data. And the Ethernet signal buffer 12 according to the output state of the address comparator 22, 24 and the address comparator 22, 24 for controlling the operation of the signal buffer switching unit 21 by Remote control, characterized in that consisting of the signal buffer switching unit (7), (21) for controlling the operation of the Bridge logic circuit for automatic filtering of remote packets.