KR0163309B1 - Tray for semiconductor package packing - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for semiconductor packaging, and in order to prevent unnecessary use of the tray and to reduce manufacturing costs, heat resistance in which a plurality of unit trays corresponding to one predetermined semiconductor package are mounted in a plurality of cavities formed on the main surface are stacked one by one. Provided is a semiconductor package packaging tray having a tray and a cover tray which is formed so as to correspond to a unit tray formed at an uppermost portion of the heat resistant tray, and a corresponding coupling portion corresponding to a semiconductor package in a cavity of the main surface of the unit tray. Therefore, the manufacturing cost can be lowered, and the top layer tray can be unified with the cover tray according to the present invention when packing the small-package unit stacked tray, thereby bringing about the simplicity and standardization of the process and providing the ease of work management. .

Description

Tray for packaging semiconductor package with cover tray

1 is a diagram briefly showing a stacking configuration of a tray including a cover tray according to the present invention.

2 is a view showing the front and back of the cover portion of the cover tray according to the present invention, respectively.

3 is a view showing a laminated cross-sectional configuration of the tray is applied to the cover tray according to the present invention 1420 QFP.

4 is a diagram showing a laminated cross-sectional structure of a tray in which a cover tray according to the present invention is applied to a 2828 QFP.

* Explanation of symbols for the main parts of the drawings

1: cover tray 2: unit tray

2A: Heat resistant tray (= laminated tray) 3: Cavity

4: QFP (semiconductor package) 5: Marker

6: window portion 7: marker portion back flat portion

8: periphery of window part

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tray for mounting a semiconductor package. More particularly, the present invention relates to a semiconductor package packaging tray for optimizing a price and protection of a product by providing a separate cover tray. will be.

As is well known in the art, a die having a good or defect repaired from a wafer through a predetermined semiconductor manufacturing process may be referred to as a final reliability. After the inspection, the package work is carried out. (Depending on the manufacturer, a reliability test may be performed in the package state.) Thus, the semiconductor package completed as a product is completed as a tray. It is mounted on and shipped. As such, it is easily understood that the tray as the packaging frame should be made to be securely protected so that the semiconductor package is delivered to the end-user as it is.

In this regard, techniques for providing a more reliable tray have been disclosed in US Pat. Nos. 5,103,976 (Title for integrated circuits with supporting ribs) and 5,226,226 (Title: Tube-shaped package for a semiconductor device method therefor). In addition, the present applicant has proposed an improvement technique through the domestic application number 91-24135 (name of the invention: a tray for packaging a semiconductor package). In more detail with respect to such a conventional tray is as follows.

For example, surface mount packages such as QFP or TSOP are individually seated in a lattice array cavity of a standardized tray and then supplied to a user. The specific reason for supplying the package in the tray is to prevent damage to the curved outer lead of the package and to allow the user to solder mount the package onto a printed circuit board (PCB). This is to give the ease of automatic operation, and to bake the package left for a long time at room temperature in the oven (hot oven) with the tray when dehumidifying at high temperature. Therefore, the tray for satisfying the above requirements should not have any change in appearance shape or dimensions even at a temperature of at least 125 ° C as well as at room temperature, and should be free of harmful gases, such as harmful to the human body, and should be light to handle.

The tray may be made of polyphenylene oxide, polyethylene sulphide, polyphenylene sulphide, or a heat resistant material having similar characteristics.

On the other hand, semiconductor manufacturers usually stack the trays in five or ten units when the finished product is packaged in heat-resistant trays and packed in small packages. At this time, the top tray containing the package will put another empty tray containing no semiconductor package at all, which is called a dummy tray. That is, the dummy tray has the same material and shape as the other trays and prevents departure and excessive shaking of each package. Generally, the heat-resistant material tray is about 2,000 won, although the price varies depending on the number of cavities or material types.

Here, the conventional packaging packaging method using a dummy tray has a structural problem that must bear the occurrence of excessive costs in its structure. Look at this in detail.

Take the well-known heat-resistant tray for 1420 QFP as an example, JEDEC standard specifies the number of cavities to 66, and in general, 10 trays containing packages are stacked in a small package unit packing, so a total of 660 small package units do. Therefore, a total of 11 heat-resistant trays, including 10 trays containing packages and one top layer dummy tray, cost 22,000 won, so the tray price of one package is 33.3 won.

As another example, the known 2828 QFP heat resistant tray is defined as, for example, 24 cavities in the JEDEC standard, and since the trays containing 5 small package unit package packages are stacked, There are a total of 120. Therefore, the total price of six trays, including five trays containing one package and one dummy tray, is 12,000 won, so the tray price of one package is 100 won.

As such, in the tray structure employing the conventional dummy tray, there has been a burden to always bear the cost problem of using the dummy tray, which acts as a factor to increase the cost of the product, which greatly increases the position of the manufacturer or the user. There has been an unnecessary cost problem.

The present inventors came to devise the present invention to solve the above problems.

An object of the present invention is to provide a tray for packaging a semiconductor package to lower the unit cost of the product as much as possible.

Another object of the present invention is to provide a tray for packaging a semiconductor package to prevent the use of unnecessary trays as much as possible.

A feature of the present invention is a heat resistant tray formed by stacking a plurality of unit trays corresponding to one predetermined semiconductor package in a cavity formed on a main surface and mounting a plurality of semiconductor packages in such a manner, and formed at the top of the heat resistant tray. A cover tray is formed to be coupled in correspondence with a unit tray and the corresponding coupling portion is formed to contact the main surface of the unit tray in correspondence with a semiconductor package in a cavity, and a semiconductor having a predetermined mark portion is formed at the center of the outer upper surface of the cover tray. It is characterized in that the package packaging tray.

The cover tray according to the present invention is to be used in place of a dummy heat resistant tray of a top layer of a small packing packing unit stacked heat resistant tray in a heat resistant tray used when supplying a surface mount package such as a QFP or TSOP to a user.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 shows a schematic stack configuration of a semiconductor package packaging tray including a cover tray according to the present invention. The structure is heat-resistant in which the predetermined | prescribed semiconductor package 4 is correspondingly mounted one by one in the cavity 3 formed on the main surface, and the unit tray 2 which mounts several semiconductor packages 4 in this way is laminated | stacked in several pieces. The semiconductor package 4 in which the tray 2A and the unit tray 2 formed at the top of the heat resistant tray 2A are coupled correspondingly, and the corresponding coupling portion is in the cavity 3 of the main surface of the unit tray 2. The cover tray 1 is formed to be in contact with the corresponding. Referring to the above configuration, the cover tray (B) is placed in a lattice array cavity 3 of the heat resistant tray 2 in a state in which the QFP 4 as a semiconductor package is seated and each heat resistant tray 2 is laminated as shown in 2A. It will be understood that 1) covers the uppermost layer heat resistant tray 20. The cover tray 1 does not have a function of storing and storing a package, but is provided with a cavity 3 to be stacked on an upper portion of the heat resistant tray 2A containing the package so that the package between moving and handling is separated out of the cavity 3. It is to prevent the change of position due to excessive or excessive shaking. Therefore, the lid tray 1 does not have to have the same shape or arrangement of the cavity 3 as the heat resistant tray 2A, and the high temperature bake like the heat resistant tray 2A for the purpose of dehumidifying moisture absorbed into the package. It does not have to be made of expensive heat resistant material.

And as shown in the configuration of Figure 1 it is preferable that both ends of the cover tray according to the present invention is formed with a projection for ease of operation.

FIG. 2A is a top view of the cover tray 1 of FIG. 1 and FIG. 2B is a view showing a bottom surface of the cover tray 1 of FIG.

In FIG. 2 (a), a flat mark portion 5 having a predetermined size is graded at the center of the upper surface of the cover tray so that the package related information contained in the stacked heat resistant trays can be recorded or a sticker can be attached, if necessary. In the region, a window 6 having a predetermined size and arrangement was provided so that the package 4 contained in the lower layer heat resistant tray 2A could be easily identified.

The cover tray outer frame shape, thickness, width and length are made the same as those of the heat resistant tray 2A containing the package.

In FIG. 2 (b), the marking part rear flat part 7 and the window peripheral flat part 8 are to prevent the package from being separated or excessively shaken, which will be described in more detail with reference to FIG. 3.

3 is a portion in which the lid tray 1 of the present invention is laminated on the uppermost heat resistant tray after stacking the heat resistant trays 2A with the 1420 QFP 4A seated on each cavity 3 of the heat resistant tray 2A. As a side view, the package seated in the cavity 3 can be identified through the window portion 6 of the cover tray 1, and the surrounding flat portion 8 and the marking portion rear flat portion of the window portion 6 can be identified. The horizontal plane of (7) is matched equally. The distance between the upper surface of the 1420 QFP 4A and the flat portion located under the flat portions 7 and 8 is within the range of 0 to 0.4 mm. If the distance is excessively large, even if the cover tray (1) is used, care should be taken because package damage is expected due to severe shaking between movement and handling. The 1420 QFP 4A can vary in package thickness depending on the intended use. Even in this case, the cover tray 1 does not need to be manufactured separately for each package thickness. In other words, only the depth of the cavity 3 of the heat resistant tray is changed, and the distance between the package upper surface of the cavity 3 and the flat portions 7 and 8 may be kept within 0 to 0.4 mm.

For example, if the depth of the cavity 3 is set to 2.0 mm and the gap between the upper surface of the package and the flat portion is 0.2 mm, for example, a 1420 QFP with a thickness of 2.65 mm, the cavity depth is 1.45 mm to apply a 1420 QFP with a thickness of 2.1 mm. Just change it to Similarly, for a 1420 QFP with a thickness of 1.0mm, you can change the cavity depth to 1.45mm.

The heat resistant tray 2A does not have to be manufactured separately for each package thickness in order to use the cover tray 1 according to the present invention. If not only the package thickness but also the outer lead shoulder length is different, the cavity specification inside the tray must be changed. Therefore, even if the cover tray is not intended for use, the heat resistant tray must be manufactured separately. Therefore, there is no burden on the production of new heat-resistant tray according to the use of the cover tray 1 of the present invention.

FIG. 4 is a partial side view showing that the cover tray 1 of the present invention illustrated in FIG. 3 is applied to the heat resistant tray 2A of the 2828 QFP 4B which is much larger than the cross-sectional area of the 1420 QFP as another embodiment. to be. In FIG. 4, the upper part of the 2828 QFP heat resistant tray has no intervening shape in the flat parts 7 and 8, and the distance between the upper parts of the 2828 QFP 4B and the flat parts 7 and 8 is maintained within 0 to 0.4 mm. If the thicknesses of the 2828 QFPs 4B are also different, only the cavity depth may be adjusted as described in the example of the 1420 QFP.

Meanwhile, the cover tray 1 according to the present invention may be made of polystyrene or a material having similar properties, which does not require heat resistance guarantee, thereby greatly reducing the manufacturing cost due to cost, and not only appearance but also black in order to easily distinguish it from the heat resistant tray. Differentiate with various other colors.

When using the cover tray 1 according to the invention the packaging operation is as follows. The cover tray 1 accommodates not only the 1420 QFP or 2828 QFP cited in this embodiment, but also other QFP, TSOP and other surface mount packages defined by EIAJ or JEDEC. Applicable to heat resistant trays. After stacking five or ten heat-resistant trays containing packages that have been tested for electrical properties in small packages and finally stacking cover trays on top of the stacked trays, ensure that the entire stacked tray is not separated or moved between handling and handling. Tie the entire tray and secure it in place. At this time, the string used is preferably used as a solvent-resistant material that can maintain a sufficient function even at a temperature that the heat resistant tray can withstand. After that, put it in an anti-static bag and vacuum it to remove moisture completely or inject it with nitrogen (N ₂ ) gas and finally seal it, and then supply it to a user in a standardized box.

Looking at the effect of using the cover tray according to the present invention in detail. The packaging tray for a semiconductor package having a cover tray according to the present invention configured as described above has a polystyrene that can withstand a heat of about 50 ° C. or a similar material. Production cost can be reduced to the level of / 4.

Therefore, in the case of the 1420 QFP using the above-mentioned Xedek standard heat resistant tray, the price of a tray occupied by one package was 33.3 won, but when the cover tray of the present invention was replaced by a dummy tray, it was 31.1 won. That is, 2.2 won per package can be reduced. If 1420 QFPs are produced per month, the total savings will be 22 million won, with an annual unit of 264 million won.

In the case of the 2828 QFP, the cover tray according to the present invention saves 12.5 won per package. Therefore, if the monthly production of 5 million, the annual savings of about 750 million won can be achieved. In addition, the amount of saving effect increases proportionally as the QFP production increases and the number of package types applied increases.

On the other hand, the cover tray 1 according to the present invention is the specification of all the packages using the QFP, TSOP or tray specified in the above EIAJ or JEDEC, that is, EMC molding cross-sectional area, thickness, lead It can be easily understood by those skilled in the art that it can be applied interchangeably with only one type of cover tray for each package group regardless of the distance between each package, the mounting area, and the number of leads.

Therefore, according to the present invention, the manufacturing cost can be reduced by eliminating unnecessary trays in the semiconductor package packaging tray, and the top layer tray can be unified with the cover tray according to the present invention when packing a small packing unit stacked tray. Simplification and standardization can be brought about, and work management can be easily given.

Claims (3)

A semiconductor package packaging tray comprising: a heat resistant tray formed by stacking a plurality of unit trays corresponding to one semiconductor package in a plurality of cavities formed on a main surface thereof, and corresponding to a unit tray formed at the top of the heat resistant trays; And a cover tray formed so that the corresponding coupling portion is in contact with the semiconductor package in the cavity of the main surface of the unit tray, and a predetermined mark portion is formed at the center of the outer upper surface portion of the cover tray. Packing tray. The semiconductor package packaging tray according to claim 1, wherein the cavity is arranged in plural in a matrix form on the main surface. The tray for packaging a semiconductor package according to claim 1 or 2, wherein each corresponding coupling part of the cover tray is provided with a window part for sensing whether the cavity is used from the outside.