KR0144232B1 - Formation method of fine pattern in semiconductor device - Google Patents

Formation method of fine pattern in semiconductor device

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Publication number
KR0144232B1
KR0144232B1 KR1019950011246A KR19950011246A KR0144232B1 KR 0144232 B1 KR0144232 B1 KR 0144232B1 KR 1019950011246 A KR1019950011246 A KR 1019950011246A KR 19950011246 A KR19950011246 A KR 19950011246A KR 0144232 B1 KR0144232 B1 KR 0144232B1
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KR
South Korea
Prior art keywords
pattern
forming
fine
film
semiconductor device
Prior art date
Application number
KR1019950011246A
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Korean (ko)
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KR960042911A (en
Inventor
최용근
Original Assignee
김주용
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업주식회사 filed Critical 김주용
Priority to KR1019950011246A priority Critical patent/KR0144232B1/en
Publication of KR960042911A publication Critical patent/KR960042911A/en
Application granted granted Critical
Publication of KR0144232B1 publication Critical patent/KR0144232B1/en

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0035—Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

Abstract

1. 청구 범위에 기재된 발명이 속한 기술 분야1. The technical field to which the invention described in the claims belongs

반도체 소자 제조 방법.Semiconductor device manufacturing method.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

미세 패턴을 형성하는 데 있어서, 패턴이 초미세화 됨에 따라 주변 고집적 소자의 단차 및 노광시의 난반사 등에 의해 불량 패턴이 발생할 확률이 소자의 수율 및 특성에 악영향을 미친다는 문제점을 해결하고자 함.In forming a fine pattern, it is intended to solve the problem that, as the pattern becomes very fine, the probability of a defective pattern due to the step difference of the surrounding high density device and the diffuse reflection upon exposure adversely affects the yield and characteristics of the device.

3. 발명의 해결 방법의 요지3. Summary of the Solution of the Invention

미세 패턴을 형성하기 위하여 1차 패턴 및 그보다 폭이 좁은 2차 패턴을 차례로 형성한 후 블랭킷 식각을 실시하므로써, 패턴이 불량화되는 것을 방지하여 양호한 특성을 가진 미세 패턴을 형성하고자 함.In order to form a fine pattern, the first pattern and the second pattern having a narrower width are sequentially formed, and then blanket etching is performed to prevent the pattern from being deteriorated, thereby forming a fine pattern having good characteristics.

4. 발명의 중요한 용도4. Important uses of the invention

반도체 소자의 미세 패턴 형성에 이용됨.Used to form fine patterns of semiconductor devices.

Description

반도체 소자의 미세 패턴 형성 방법Method of forming fine pattern of semiconductor device

제 1a도 내지 제 1c도는 본 발명의 미세 패턴 형성 방법에 따른 공정도.1a to 1c is a process chart according to the method for forming a fine pattern of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 반도체 기판 2 : 하부층1 semiconductor substrate 2 lower layer

3 : BPSG막 4 : 1차 금속 패턴3: BPSG film 4: Primary metal pattern

4' : 미세 금속 패턴 5 : 2차 금속 패턴4 ': fine metal pattern 5: secondary metal pattern

6 : 포토레지스트6: photoresist

본 발명은 반도체 소자 제조 방법에 관한 것으로서, 특히 반도체 소자의 미세 패턴을 형성하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a fine pattern of a semiconductor device.

반도체 소자의 미세 패턴을 형성하는데 있어서, 패턴이 초미세화됨에 따라 주변 고집적 소자의 단차 및 노광시의 난반사 등에 의해 불량 패턴이 발생할 확률이 높아 소자의 수율 및 특성에 악영향을 미친다는 문제점을 가지고 있었다.In forming a fine pattern of a semiconductor device, as the pattern becomes very fine, there is a problem that a bad pattern is likely to occur due to the step difference of the peripheral high integration device and the diffuse reflection upon exposure, which adversely affects the yield and characteristics of the device.

따라서 전술한 문제점을 보완하기 위해 안출된 본 발명은 미세 패턴을 형성하기 위하여, 원하는 폭 보다 약간 넓은 1차 패턴을 형성하고 그 위에 폭이 좁은 2차 패턴을 형성한 다음 블랭킷 식각을 실시하므로써, 양호한 특성을 가진 미세 패턴을 형성하는 방법을 제공하는 것을 목적으로 한다.Therefore, the present invention devised to solve the above-described problems is good by forming a primary pattern slightly wider than a desired width, forming a narrow secondary pattern thereon and then performing blanket etching to form a fine pattern. An object of the present invention is to provide a method of forming a fine pattern having characteristics.

본 발명에 따른 반도체 소자의 미세 패턴 형성 방법은, 반도체 기판에 형성된 하부층 및 평탄화막이 형성된 구조 상에 제1 패턴 형성용 막을 증착하고 제1 패턴을 형성하는 단계와, 전체 구조 상부에 소정의 물질로 제2 패턴 형성용 막을 상기 제1 패턴 형성용 막보다 얇게 증착하는 단계와, 상기 제1 패턴상에 상기 제1 패턴 보다 폭이 좁은 제2 패턴을 형성하기 위한 포토레지스트 패턴을 형성하는 단계와, 상기 포토레지스트 패턴을 식각 배리어로 이용하여 제2 패턴 형성용 막을 식각하여 제2 패턴을 형성하는 단계 및, 잔류 포토레지스트를 제거하고 블랭킷 식각을 실시하는 단계를 포함하는 것을 특징으로 한다.The method of forming a fine pattern of a semiconductor device according to the present invention includes the steps of depositing a first pattern forming film and forming a first pattern on a structure on which a lower layer and a planarization film formed on a semiconductor substrate are formed, Depositing a second pattern forming film thinner than the first pattern forming film, forming a photoresist pattern on the first pattern to form a second pattern having a narrower width than the first pattern; And etching the second pattern forming film by using the photoresist pattern as an etching barrier to form a second pattern, and removing residual photoresist and performing blanket etching.

이제 본 발명의 한 실시예로서 미세 금속 패턴 형성 방법에 대하여 첨부 도면을 참조하여 보다 상세하게 설명하게 된다. 먼저 제1a도에 도시된 바와 같이, 반도체 기판(1) 상에 하부층(2) 및 평탄화용 보로-포스포러스-실리케이티드-글래스(BPSG)막(3)이 형성되어 있는 구조 상에 티타늄(Ti)- 티타늄 나이트라이드(TiN)-알루미늄(A1+1%Si)으로 삼중층을 이루는 1차 금속 패턴(4)을 원하는 폭 보다 소정의 폭 만큼 넓게 형성한다. 다음으로 제 1b도에 도시된 바와 같이, 실리콘이 첨가된 알루미늄(A1+1%Si)으로 2차 금속막을 1차 금속선(4)의 50% 이내의 두께로 증착한 후, 2차 금속선(5)의 폭이 1차 금속 패턴(4) 폭의 60% 이내가 되도록 포토레지스트 패턴(6)을 형성한다. 그리고 상기 포토레지스트 패턴(6)을 식각 배리어로 이용하여 2차 금속막을 식각해서 2차 금속 패턴(5)을 형성한다. 다음으로 제 1c도에 도시된 바와 같이, 잔류 포토레지스트를 제거한 다음, 블랭킷 식각을 실시하게 되면, 2차 금속 패턴이 식각되어 제거되면서 1차 금속 패턴이 2차 금속 패턴의 폭으로 형성되어 미세 금속 패턴(4')이 이루어진다. 또한 전술한 바와 같은 제조 방법으로 폴리실리콘이나 산화막의 미세 패턴을 형성하는 것도 가능하다.Now, as an embodiment of the present invention, a method of forming a fine metal pattern will be described in more detail with reference to the accompanying drawings. First, as shown in FIG. 1A, the lower layer 2 and the planarization boro-phosphorus-silicated-glass (BPSG) film 3 are formed on the semiconductor substrate 1. The primary metal pattern 4, which forms a triple layer of Ti) -titanium nitride (TiN) -aluminum (A1 + 1% Si), is formed wider by a predetermined width than the desired width. Next, as shown in FIG. 1B, the secondary metal film is deposited with silicon (A1 + 1% Si) added with silicon to a thickness within 50% of the primary metal wire 4, and then the secondary metal wire 5 The photoresist pattern 6 is formed such that the width of the?) Is within 60% of the width of the primary metal pattern 4. The secondary metal film is etched using the photoresist pattern 6 as an etching barrier to form the secondary metal pattern 5. Next, as shown in FIG. 1C, when the residual photoresist is removed, and the blanket is etched, the secondary metal pattern is etched and removed, and the primary metal pattern is formed to the width of the secondary metal pattern to form a fine metal. The pattern 4 'is made. It is also possible to form a fine pattern of polysilicon or an oxide film by the manufacturing method as described above.

전술한 바와 같은 본 발명에 따라, 1차 패턴 및 그 위에 폭이 좁은 2차 패턴을 차례로 형성하고 블랭킷 식각을 실시하므로써, 패턴 불량을 방지하여 양호한 특성을 가진 미세 패턴을 형성할 수 있다.According to the present invention as described above, by forming the primary pattern and the narrow secondary pattern thereon in turn and performing a blanket etching, it is possible to prevent a pattern defect to form a fine pattern having good characteristics.

Claims (7)

반도체 소자의 미세 패턴을 형성하는 방법에 있어서, 반도체 기판에 형성된 하부층 및 평탄화막이 형성된 구조 상에 제1 패턴 형성용 막을 증착하고 제1 패턴을 형성하는 단계와, 전체 구조 상부에 소정의 물질로 제2 패턴 형성용 막을 상기 제1 패턴 형성용 막보다 얇게 증착하는 단계와, 상기 제1 패턴상에 상기 제1 패턴 보다 폭이 좁은 제2 패턴을 형성하기 위한 포토레지스트 패턴을 형성하는 단계와, 상기 포토레지스트 패턴을 식각 배리어로 이용하여 제2 패턴 형성용 막을 식각하여 제2 패턴을 형성하는 단계 및, 잔류 포토레지스트를 제거하고 블랭킷 식각을 실시하는 단계를 포함해서 이루어진 미세 패턴 형성 방법.A method of forming a fine pattern of a semiconductor device, comprising: depositing a first pattern forming film and forming a first pattern on a structure on which a lower layer and a planarization film formed on a semiconductor substrate are formed; Depositing a second pattern forming film thinner than the first pattern forming film, forming a photoresist pattern on the first pattern to form a second pattern having a narrower width than the first pattern, and Forming a second pattern by etching the film for forming the second pattern using the photoresist pattern as an etching barrier; and removing the residual photoresist and performing blanket etching. 제 1 항에 있어서, 상기 제1 패턴과 제2 패턴 형성 물질은 금속인 것을 특징으로 하는 미세 패턴 형성 방법.The method of claim 1, wherein the first pattern and the second pattern forming material are metal. 제 2 항에 있어서, 상기 제1 패턴 형성 물질은 티타늄-티타늄 나이트라이드- 알루미늄으로 이루어진 삼중막의 금속이고 상기 제2 패턴 형성 물질은 알루미늄인 것을 특징으로 하는 미세 패턴 형성 방법.The method of claim 2, wherein the first pattern forming material is a metal of a triple layer made of titanium-titanium nitride-aluminum, and the second pattern forming material is aluminum. 제 1 항에 있어서, 상기 제1 패턴과 제2 패턴 형성 물질은 폴리실리콘인 것을 특징으로 하는 미세 패턴 형성 방법.The method of claim 1, wherein the first pattern and the second pattern forming material are polysilicon. 제 1항에 있어서, 상기 제1 패턴과 제2 패턴 형성 물질은 산화막인 것을 특징으로 하는 미세 패턴 형성 방법.The method of claim 1, wherein the first pattern and the second pattern forming material are oxide films. 제 1항 내지 제5항 중 어느 한 항에 있어서, 상기 제2 패턴 형성용 막의 두께는 상기 제1 패턴 형성용 막의 두께의 약 50% 이내인 것을 특징으로 하는 미세 패턴 형성 방법.The method of forming a fine pattern according to any one of claims 1 to 5, wherein the thickness of the second pattern forming film is within about 50% of the thickness of the first pattern forming film. 제 6 항에 있어서, 상기 제2 패턴의 폭은 상기 제1 패턴의 폭의 약 60% 이내인 것을 특징으로 하는 미세 패턴 형성 방법.The method of claim 6, wherein the width of the second pattern is within about 60% of the width of the first pattern.
KR1019950011246A 1995-05-09 1995-05-09 Formation method of fine pattern in semiconductor device KR0144232B1 (en)

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KR1019950011246A KR0144232B1 (en) 1995-05-09 1995-05-09 Formation method of fine pattern in semiconductor device

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KR0144232B1 true KR0144232B1 (en) 1998-08-17

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KR100827534B1 (en) * 2006-12-28 2008-05-06 주식회사 하이닉스반도체 Semiconductor device and method for forming fine pattern of the same

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