KR0138650B1 - Fabrication method of high frequency bipolar junotion transistor - Google Patents

Abstract

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Description

Method of manufacturing multilayer high frequency bipolar junction transistor

(A)-(g) of FIG. 1 is a vertical structure diagram for demonstrating the bipolar junction transistor manufacturing method of this invention.

* Explanation of symbols for main parts of the drawings

1: silicon substrate 2, 5: oxide film

3: monocrystalline silicon layer 4, 7: polycrystalline silicon layer

6: single crystal Si _x Ge _1-x layer 8: insulating film

9: metal terminal

The present invention relates to a method for manufacturing a laminated high frequency bipolar junction transistor (hereinafter abbreviated as BJT). In particular, a Si _x Ge _1-x layer having a smaller bandwidth than silicon (Si) is used as a base to improve current amplification of BJT. The present invention relates to a method for manufacturing a laminated high frequency BJT which can simplify the manufacturing process since the process after forming the base and the emitter is simultaneously aligned as a laminated structure.

Conventionally, a high frequency BJT was manufactured by forming an isolation film using LOCOS (Local Oxidation of Silicon) and contacting a single crystal silicon layer and a polycrystalline conductive layer.

However, this conventional method forms a trench when forming side wall contacts to reduce leakage current in an isolation layer or active device, and thus the substrate is mechanically etched by etching a certain length of silicon. At the same time, the manufacturing process was complicated and there was a disadvantage.

The present invention can prevent mechanical damage by forming the isolation layer and sidewalls between the elements in order to solve such a conventional disadvantage, by performing the following process, in particular, because the laminated structure is arranged by itself, the process is simplified and instead of silicon It is an object of the present invention to provide a method for manufacturing a laminated high frequency BJT having a high current amplification factor (hfe) by using a Si _x Ge _1-x layer as a base. Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. Same as

X1 조건에서 순차적으로 성장시킨 다음 단결정 Si_xGe_1-x층(6)위에 다결정 실리콘(7)을 성장시키고, 그 위에 절연막(8)을 화학증착시킨 후 사진 식각법에 의해 금속단자(9)를 형성시키는 공정으로 이루어진 것이다.As shown in Fig. 1A-G, the present invention selectively deposits a thin oxide film 2 on the silicon substrate 1 and then deposits a single crystal silicon layer on the silicon substrate 1 without the oxide film 2. (3) is grown between the device isolation layer and the polycrystalline silicon layer 4 on which sidewalls of the base-collector are to be formed during heat treatment to form a polycrystalline silicon layer 4 thereon and then diffuse the buried layer. The oxide film 5 is formed by the LOCOS method, and the single crystal Si _x Ge _1-x layer 6 is zero between the polycrystalline silicon layers 4.

After sequential growth under X1 condition, polycrystalline silicon (7) is grown on the single crystal Si _x Ge _1-x layer (6), and an insulating film (8) is chemically deposited thereon, followed by metal etching (9). It is made of a process for forming.

Reference numeral 20 is an oxide film.

When the laminated high frequency BJT is manufactured in this way, the isolation and sidewalls between the elements are formed without using grooves as in the prior art, thereby preventing mechanical damage during the manufacturing process and simplifying the process. In particular, by using a Si _x Ge _1-x layer instead of silicon as a base, it is possible to further improve the current amplification rate of the laminated high frequency BJT, thereby reducing the leakage current.

Claims (1)

Selectively depositing a thin oxide film (2) on the silicon substrate (1), and then growing a single crystal silicon layer (3) on the silicon substrate (1) without the oxide film (2), and growing the single crystal on the silicon substrate (1). Forming a polycrystalline silicon layer 4 on the silicon layer 3, and forming a polycrystalline silicon layer 4 on the single crystal silicon layer 3, and then heat-treating the device isolation layer and base during the heat treatment to diffuse the buried layer. Forming the oxide film 5 by the usual LOCOS method between the polycrystalline silicon layer 4 on which the sidewall of the collector is to be formed, and forming the oxide film 5 between the polycrystalline silicon layer 4, and then The single crystal Si _x Ge _1-x layer is interposed between layers 4

Sequentially growing under X1 conditions, growing polycrystalline silicon (7) on the sequentially grown single crystal Si _x Ge _1-x layer (6), and growing on the single crystal Si _x Ge _1-x layer (6) A multilayer high frequency junction transistor comprising chemically depositing an insulating film 8 on the grown polycrystalline silicon layer 7 and forming a metal terminal 9 by etching the chemically deposited insulating film 8 by photolithography. Manufacturing method.