KR100325446B1 - Method for manufacturing bipolar junction transistor - Google Patents

Abstract

PURPOSE: A method for manufacturing a BJT(Bipolar Junction Transistor) is provided to improve cut-off frequency and to simplify manufacturing processes by using a base with ultra thin width. CONSTITUTION: After forming an SOI(Silicon On Insulator) layer(14) on an oxide layer(12), an insulating layer(16) is formed on the SOI layer. After depositing the first base polysilicon(18), P+ ions are doped into the first base polysilicon(18). The SOI layer(14) is partially exposed by selectively etching the first base polysilicon(18). After forming a photoresist pattern(22) to cover an emitter region, a liquid-phase dielectric film(24) is deposited on the exposed first base polysilicon pattern(18A) and SOI layer(14). After removing the photoresist pattern(22), P- ions are implanted. The second base polysilicon is formed at both sidewalls of the first base polysilicon pattern(18A). By implanting N+ ions into the exposed SOI layer(14), an emitter and a collector are formed.

Description

Method of manufacturing bipolar junction transistor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a silicon on insulator (SOI) substrate bipolar junction transistor.

In general, a bipolar junction transistor refers to an electronic device having two PN junctions in close proximity. This device has three electrodes consisting of an emitter, a base and a collector. In particular, bipolar junction transistors used in Bi-CMOS, which are proposed to compensate for the speed of CMOS, have advantages such as high speed and low power. In order to manufacture a bipolar junction transistor used in the Bi-CMOS, three electrode regions must be formed, and each region must be accompanied by a photo mask process. Therefore, there is a problem that a complicated process is required to manufacture a bipolar junction transistor.

In addition, since the base width cannot be adjusted thinly with high precision, a problem arises in that the most important characteristic of the bipolar junction transistor cannot increase the cut off frequency.

Accordingly, an object of the present invention is to provide a method for manufacturing a bipolar junction transistor, which is not only capable of increasing the cutoff frequency but also having a simple process by forming a very thin base. .

In order to achieve the above object and other objects, the present invention comprises the steps of forming a silicon on insulator (SOI) film on the oxide film on the semiconductor substrate and doping N ions;

Forming an insulating film on the SOI film;

Depositing a first base polysilicon on the insulating film;

Doping P ⁺ ions in the first tape polysilicon and forming a photoresist pattern;

Selectively etching the first base polysilicon in the form of the photoresist pattern to expose a predetermined portion of the SOI film and then removing the photoresist pattern; Applying a photoresist film on the base polysilicon and SOI film so as to mask a portion to be used as an emitter;

Depositing a liquid dielectric on the first base polysilicon and the SOI film on which the photoresist pattern is not formed;

Removing the photoresist pattern;

Implanting P ⁻ ions into portions of the first base polysilicon and the SOI film exposed by removing the photoresist pattern;

Selectively epitaxially growing portions of the base silicon and the SOI film where the liquid dielectric is not formed and then P ⁺ doped to form a blanket etch to form second base polysilicon on the sidewalls of the first base polysilicon;

Implanting N ⁺ ions into the SOI film except for portions covered with the first and second base polysilicon to form emitters and collectors; And

It provides a method of manufacturing a bipolar junction transistor comprising the step of annealing the resulting semiconductor substrate.

In the present invention described above, the insulating film deposited on the SOI film is preferably a nitride film having a thickness of 300 to 500 GPa or an LPCVD oxide film having a thickness of 500 to 1500 GPa.

In addition, the laminated liquid dielectric has a thickness of 500 to 1000 GPa, and the width of the lower portion of the second base polysilicon is preferably 0.2 to 0.7 mu m.

According to the present invention, it is possible to simplify the process by reducing the ion implantation mask process by using a liquid dielectric, and to control the thin base width by forming the second base polysilicon on the sidewall of the first base polysilicon. In this way, a bipolar junction transistor having a high cutoff frequency can be manufactured.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 (a) to (e) are views for explaining a method of manufacturing a bipolar junction transistor according to an embodiment of the present invention in order of process.

First, as shown in FIG. 1A, an oxide film 12 is formed on a semiconductor substrate 10, and then an SOI film 14 is formed thereon. Thereafter, the SOI film 14 is doped with N ⁻ ions. Subsequently, an insulating film 16 is formed on the SOI film 14, preferably a nitride film having a thickness of 300 to 500 GPa or an LPCVD oxide film having a thickness of 500 to 1500 GPa is formed, and then the first base polysilicon 18 is formed on the insulating film 16. To form. Thereafter, the first base polysilicon 18 is doped with P ⁺ ions, and the photosensitive film pattern 20 is formed so that only the portion to be used as the base is covered. Then, the first base polysilicon 18 and the insulating film 16 are selectively etched to expose the surface of the SOI film 14 in the form of a photoresist pattern, and then the photoresist pattern 20 is removed.

Then, as shown in FIG. 1B, a photoresist film 22 is applied on a portion of the first base polysilicon 18A and a portion of the SOI to be used as an emitter, and the photoresist film 22 is not applied. The liquid dielectric 24 is preferably laminated to a thickness of 500 to 1000 kPa on the remaining portion of the first base polysilicon 18A and the remaining portion of the SOI film 14 to be used as the collector. Then, as shown in FIG. 1C, the photoresist film 22 is removed, and P ⁻ ions are implanted into the portion to be used as an emitter of the SOI film 14 thus exposed.

Thereafter, a portion of the SOI film 14 and the portion of the first base polysilicon 18A that are not hit by the liquid dielectric 24 are selectively epitaxially grown by P ⁺ doping, followed by a blanket etch to perform the first etching. As shown in Fig. 3D, a second base polysilicon 26 is formed in the side wall portion facing the portion to be used as the emitter of the first base polysilicon 18A.

At this time, the width of the lower portion in contact with the SOI film 14 of the second base polysilicon formed is preferably 0.2 to 0.7 mu m.

Then, when N ⁺ ions are implanted into the exposed portion of the SOI film 14 and the portion covered with the liquid dielectric 24, the portion covered with the liquid dielectric 24 penetrates the liquid dielectric 24 and is ionized. Inject. This forms the emitter 28 and the collector 30. Then, annealing is performed to achieve formation of an NPN type bipolar junction transistor as shown in FIG.

As described in detail above, according to the present embodiment, the base width can be made very thin by reducing the ion implantation mask process using the liquid dielectric and forming the second base polysilicon on the sidewall of the first base polysilicon. . Thus, the manufacturing process is simplified and a bipolar junction transistor having a high cutoff frequency can be manufactured.

In addition, this invention is not limited to the said Example. For example, in the above embodiment, a case of manufacturing an NPN bipolar junction transistor has been described, but the method of the present invention can be applied to the manufacture of a PNP type bipolar junction transistor.

In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.

1 (a) to (e) are diagrams for explaining a method of manufacturing a bipolar junction transistor according to a preferred embodiment of the present invention in order of process.

* Description of the symbols for the main parts of the drawings *

10 semiconductor substrate 2: oxide film

14 SOI film 16 insulating film

18,18A: First base polysilicon 20,22: Photosensitive film

24 liquid dielectric 26 second base polysilicon

28 emitter 30 collector

Claims (4)

Forming a silicon on insulator (SOI) film on the oxide film on the semiconductor substrate and doping N ⁻ ions; Forming an insulating film on the SOI film; Depositing a first base polysilicon on the insulating film; Doping P ⁺ ions in the first base polysilicon and forming a photoresist pattern; Selectively etching the first base polysilicon in the form of the photoresist pattern to expose a predetermined portion of the SOI film and then removing the photoresist pattern; Applying a photoresist film on the base polysilicon and SOI film so as to mask a portion to be used as an emitter; Depositing a liquid dielectric on the first base polysilicon and the SOI on which the photoresist pattern is not formed; Removing the photoresist pattern; Implanting P-ion into a portion of the first base polysilicon and the SOI film exposed by removing the photoresist pattern; Forming a second polysilicon base and the base silicone SOl film portion not provided with the dielectric liquid automatically to the first side wall of polysilicon base value by performing a blanket after selective epitaxial growth that P ⁺ doping; Implanting N ⁺ ions into the SOI film except for the portion covered with the first and second base polysilicon; And And annealing the resulting semiconductor substrate. The method of manufacturing a bipolar junction transistor according to claim 1, wherein the insulating film deposited on the SOI film is a nitride film having a thickness of 300 to 500 GPa or an LPCVD oxide film having a thickness of 500 to 1500 GPa. The method of manufacturing a bipolar junction transistor according to claim 1, wherein the laminated liquid dielectric has a thickness of 500 to 1000 mW. The method of claim 1, wherein the width of the lower portion of the second base polysilicon is 0.2 to 0.7 mu m.