KR0138324B1 - Manufacture of element isolation - Google Patents

Abstract

A device isolation film formation method using the SEPOX method is described. This is a first step of forming a pad oxide film on a semiconductor substrate, a second step of forming an oxide buffer layer on the pad oxide film, a third step of forming a first antioxidant film on the oxide buffer layer, and a fourth step of heat treating the resultant. And a fifth step of forming a second antioxidant film on the first antioxidant film. Therefore, by essentially removing the upper buzz beetle between the antioxidant film and the oxide buffer layer and preventing alignment defects in the subsequent photographic process, the size of the device isolation film having stable separation characteristics can be reduced to sub-micron class.

Description

Device Separator Formation Method

1A and 1B are cross-sectional views illustrating a general SEPOX scheme.

2 is a cross-sectional view for explaining a method of suppressing occurrence of upper buzz bees in the SEPOX system.

3 is a cross-sectional view illustrating a wafer in which wafer warpage has occurred during the SEPOX process.

4A and 4D are cross-sectional views illustrating a device isolation film forming method according to the present invention.

5A and 5B are graphs showing EGA experimental data according to the conventional and the present invention.

6A and 6B are SEM images of a device isolation film manufactured by the conventional and the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming a device isolation layer having a sub-micron size.

With the higher integration of semiconductor devices, not only the size of individual devices formed on the semiconductor substrate is reduced, but also the size of the device isolation region for electrically separating the individual devices is gradually reduced to sub-micron class.

Various device isolation film forming methods for electrically separating individual devices have been introduced. Among them, the LOCOS method of forming a semi-recessed field oxide film on a semiconductor substrate in an inactive region, that is, a device isolation region, has a simple manufacturing method, but a bird's bead having a shape that penetrates into the active region. It is not suitable for the method of manufacturing a submicron device separator because it generates beak).

In order to solve the problem of the LOCOS method, a selective polysilicon oxidation (hereinafter referred to as 'SEPOX') method has been proposed, Figures 1A and 1B are cross-sectional views for explaining the general SEPOX method. .

A thin pad oxide film 2 is formed on the semiconductor substrate 1 by a thermal oxidation method, and a buffer polysilicon layer 3 is formed on the pad oxide film 2, and then on the polysilicon layer 3. The silicon nitride film 4 is formed in the film. Subsequently, the silicon nitride film 4 formed in the device isolation region is etched to form an opening (not shown) defining the device isolation region by a photolithography process, and then a buffer polysilicon layer exposed by the opening ( The field oxide film 5 is formed by partially oxidizing 3) and the surface portion of the semiconductor substrate 1 (Fig. 1A). Subsequently, the silicon nitride film 4 and the unoxidized buffer polysilicon layer 3 are removed (FIG. 1B).

According to the SEPOX method described above, when the field oxide film is formed, the oxidative stress due to volume expansion is applied to the buffer polysilicon layer 3, so that the stress due to the oxidative stress is reduced on the substrate on which the element is formed, and the size of the buzz beak Can be reduced. However, this SEPOX method also causes a problem that the buzz bee occurs in two places as the active region in which the device is formed is significantly smaller than the sub-micron level. That is, a lower buzz beetle (reference numeral a in FIG. 1A) is generated between the pad oxide film 2 and the semiconductor substrate 1, and an upper buzz beetle is formed between the silicon nitride film 4 and the buffer polysilicon layer 3. Reference numeral b) in FIG. 1B occurs. In this case, the lower Buzzbeek causes a problem of reducing the size of the active region, and the upper Buzzbeek causes a problem of lowering the reliability of the device formed by a subsequent manufacturing process.

In the case of the lower Buzzbeek, if the thickness of the pad oxide film 2 is reduced and the thickness of the buffer polysilicon layer 3 is increased, the formation thereof can be suppressed, but in the case of the top Buzzbeek, the thickness of the layers is changed. It cannot be suppressed. In addition, if the upper buzz bee occurs badly, even if the silicon nitride film and the buffer polysilicon layer are removed after the field oxide film 5 is formed, the buffer polysilicon layer remains between the upper buzz beak as shown in FIG. As a result, the field oxide film 5 (see P in FIG. 1B) loses its role as an element isolation film.

Therefore, in order to form a submicron device isolation layer reliably, it is necessary to suppress the occurrence of the upper buzz beak.

2 is a cross-sectional view for explaining a method of suppressing the occurrence of the upper buzz beak in the SEPOX system, a device isolation method of a semiconductor device (Korean Patent Application No. 93-22236, application date; October 25, 1993, Applicant) Samsung Electronics Co., Ltd .; Cho Hyun-jin, Yang Heung-mo, Shin Yun-seung, Kwon Oh-hyun).

This is a process of forming a pad oxide film 2 on the semiconductor substrate 1, a process of forming a polysilicon layer 3 on the pad oxide film, and a process of forming a silicon nitride film 4 on the polysilicon layer. And the resultant is subjected to a high temperature heat treatment to stabilize the interface between the polysilicon layer and the silicon nitride film. Thereafter, the process of forming the field oxide film is as described with reference to FIG. 1A.

The method described above is strictly the same as the general SEPOX method described above, except that the silicon nitride film is formed, followed by a high temperature heat treatment process to stabilize the interface between the silicon nitride film and the polysilicon layer.

The upper Buzzbeek generated between the silicon nitride film and the polysilicon layer is due to the natural oxide film formed on the polysilicon layer. This natural oxide film is formed on the polysilicon layer when the substrate is exposed to air before forming the silicon nitride film, and is naturally occurring instead of an artificial process. When the high temperature heat is applied to the silicon nitride film and the polysilicon layer, the natural oxide film is changed to the oxynitride film 6, and these interfaces are stabilized. Therefore, in the thermal oxidation process for forming a field oxide film, it is possible to reduce the upper buzz bee generated by side oxidation at the interface.

However, during the high temperature heat treatment, each material layer is expanded by different sizes by different coefficients of thermal expansion, which causes stress between the films to cause warpage of the wafer. (See Figure 3). This warpage phenomenon is more severe as the thickness of the silicon nitride film is thicker, and the thickness of the silicon nitride film to faithfully serve as an antioxidant and etch stop layer is about 1,500 kPa. The warpage of the wafer causes a problem that EGA (Exposure Global Alignment) is not caused by misalignment in a subsequent photographic process, which is a great cause of deterioration of device reliability.

Therefore, there is a need for a device isolation film forming method capable of reducing the size of the Buzz beak without warping the wafer.

It is an object of the present invention to provide a device isolation film forming method capable of forming a device isolation film of sub-micron level or less reliably. Another object of the present invention is to provide a device isolation film forming method without warping of a wafer.

A device isolation film forming method for achieving the above object of the present invention, a first step of forming a pad oxide film on a semiconductor substrate, a second step of forming an oxide buffer layer on the pad oxide film, a first oxidation on the oxide buffer layer And a third step of forming a protective film, a fourth step of heat treating a resultant product, and a fifth step of forming a second antioxidant film on the first antioxidant film.

After the second step, it is preferable to add a step of nitriding a natural oxide film which may be formed on the oxide buffer layer using nitrogen gas. In this case, NH _x is used as the nitrogen gas.

The oxide buffer layer is preferably formed of polycrystalline silicon which is doped or not doped with impurities.

Preferably, the first and second antioxidant films are formed of silicon nitride.

Preferably, the first antioxidant film is formed to a thickness of about 100 kPa to about 500 kPa, and the thickness of the first antioxidant film and the second antioxidant film is about 1,000 kPa to about 3,000 kPa. More preferably, the first antioxidant film is formed to a thickness of about 200 kPa.

The fourth process is preferably carried out in a nitrogen atmosphere.

The fourth process is carried out at 1050 ° C ~ 1150 ° C, preferably for 1 to 4 hours.

The fourth process is preferably performed for about 8 hours at about 1150 ℃.

The fourth process is preferably performed simultaneously with a drive-in process for forming N and P wells.

After the fifth process, a sixth process of forming an opening by etching the first and second anti-oxidation films in the region where the device isolation film is to be formed, and oxidizing the oxide buffer layer exposed to the surface through the opening to form an device isolation film. It is preferable to add the seventh process to form.

Therefore, according to the device isolation film forming method according to the present invention, since the first antioxidant film is thinly formed and then heat treated, the stress between the film materials can be further alleviated as compared with the conventionally formed thick antioxidant film from the beginning. Prevents warping of the wafer. In addition, a thick second anti-oxidation film was formed on the resultant heat treated product, thereby sufficiently serving as an anti-oxidation and etch stop layer.

Hereinafter, with reference to the accompanying drawings will be described in more detail the present invention.

4A and 4D are cross-sectional views illustrating a device isolation film forming method according to the present invention.

First, FIG. 4A illustrates a process of forming the pad oxide film 20 and the oxide buffer layer 30 on the semiconductor substrate 10, which is about 240 kW on the semiconductor substrate 10 by a conventional thermal oxidation method. The first step of forming the pad oxide film 20 having a thickness and a material having properties similar to those of the material constituting the semiconductor substrate on the pad oxide film, such as polycrystalline silicon doped with impurities or polycrystalline silicon not doped with impurities The oxide buffer layer serves to relieve the stress due to volume expansion during the thermal oxidation process for subsequent field oxide film formation by depositing, for example, by Low Pressure Chemical Vaper Deposition (LPCVD). It proceeds to the 2nd process of forming 30.

In this case, the pad oxide film 20 and the oxide buffer layer 30 may be formed to have a thickness sufficient to reduce the stress of the substrate when forming the field oxide film, and to serve as an etch stop layer. In the present invention, the pad oxide film 20 was formed to a thickness of about 110 ~ 500Å, the oxide buffer layer 30 was formed to a thickness of about 500 ~ 2000Å.

When the polycrystalline silicon used as the oxide buffer layer 30 is exposed to air, silicon particles constituting the polycrystalline silicon and oxygen particles in the air are bonded to each other, and a native oxide film having a thickness of about 10 kPa to 100 kPa is formed on the surface thereof. (Not shown) is grown. Since the diffusion rate of the oxidizing agent (oxygen) is faster in the natural oxide film than in the polycrystalline silicon layer or the silicon nitride film, the presence of the natural oxide film increases the size of the upper Buzzbeek (see b in FIG. 1).

The semiconductor substrate on which the oxide buffer layer is formed is placed in a nitride film deposition chamber, and the natural oxide film is converted into a silicon nitride film having a SiON structure by heat-treating the surface at a temperature of about 850 ° C. in a nitrogen (NH _x ) gas atmosphere. In the silicon nitride film, the diffusion rate of the oxidant may be suppressed more than in the natural oxide film, thereby suppressing generation of the upper buzz beak.

FIG. 4B shows the formation of the first antioxidant film 40 and the high temperature heat treatment process. The first antioxidant film 40 is formed by depositing a silicon nitride film on the oxide buffer layer using, for example, LPCVD. The process and the resultant proceed to the second process of high temperature heat treatment.

At this time, the first antioxidant film 40 should be formed to a thickness that can prevent the warpage of the wafer by minimizing the stress due to the difference in thermal expansion between the film quality during the subsequent high temperature heat treatment, preferably 100 kPa ~ 500 kPa And, more preferably, about 200 mm thick.

The second step proceeds by heat-treating the resultant on which the first antioxidant film 40 is formed in a nitrogen atmosphere at a high temperature of about 1,150 ° C. for about 8 hours. This heat treatment stabilizes the interface between the first antioxidant film 40 and the oxide buffer layer 30, and increases the grain size of the polycrystalline silicon constituting the oxide buffer layer. Since the phenomenon of first oxidation along the grain boundary is eliminated, it is possible to fundamentally suppress the formation of the upper Buzzbeek.

In addition, when the natural oxide film is left without being converted into an oxynitride film through a nitriding process, oxygen atoms constituting the natural oxide film are combined with nitrogen atoms constituting the first antioxidant film by the high temperature heat treatment to form an oxynitride film. .

The step of heat-treating the substrate in a nitrogen atmosphere after the formation of the first antioxidant film 40 can be performed at a temperature of about 1,050 ° C to 1,150 ° C, and is not particularly limited to 1,150 ° C. In the above-described embodiment, the remarkable suppression of the upper buzz is shown by heat treatment at 1,150 ° C. and 8 hours, but the defect removal effect due to the reduction of the upper buzz beak is also achieved by heat treatment at 1,050 ° C. to 1,150 ° C. and 1 to 4 hours. Appears remarkably.

An N-type or P-type well formed for manufacturing a CMOS is formed by implanting N-type or P-type impurity ions into a semiconductor substrate and then diffusing them into the semiconductor substrate by a drive-in (heat treatment step) process. In this case, the drive-in process means processing the semiconductor substrate for a long time with high temperature heat.

Since the process of forming the first antioxidant film 40 and then performing high temperature heat treatment is almost the same as the process conditions of the above-described drive-in process, it may be used together as a drive-in process for well formation. Thus, well formation is possible without a separate drive-in process.

The method of sharing the high temperature heat treatment process for reducing the size of the upper Buzzbeek with the drive-in process for forming the wells of the CMOS is described in detail in the aforementioned domestic patent application No. 93-22236.

FIG. 4C illustrates a process of forming the second antioxidant film 50 and the opening 11, which is formed of the same material as the material constituting the first antioxidant film 40 on the heat-treated resultant, for example, silicon nitride film. For example, the first step of forming the second antioxidant film 50 by applying a thickness of about 1,300 GPa and the first and second antioxidant films of the device isolation region are removed to partially expose the oxide buffer layer 30 to the surface. It progresses to the 2nd process of forming the opening part 11 to make.

In this case, the thickness of the sum of the first antioxidant film 40 and the second antioxidant film 50 is such that the thickness of the antioxidant film is sufficient to play a role as an antioxidant and etch stop layer, that is, about 1,000 ~ 3,000 Å Is preferably. Among these, as described above, the first antioxidant layer 40 is preferably formed to a thickness such that the warpage of the wafer does not occur due to stress between films during high temperature heat treatment. In addition, the opening 11 is formed by a reactive ion etching method using a photoresist pattern as an etching mask.

FIG. 4D illustrates a process of forming the device isolation film 60, which partially covers the surface of the oxide buffer layer 30 exposed by the opening and the semiconductor substrate 10 in the opening portion by the conventional thermal oxidation method. It proceeds to the process of oxidizing. In this case, the device isolation layer 60 is preferably formed to a thickness of about 4,000Å.

In FIG. 4D, reference numeral 55 denotes a combination of the first antioxidant film and the second antioxidant film.

4E shows a process for removing the first and second antioxidant films and oxide buffer layers, which remove the first and second antioxidant films and the unoxidized oxide buffer layers stacked on the semiconductor substrate in a conventional manner. The process proceeds.

In this case, ion implantation for forming a channel stop layer to further strengthen the electrical separation between the devices may be performed after the openings are formed (see FIG. 4C), or after the device isolation film is formed (FIG. 4D). Reference).

According to the device isolation film forming method according to the present invention, by the high temperature heat treatment process performed after the first antioxidant film is formed, the interface between the oxide buffer layer and the antioxidant film is stabilized, and the grain size of the polycrystalline silicon constituting the oxide buffer layer is increased. In the oxidation process for forming the separator, the phenomenon of first oxidizing along the grain boundary is eliminated, thereby significantly reducing the size of the upper Buzzbeek. In addition, warpage of the wafer due to the difference in thermal expansion between the film quality generated during the high temperature heat treatment was minimized by thinning the thickness of the first antioxidant layer, thereby preventing alignment defects occurring during the subsequent photographic process.

5A and 5B are graphs showing conventional and EGA experimental data according to the present invention. In the conventional method, the warp of the semiconductor substrate is severe, and as shown in FIG. 5A, the EGA value is -1 to-in the photographing process. 12 ppm indicates that misalignment is severe. However, in the method of the present invention, which forms a thin first antioxidant film and heat-treats it, and then again forms a second antioxidant film, as shown in FIG. 5B, there is almost no misalignment such that the EGA value is -1 to -1 ppm. It can be seen that.

6A and 6B are SEM photographs of the device isolation film prepared according to the prior art and the present invention. In the shape of the device isolation film manufactured by the conventional method and the device isolation film manufactured by the method of the present invention, It can be seen that there is no difference in length.

Therefore, by essentially removing the upper buzz beetle between the antioxidant film and the oxide buffer layer generated in the conventional SEPOX method, and prevents the misalignment in the subsequent photographic process, reducing the device isolation film having a stable separation characteristics to sub-micron class Can be formed.

The present invention is not limited only to the above embodiments, and it is apparent that many modifications are possible by those skilled in the art.

Claims (14)

A first step of forming a pad oxide film on the semiconductor substrate; A second step of forming an oxide buffer layer on the pad oxide film; A third step of forming a first antioxidant film on the oxide buffer layer; A fourth step of heat-treating the resultant; And a fifth step of forming a second antioxidant film on the first antioxidant film. The method of claim 1, wherein the pad oxide film is formed to a thickness of about 110 kV to about 500 kPa, and the oxide buffer layer is formed to a thickness of about 500 kPa to about 2,000 kPa. The method of claim 1, further comprising, after the second step, nitriding a natural oxide film that may be formed on the oxide buffer layer using nitrogen gas. The method of claim 3, wherein the nitriding process is performed at a temperature of 850 ° C. using NH _x gas. The method of claim 1, wherein the oxide buffer layer is formed of polycrystalline silicon that is doped or not doped with impurities. The method of claim 1, wherein the first and second antioxidant layers are formed of silicon nitride. The device of claim 1, wherein the first antioxidant layer is formed to a thickness of about 100 kPa to about 500 kPa, and the thickness of the first antioxidant film and the second antioxidant film is about 1,000 kPa to about 3,000 kPa. Formation method. The method of claim 7, wherein the first antioxidant layer is formed to a thickness of about 200 μs. The method of claim 1, wherein the fourth process is performed in a nitrogen atmosphere. The method of claim 1, wherein the fourth process is performed at 1050 ° C. to 1150 ° C. 7. The method of claim 10, wherein the fourth process is performed for 1 to 4 hours. The method of claim 1, wherein the fourth process is performed at about 1150 ° C. for about 8 hours. The method of claim 1, wherein the fourth process is performed simultaneously with a drive-in process for forming N and P wells. The sixth process of claim 1, wherein after the fifth process, the first and second anti-oxidation layers of the region where the device isolation layer is to be formed are etched to form openings, and the oxide buffer layer exposed to the surface through the openings. And a seventh step of forming an isolation layer by oxidizing the oxide.